[arch-commits] CVS update of arch/build/x11-drivers/xf86-video-intel (3 files)
Jan de Groot
jgc at archlinux.org
Sat Aug 4 11:18:20 UTC 2007
Date: Saturday, August 4, 2007 @ 07:18:20
Author: jgc
Path: /home/cvs-arch/arch/build/x11-drivers/xf86-video-intel
Added: 945gme.patch (1.1) g33.patch (1.1)
Modified: PKGBUILD (1.4 -> 1.5)
upgpkg: xf86-video-intel 2.1.0-2
Add support for 945GME and G33
--------------+
945gme.patch | 127 +++++++++++++++++++++++++++++++++++++++++++++
PKGBUILD | 19 ++++--
g33.patch | 160 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++
3 files changed, 300 insertions(+), 6 deletions(-)
Index: arch/build/x11-drivers/xf86-video-intel/945gme.patch
diff -u /dev/null arch/build/x11-drivers/xf86-video-intel/945gme.patch:1.1
--- /dev/null Sat Aug 4 07:18:20 2007
+++ arch/build/x11-drivers/xf86-video-intel/945gme.patch Sat Aug 4 07:18:20 2007
@@ -0,0 +1,127 @@
+commit a74eec5af5397b612d60dd4b0d81666027f19bb0
+Author: Wang Zhenyu <zhenyu.z.wang at intel.com>
+Date: Wed May 30 16:11:12 2007 +0800
+
+ i915: Add support for 945GME chip
+
+diff --git a/src/mesa/drivers/dri/i915/i915_texstate.c b/src/mesa/drivers/dri/i915/i915_texstate.c
+index 9f0c949..d0e8474 100644
+--- a/src/mesa/drivers/dri/i915/i915_texstate.c
++++ b/src/mesa/drivers/dri/i915/i915_texstate.c
+@@ -493,7 +493,8 @@ static void i915SetTexImages( i915ContextPtr i915,
+
+
+ if (i915->intel.intelScreen->deviceID == PCI_CHIP_I945_G ||
+- i915->intel.intelScreen->deviceID == PCI_CHIP_I945_GM)
++ i915->intel.intelScreen->deviceID == PCI_CHIP_I945_GM ||
++ i915->intel.intelScreen->deviceID == PCI_CHIP_I945_GME)
+ i945LayoutTextureImages( i915, tObj );
+ else
+ i915LayoutTextureImages( i915, tObj );
+diff --git a/src/mesa/drivers/dri/i915/intel_context.c b/src/mesa/drivers/dri/i915/intel_context.c
+index e747fc6..9f25b09 100644
+--- a/src/mesa/drivers/dri/i915/intel_context.c
++++ b/src/mesa/drivers/dri/i915/intel_context.c
+@@ -123,6 +123,8 @@ const GLubyte *intelGetString( GLcontext *ctx, GLenum name )
+ chipset = "Intel(R) 945G"; break;
+ case PCI_CHIP_I945_GM:
+ chipset = "Intel(R) 945GM"; break;
++ case PCI_CHIP_I945_GME:
++ chipset = "Intel(R) 945GME"; break;
+ default:
+ chipset = "Unknown Intel Chipset"; break;
+ }
+diff --git a/src/mesa/drivers/dri/i915/intel_context.h b/src/mesa/drivers/dri/i915/intel_context.h
+index c48b074..ae05145 100644
+--- a/src/mesa/drivers/dri/i915/intel_context.h
++++ b/src/mesa/drivers/dri/i915/intel_context.h
+@@ -454,6 +454,7 @@ extern int INTEL_DEBUG;
+ #define PCI_CHIP_I915_GM 0x2592
+ #define PCI_CHIP_I945_G 0x2772
+ #define PCI_CHIP_I945_GM 0x27A2
++#define PCI_CHIP_I945_GME 0x27AE
+
+
+ /* ================================================================
+diff --git a/src/mesa/drivers/dri/i915/intel_screen.c b/src/mesa/drivers/dri/i915/intel_screen.c
+index 67e176a..d6c1cfe 100644
+--- a/src/mesa/drivers/dri/i915/intel_screen.c
++++ b/src/mesa/drivers/dri/i915/intel_screen.c
+@@ -514,6 +514,7 @@ static GLboolean intelCreateContext( const __GLcontextModes *mesaVis,
+ case PCI_CHIP_I915_GM:
+ case PCI_CHIP_I945_G:
+ case PCI_CHIP_I945_GM:
++ case PCI_CHIP_I945_GME:
+ return i915CreateContext( mesaVis, driContextPriv,
+ sharedContextPrivate );
+
+diff --git a/src/mesa/drivers/dri/i915/intel_tex.c b/src/mesa/drivers/dri/i915/intel_tex.c
+index 98ddc79..d75ebd8 100644
+--- a/src/mesa/drivers/dri/i915/intel_tex.c
++++ b/src/mesa/drivers/dri/i915/intel_tex.c
+@@ -677,7 +677,8 @@ static void intelUploadTexImage( intelContextPtr intel,
+ /* Time for another vtbl entry:
+ */
+ else if (intel->intelScreen->deviceID == PCI_CHIP_I945_G ||
+- intel->intelScreen->deviceID == PCI_CHIP_I945_GM) {
++ intel->intelScreen->deviceID == PCI_CHIP_I945_GM ||
++ intel->intelScreen->deviceID == PCI_CHIP_I945_GME) {
+ GLuint row_len = image->Width * image->TexFormat->TexelBytes;
+ GLubyte *dst = (GLubyte *)(t->BufAddr + offset);
+ GLubyte *src = (GLubyte *)image->Data;
+commit ad6351a994fd14af9d07da4f06837a7f9b9d0de4
+Author: Wang Zhenyu <zhenyu.z.wang at intel.com>
+Date: Wed May 30 16:18:26 2007 +0800
+
+ i915tex: Add support for 945GME
+
+diff --git a/src/mesa/drivers/dri/i915tex/intel_context.c b/src/mesa/drivers/dri/i915tex/intel_context.c
+index 20b2b41..e581cb0 100644
+--- a/src/mesa/drivers/dri/i915tex/intel_context.c
++++ b/src/mesa/drivers/dri/i915tex/intel_context.c
+@@ -130,6 +130,9 @@ intelGetString(GLcontext * ctx, GLenum name)
+ case PCI_CHIP_I945_GM:
+ chipset = "Intel(R) 945GM";
+ break;
++ case PCI_CHIP_I945_GME:
++ chipset = "Intel(R) 945GME";
++ break;
+ default:
+ chipset = "Unknown Intel Chipset";
+ break;
+diff --git a/src/mesa/drivers/dri/i915tex/intel_context.h b/src/mesa/drivers/dri/i915tex/intel_context.h
+index e61d72e..24e2b37 100644
+--- a/src/mesa/drivers/dri/i915tex/intel_context.h
++++ b/src/mesa/drivers/dri/i915tex/intel_context.h
+@@ -385,6 +385,7 @@ extern int INTEL_DEBUG;
+ #define PCI_CHIP_I915_GM 0x2592
+ #define PCI_CHIP_I945_G 0x2772
+ #define PCI_CHIP_I945_GM 0x27A2
++#define PCI_CHIP_I945_GME 0x27AE
+
+
+ /* ================================================================
+diff --git a/src/mesa/drivers/dri/i915tex/intel_mipmap_tree.c b/src/mesa/drivers/dri/i915tex/intel_mipmap_tree.c
+index 8e83028..9e90dd1 100644
+--- a/src/mesa/drivers/dri/i915tex/intel_mipmap_tree.c
++++ b/src/mesa/drivers/dri/i915tex/intel_mipmap_tree.c
+@@ -79,6 +79,7 @@ intel_miptree_create(struct intel_context *intel,
+ switch (intel->intelScreen->deviceID) {
+ case PCI_CHIP_I945_G:
+ case PCI_CHIP_I945_GM:
++ case PCI_CHIP_I945_GME:
+ ok = i945_miptree_layout(mt);
+ break;
+ case PCI_CHIP_I915_G:
+diff --git a/src/mesa/drivers/dri/i915tex/intel_screen.c b/src/mesa/drivers/dri/i915tex/intel_screen.c
+index 5e6df81..5840d62 100644
+--- a/src/mesa/drivers/dri/i915tex/intel_screen.c
++++ b/src/mesa/drivers/dri/i915tex/intel_screen.c
+@@ -752,6 +752,7 @@ intelCreateContext(const __GLcontextModes * mesaVis,
+ case PCI_CHIP_I915_GM:
+ case PCI_CHIP_I945_G:
+ case PCI_CHIP_I945_GM:
++ case PCI_CHIP_I945_GME:
+ return i915CreateContext(mesaVis, driContextPriv, sharedContextPrivate);
+
+ default:
Index: arch/build/x11-drivers/xf86-video-intel/PKGBUILD
diff -u arch/build/x11-drivers/xf86-video-intel/PKGBUILD:1.4 arch/build/x11-drivers/xf86-video-intel/PKGBUILD:1.5
--- arch/build/x11-drivers/xf86-video-intel/PKGBUILD:1.4 Fri Jul 6 06:25:23 2007
+++ arch/build/x11-drivers/xf86-video-intel/PKGBUILD Sat Aug 4 07:18:20 2007
@@ -1,8 +1,8 @@
-# $Id: PKGBUILD,v 1.4 2007/07/06 10:25:23 alexander Exp $
+# $Id: PKGBUILD,v 1.5 2007/08/04 11:18:20 jgc Exp $
# Maintainer: Alexander Baldeck <alexander at archlinux.org>
pkgname=xf86-video-intel
pkgver=2.1.0
-pkgrel=1
+pkgrel=2
_mesaver=7.0
pkgdesc="X.org Intel i810/i830/i915 video drivers"
arch=(i686 x86_64)
@@ -14,7 +14,13 @@
groups=('xorg-video-drivers')
conflicts=('xf86-video-i810')
source=(${url}/releases/individual/driver/${pkgname}-${pkgver}.tar.bz2
- http://dl.sourceforge.net/mesa3d/MesaLib-${_mesaver}.tar.bz2)
+ http://downloads.sourceforge.net/mesa3d/MesaLib-${_mesaver}.tar.bz2
+ 945gme.patch
+ g33.patch)
+md5sums=('a564a1fbb7ed9fcbcf81e15aedc92578'
+ '50c371455fa7532c04aa0a970f9bc51f'
+ '07d7d7dcd4e14623d60e8cc72dbc7df2'
+ '18be0bd1da75e1cc1e09d29789972da2')
build() {
cd ${startdir}/src/${pkgname}-${pkgver}
@@ -24,7 +30,10 @@
make DESTDIR=${startdir}/pkg install || return 1
- cd ${startdir}/src/Mesa-${_mesaver}/configs
+ cd ${startdir}/src/Mesa-${_mesaver}
+ patch -Np1 -i ${startdir}/src/945gme.patch || return 1
+ patch -Np1 -i ${startdir}/src/g33.patch || return 1
+ cd configs
CONFIG="linux-dri-x86"
[ "$CARCH" = "x86_64" ] && CONFIG="linux-dri-x86-64"
@@ -48,5 +57,3 @@
make || return 1
install -m 755 */*_dri.so ${startdir}/pkg/usr/lib/xorg/modules/dri/
}
-md5sums=('a564a1fbb7ed9fcbcf81e15aedc92578'
- '50c371455fa7532c04aa0a970f9bc51f')
Index: arch/build/x11-drivers/xf86-video-intel/g33.patch
diff -u /dev/null arch/build/x11-drivers/xf86-video-intel/g33.patch:1.1
--- /dev/null Sat Aug 4 07:18:20 2007
+++ arch/build/x11-drivers/xf86-video-intel/g33.patch Sat Aug 4 07:18:20 2007
@@ -0,0 +1,160 @@
+commit 8331d9d7aa7cde7126d38d4e1eb5fe8a168077f3
+Author: Wang Zhenyu <zhenyu.z.wang at intel.com>
+Date: Tue Jun 5 11:42:43 2007 -0700
+
+ Add PCI IDs for the G33, Q33, and Q35 chipsets.
+
+diff --git a/src/mesa/drivers/dri/i915/i915_texstate.c b/src/mesa/drivers/dri/i915/i915_texstate.c
+index d0e8474..a19d4b6 100644
+--- a/src/mesa/drivers/dri/i915/i915_texstate.c
++++ b/src/mesa/drivers/dri/i915/i915_texstate.c
+@@ -491,13 +491,19 @@ static void i915SetTexImages( i915ContextPtr i915,
+ abort();
+ }
+
+-
+- if (i915->intel.intelScreen->deviceID == PCI_CHIP_I945_G ||
+- i915->intel.intelScreen->deviceID == PCI_CHIP_I945_GM ||
+- i915->intel.intelScreen->deviceID == PCI_CHIP_I945_GME)
+- i945LayoutTextureImages( i915, tObj );
+- else
+- i915LayoutTextureImages( i915, tObj );
++ switch (i915->intel.intelScreen->deviceID) {
++ case PCI_CHIP_I945_G:
++ case PCI_CHIP_I945_GM:
++ case PCI_CHIP_I945_GME:
++ case PCI_CHIP_G33_G:
++ case PCI_CHIP_Q33_G:
++ case PCI_CHIP_Q35_G:
++ i945LayoutTextureImages( i915, tObj );
++ break;
++ default:
++ i915LayoutTextureImages( i915, tObj );
++ break;
++ }
+
+ t->Setup[I915_TEXREG_MS3] =
+ (((tObj->Image[0][t->intel.base.firstLevel]->Height - 1) << MS3_HEIGHT_SHIFT) |
+diff --git a/src/mesa/drivers/dri/i915/intel_context.c b/src/mesa/drivers/dri/i915/intel_context.c
+index 9f25b09..11c23f2 100644
+--- a/src/mesa/drivers/dri/i915/intel_context.c
++++ b/src/mesa/drivers/dri/i915/intel_context.c
+@@ -125,6 +125,12 @@ const GLubyte *intelGetString( GLcontext *ctx, GLenum name )
+ chipset = "Intel(R) 945GM"; break;
+ case PCI_CHIP_I945_GME:
+ chipset = "Intel(R) 945GME"; break;
++ case PCI_CHIP_G33_G:
++ chipset = "Intel(R) G33"; break;
++ case PCI_CHIP_Q35_G:
++ chipset = "Intel(R) Q35"; break;
++ case PCI_CHIP_Q33_G:
++ chipset = "Intel(R) Q33"; break;
+ default:
+ chipset = "Unknown Intel Chipset"; break;
+ }
+diff --git a/src/mesa/drivers/dri/i915/intel_context.h b/src/mesa/drivers/dri/i915/intel_context.h
+index ae05145..3b50107 100644
+--- a/src/mesa/drivers/dri/i915/intel_context.h
++++ b/src/mesa/drivers/dri/i915/intel_context.h
+@@ -455,6 +455,9 @@ extern int INTEL_DEBUG;
+ #define PCI_CHIP_I945_G 0x2772
+ #define PCI_CHIP_I945_GM 0x27A2
+ #define PCI_CHIP_I945_GME 0x27AE
++#define PCI_CHIP_G33_G 0x29C2
++#define PCI_CHIP_Q35_G 0x29B2
++#define PCI_CHIP_Q33_G 0x29D2
+
+
+ /* ================================================================
+diff --git a/src/mesa/drivers/dri/i915/intel_screen.c b/src/mesa/drivers/dri/i915/intel_screen.c
+index d6c1cfe..ca8610b 100644
+--- a/src/mesa/drivers/dri/i915/intel_screen.c
++++ b/src/mesa/drivers/dri/i915/intel_screen.c
+@@ -515,6 +515,9 @@ static GLboolean intelCreateContext( const __GLcontextModes *mesaVis,
+ case PCI_CHIP_I945_G:
+ case PCI_CHIP_I945_GM:
+ case PCI_CHIP_I945_GME:
++ case PCI_CHIP_G33_G:
++ case PCI_CHIP_Q35_G:
++ case PCI_CHIP_Q33_G:
+ return i915CreateContext( mesaVis, driContextPriv,
+ sharedContextPrivate );
+
+diff --git a/src/mesa/drivers/dri/i915/intel_tex.c b/src/mesa/drivers/dri/i915/intel_tex.c
+index d75ebd8..5bd2806 100644
+--- a/src/mesa/drivers/dri/i915/intel_tex.c
++++ b/src/mesa/drivers/dri/i915/intel_tex.c
+@@ -678,7 +678,10 @@ static void intelUploadTexImage( intelContextPtr intel,
+ */
+ else if (intel->intelScreen->deviceID == PCI_CHIP_I945_G ||
+ intel->intelScreen->deviceID == PCI_CHIP_I945_GM ||
+- intel->intelScreen->deviceID == PCI_CHIP_I945_GME) {
++ intel->intelScreen->deviceID == PCI_CHIP_I945_GME ||
++ intel->intelScreen->deviceID == PCI_CHIP_G33_G ||
++ intel->intelScreen->deviceID == PCI_CHIP_Q33_G ||
++ intel->intelScreen->deviceID == PCI_CHIP_Q35_G) {
+ GLuint row_len = image->Width * image->TexFormat->TexelBytes;
+ GLubyte *dst = (GLubyte *)(t->BufAddr + offset);
+ GLubyte *src = (GLubyte *)image->Data;
+diff --git a/src/mesa/drivers/dri/i915tex/intel_context.c b/src/mesa/drivers/dri/i915tex/intel_context.c
+index e581cb0..c927dca 100644
+--- a/src/mesa/drivers/dri/i915tex/intel_context.c
++++ b/src/mesa/drivers/dri/i915tex/intel_context.c
+@@ -133,6 +133,15 @@ intelGetString(GLcontext * ctx, GLenum name)
+ case PCI_CHIP_I945_GME:
+ chipset = "Intel(R) 945GME";
+ break;
++ case PCI_CHIP_G33_G:
++ chipset = "Intel(R) G33";
++ break;
++ case PCI_CHIP_Q35_G:
++ chipset = "Intel(R) Q35";
++ break;
++ case PCI_CHIP_Q33_G:
++ chipset = "Intel(R) Q33";
++ break;
+ default:
+ chipset = "Unknown Intel Chipset";
+ break;
+diff --git a/src/mesa/drivers/dri/i915tex/intel_context.h b/src/mesa/drivers/dri/i915tex/intel_context.h
+index 24e2b37..9d060eb 100644
+--- a/src/mesa/drivers/dri/i915tex/intel_context.h
++++ b/src/mesa/drivers/dri/i915tex/intel_context.h
+@@ -386,6 +386,9 @@ extern int INTEL_DEBUG;
+ #define PCI_CHIP_I945_G 0x2772
+ #define PCI_CHIP_I945_GM 0x27A2
+ #define PCI_CHIP_I945_GME 0x27AE
++#define PCI_CHIP_G33_G 0x29C2
++#define PCI_CHIP_Q35_G 0x29B2
++#define PCI_CHIP_Q33_G 0x29D2
+
+
+ /* ================================================================
+diff --git a/src/mesa/drivers/dri/i915tex/intel_mipmap_tree.c b/src/mesa/drivers/dri/i915tex/intel_mipmap_tree.c
+index 9e90dd1..843a78e 100644
+--- a/src/mesa/drivers/dri/i915tex/intel_mipmap_tree.c
++++ b/src/mesa/drivers/dri/i915tex/intel_mipmap_tree.c
+@@ -80,6 +80,9 @@ intel_miptree_create(struct intel_context *intel,
+ case PCI_CHIP_I945_G:
+ case PCI_CHIP_I945_GM:
+ case PCI_CHIP_I945_GME:
++ case PCI_CHIP_G33_G:
++ case PCI_CHIP_Q33_G:
++ case PCI_CHIP_Q35_G:
+ ok = i945_miptree_layout(mt);
+ break;
+ case PCI_CHIP_I915_G:
+diff --git a/src/mesa/drivers/dri/i915tex/intel_screen.c b/src/mesa/drivers/dri/i915tex/intel_screen.c
+index 5840d62..2acdead 100644
+--- a/src/mesa/drivers/dri/i915tex/intel_screen.c
++++ b/src/mesa/drivers/dri/i915tex/intel_screen.c
+@@ -753,6 +753,9 @@ intelCreateContext(const __GLcontextModes * mesaVis,
+ case PCI_CHIP_I945_G:
+ case PCI_CHIP_I945_GM:
+ case PCI_CHIP_I945_GME:
++ case PCI_CHIP_G33_G:
++ case PCI_CHIP_Q35_G:
++ case PCI_CHIP_Q33_G:
+ return i915CreateContext(mesaVis, driContextPriv, sharedContextPrivate);
+
+ default:
More information about the arch-commits
mailing list