[arch-commits] Commit in xf86-video-intel/repos (4 files)

Jan de Groot jgc at archlinux.org
Tue Oct 11 17:29:10 EDT 2011


    Date: Tuesday, October 11, 2011 @ 17:29:09
  Author: jgc
Revision: 140327

db-move: moved xf86-video-intel from [testing] to [extra] (i686)

Added:
  xf86-video-intel/repos/extra-i686/PKGBUILD
    (from rev 140271, xf86-video-intel/repos/testing-i686/PKGBUILD)
Deleted:
  xf86-video-intel/repos/extra-i686/PKGBUILD
  xf86-video-intel/repos/extra-i686/git-fixes.patch
  xf86-video-intel/repos/testing-i686/

-----------------+
 PKGBUILD        |   66 +--
 git-fixes.patch | 1050 ------------------------------------------------------
 2 files changed, 31 insertions(+), 1085 deletions(-)

Deleted: extra-i686/PKGBUILD
===================================================================
--- extra-i686/PKGBUILD	2011-10-11 21:29:07 UTC (rev 140326)
+++ extra-i686/PKGBUILD	2011-10-11 21:29:09 UTC (rev 140327)
@@ -1,35 +0,0 @@
-# $Id$
-# Maintainer: Jan de Groot <jgc at archlinux.org>
-
-pkgname=xf86-video-intel
-pkgver=2.15.0
-pkgrel=2
-pkgdesc="X.org Intel i810/i830/i915/945G/G965+ video drivers"
-arch=(i686 x86_64)
-url="http://xorg.freedesktop.org/"
-license=('custom')
-depends=(intel-dri libxvmc libpciaccess libdrm xcb-util libxfixes udev)
-makedepends=('xorg-server-devel' 'libx11' 'libdrm' 'xf86driproto' 'glproto' 'mesa' 'libxvmc' 'xcb-util')
-conflicts=('xorg-server<1.10.0' 'xf86-video-i810' 'xf86-video-intel-legacy')
-options=('!libtool')
-groups=('xorg-drivers' 'xorg')
-source=(${url}/releases/individual/driver/${pkgname}-${pkgver}.tar.bz2
-        git-fixes.patch)
-sha1sums=('78ec39a4470cfc0bf13d269fb915f6c5a498ee62'
-          'd7a9102e58c1d6c1bcb99ff6836146bd54a18161')
-
-build() {
-  cd "${srcdir}/${pkgname}-${pkgver}"
-  patch -Np1 -i "${srcdir}/git-fixes.patch"
-
-  autoreconf
-  ./configure --prefix=/usr --enable-dri
-  make
-}
-
-package() {
-  cd "${srcdir}/${pkgname}-${pkgver}"
-  make DESTDIR="${pkgdir}" install
-  install -m755 -d "${pkgdir}/usr/share/licenses/${pkgname}"
-  install -m644 COPYING "${pkgdir}/usr/share/licenses/${pkgname}/"
-}

Copied: xf86-video-intel/repos/extra-i686/PKGBUILD (from rev 140271, xf86-video-intel/repos/testing-i686/PKGBUILD)
===================================================================
--- extra-i686/PKGBUILD	                        (rev 0)
+++ extra-i686/PKGBUILD	2011-10-11 21:29:09 UTC (rev 140327)
@@ -0,0 +1,31 @@
+# $Id$
+# Maintainer: Jan de Groot <jgc at archlinux.org>
+
+pkgname=xf86-video-intel
+pkgver=2.16.0
+pkgrel=1
+pkgdesc="X.org Intel i810/i830/i915/945G/G965+ video drivers"
+arch=(i686 x86_64)
+url="http://xorg.freedesktop.org/"
+license=('custom')
+depends=(intel-dri libxvmc libpciaccess libdrm xcb-util libxfixes udev)
+makedepends=('xorg-server-devel>=1.10.99.902' 'libx11' 'libdrm' 'xf86driproto' 'glproto' 'mesa' 'libxvmc' 'xcb-util' 'libxrender')
+conflicts=('xorg-server<1.10.99.902' 'xf86-video-i810' 'xf86-video-intel-legacy')
+options=('!libtool')
+groups=('xorg-drivers' 'xorg')
+source=(${url}/releases/individual/driver/${pkgname}-${pkgver}.tar.bz2)
+sha1sums=('53441ea4d4335b501d32809b6b92593cbb1f79cf')
+
+build() {
+  cd "${srcdir}/${pkgname}-${pkgver}"
+
+  ./configure --prefix=/usr --enable-dri
+  make
+}
+
+package() {
+  cd "${srcdir}/${pkgname}-${pkgver}"
+  make DESTDIR="${pkgdir}" install
+  install -m755 -d "${pkgdir}/usr/share/licenses/${pkgname}"
+  install -m644 COPYING "${pkgdir}/usr/share/licenses/${pkgname}/"
+}

Deleted: extra-i686/git-fixes.patch
===================================================================
--- extra-i686/git-fixes.patch	2011-10-11 21:29:07 UTC (rev 140326)
+++ extra-i686/git-fixes.patch	2011-10-11 21:29:09 UTC (rev 140327)
@@ -1,1050 +0,0 @@
-diff --git a/NEWS b/NEWS
-index ea92bcf..61866b0 100644
---- a/NEWS
-+++ b/NEWS
-@@ -2,9 +2,9 @@ Release 2.15.0 (2011-04-14)
- ==============================
- We are pleased to announce this major release of the xf86-video-intel
- driver, roughly on schedule at 3 months since 2.14.0. With the many bug
--fixes in this release, we encourage everyone to upgrade to 2.14.
-+fixes in this release, we encourage everyone to upgrade to 2.15.
- 
--The priority for this quarter has been simply to unexciting and stabilise
-+The priority for this quarter has been simply to be unexciting and stabilise
- the driver further, seeking to capitalise upon the improvements elsewhere
- in the stack.
- 
-diff --git a/configure.ac b/configure.ac
-index fd5a3cf..9449e56 100644
---- a/configure.ac
-+++ b/configure.ac
-@@ -77,9 +77,7 @@ AC_ARG_WITH(xorg-module-dir,
-             [moduledir="$libdir/xorg/modules"])
- 
- AC_ARG_ENABLE(dri, AS_HELP_STRING([--disable-dri],
--                                  [Disable DRI support [[default=auto]]]),
--              [DRI="$enableval"],
--              [DRI=auto])
-+                                  [Disable DRI support [[default=auto]]]))
- 
- AC_ARG_ENABLE(xvmc, AS_HELP_STRING([--disable-xvmc],
-                                   [Disable XvMC support [[default=yes]]]),
-@@ -106,40 +104,48 @@ XORG_DRIVER_CHECK_EXT(DPMSExtension, xextproto)
- # Obtain compiler/linker options for the driver dependencies
- PKG_CHECK_MODULES(XORG, [xorg-server >= 1.6 xproto fontsproto $REQUIRED_MODULES])
- PKG_CHECK_MODULES(DRM, [libdrm >= 2.4.23])
-+PKG_CHECK_MODULES(DRI, [xf86driproto], , DRI=no)
- PKG_CHECK_MODULES(PCIACCESS, [pciaccess >= 0.10])
- 
- sdkdir=`$PKG_CONFIG --variable=sdkdir xorg-server`
- 
--save_CFLAGS="$CFLAGS"
--CFLAGS="$XORG_CFLAGS $DRI_CFLAGS $DRM_CFLAGS"
--CPPFLAGS="$XORG_CFLAGS $DRI_CFLAGS $DRM_CFLAGS"
--AC_MSG_CHECKING([whether to include DRI support])
--if test x$DRI != xno; then
--        AC_CHECK_FILE([${sdkdir}/dri.h],
--                      [have_dri_h="yes"], [have_dri_h="no"])
--        AC_CHECK_FILE([${sdkdir}/sarea.h],
--                      [have_sarea_h="yes"], [have_sarea_h="no"])
--        AC_CHECK_FILE([${sdkdir}/dristruct.h],
--                      [have_dristruct_h="yes"], [have_dristruct_h="no"])
-+if test "x$enable_dri" != "xno"; then
-+        save_CFLAGS="$CFLAGS"
-+        save_CPPFLAGS="$CPPFLAGS"
-+        CFLAGS="$XORG_CFLAGS $DRI_CFLAGS $DRM_CFLAGS"
-+        CPPFLAGS="$XORG_CFLAGS $DRI_CFLAGS $DRM_CFLAGS"
-+        AC_CHECK_HEADERS([dri.h sarea.h dristruct.h],, [DRI=no],
-+                [/* for dri.h */
-+                 #include <xf86str.h>
-+                 /* for dristruct.h */
-+                 #include <xorg-server.h>
-+                 #ifdef HAVE_DRI_H
-+                 # include <dri.h>
-+                 #endif
-+                 #ifdef HAVE_SAREA_H
-+                 # include <sarea.h>
-+                 #endif
-+                ])
-+        CFLAGS="$save_CFLAGS $DEBUGFLAGS"
-+        CPPFLAGS="$save_CPPFLAGS"
-+else
-+        DRI=no
- fi
-+
- AC_MSG_CHECKING([whether to include DRI support])
--if test x$DRI = xauto; then
--        if test "$have_dri_h" = yes -a \
--                "$have_sarea_h" = yes -a \
--                "$have_dristruct_h" = yes; then
--                DRI="yes"
--        else
--                DRI="no"
--        fi
--fi
--AC_MSG_RESULT([$DRI])
--CFLAGS="$save_CFLAGS $DEBUGFLAGS"
-+AC_MSG_RESULT([${DRI-yes}])
- 
--AM_CONDITIONAL(DRI, test x$DRI = xyes)
--if test "$DRI" = yes; then
--        PKG_CHECK_MODULES(DRI, [xf86driproto])
-+AM_CONDITIONAL(DRI, test x$DRI != xno)
-+if test "x$DRI" != "xno"; then
-         AC_DEFINE(XF86DRI,1,[Enable DRI driver support])
-         AC_DEFINE(XF86DRI_DEVEL,1,[Enable developmental DRI driver support])
-+else
-+        DRI_CFLAGS=""
-+        DRI_LIBS=""
-+
-+        if test "x$enable_dri" = "xyes"; then
-+                AC_MSG_ERROR([DRI requested but prerequisites not found])
-+        fi
- fi
- 
- if test "$XVMC" = yes; then
-diff --git a/src/i965_render.c b/src/i965_render.c
-index bfcd3f2..b76107d 100644
---- a/src/i965_render.c
-+++ b/src/i965_render.c
-@@ -182,6 +182,10 @@ i965_check_composite(int op,
- 		     int width, int height)
- {
- 	ScrnInfoPtr scrn = xf86Screens[dest_picture->pDrawable->pScreen->myNum];
-+	intel_screen_private *intel = intel_get_screen_private(scrn);
-+
-+	if (IS_GEN7(intel))
-+		return FALSE;
- 
- 	/* Check for unsupported compositing operations. */
- 	if (op >= sizeof(i965_blend_op) / sizeof(i965_blend_op[0])) {
-diff --git a/src/i965_video.c b/src/i965_video.c
-index c757681..53a9394 100644
---- a/src/i965_video.c
-+++ b/src/i965_video.c
-@@ -1210,7 +1210,7 @@ I965DisplayVideoTextured(ScrnInfoPtr scrn,
- 			intel_batch_submit(scrn);
- 		}
- 
--		intel_batch_start_atomic(scrn, 100);
-+		intel_batch_start_atomic(scrn, 150);
- 
- 		i965_emit_video_setup(scrn, surface_state_binding_table_bo, n_src_surf, pixmap);
- 
-diff --git a/src/intel_batchbuffer.c b/src/intel_batchbuffer.c
-index 289ed2b..d0a41aa 100644
---- a/src/intel_batchbuffer.c
-+++ b/src/intel_batchbuffer.c
-@@ -175,13 +175,6 @@ void intel_batch_emit_flush(ScrnInfoPtr scrn)
- 	intel_batch_do_flush(scrn);
- }
- 
--static Bool intel_batch_needs_flush(intel_screen_private *intel)
--{
--	ScreenPtr screen = intel->scrn->pScreen;
--	PixmapPtr pixmap = screen->GetScreenPixmap(screen);
--	return intel_get_pixmap_private(pixmap)->batch_write;
--}
--
- void intel_batch_submit(ScrnInfoPtr scrn)
- {
- 	intel_screen_private *intel = intel_get_screen_private(scrn);
-@@ -218,7 +211,9 @@ void intel_batch_submit(ScrnInfoPtr scrn)
- 		ret = drm_intel_bo_mrb_exec(intel->batch_bo,
- 				intel->batch_used*4,
- 				NULL, 0, 0xffffffff,
--				IS_GEN6(intel) ? intel->current_batch: I915_EXEC_DEFAULT);
-+				(HAS_BLT(intel) ?
-+				 intel->current_batch:
-+				 I915_EXEC_DEFAULT));
- 	}
- 
- 	if (ret != 0) {
-@@ -241,8 +236,6 @@ void intel_batch_submit(ScrnInfoPtr scrn)
- 		}
- 	}
- 
--	intel->needs_flush |= intel_batch_needs_flush(intel);
--
- 	while (!list_is_empty(&intel->batch_pixmaps)) {
- 		struct intel_pixmap *entry;
- 
-diff --git a/src/intel_batchbuffer.h b/src/intel_batchbuffer.h
-index 605932a..f5f118e 100644
---- a/src/intel_batchbuffer.h
-+++ b/src/intel_batchbuffer.h
-@@ -50,14 +50,14 @@ static inline int intel_vertex_space(intel_screen_private *intel)
- }
- 
- static inline void
--intel_batch_require_space(ScrnInfoPtr scrn, intel_screen_private *intel, unsigned int sz)
-+intel_batch_require_space(ScrnInfoPtr scrn, intel_screen_private *intel, int sz)
- {
- 	assert(sz < intel->batch_bo->size - 8);
- 	if (intel_batch_space(intel) < sz)
- 		intel_batch_submit(scrn);
- }
- 
--static inline void intel_batch_start_atomic(ScrnInfoPtr scrn, unsigned int sz)
-+static inline void intel_batch_start_atomic(ScrnInfoPtr scrn, int sz)
- {
- 	intel_screen_private *intel = intel_get_screen_private(scrn);
- 
-@@ -137,6 +137,8 @@ intel_batch_mark_pixmap_domains(intel_screen_private *intel,
- 
- 	priv->batch_write |= write_domain != 0;
- 	priv->busy = 1;
-+
-+	intel->needs_flush |= write_domain != 0;
- }
- 
- static inline void
-diff --git a/src/intel_display.c b/src/intel_display.c
-index b6592c4..b55b110 100644
---- a/src/intel_display.c
-+++ b/src/intel_display.c
-@@ -1607,7 +1607,7 @@ Bool intel_mode_pre_init(ScrnInfoPtr scrn, int fd, int cpp)
- 	gp.value = &has_flipping;
- 	(void)drmCommandWriteRead(intel->drmSubFD, DRM_I915_GETPARAM, &gp,
- 				  sizeof(gp));
--	if (has_flipping) {
-+	if (has_flipping && intel->swapbuffers_wait) {
- 		xf86DrvMsg(scrn->scrnIndex, X_INFO,
- 			   "Kernel page flipping support detected, enabling\n");
- 		intel->use_pageflipping = TRUE;
-diff --git a/src/intel_dri.c b/src/intel_dri.c
-index a39b512..48d0f56 100644
---- a/src/intel_dri.c
-+++ b/src/intel_dri.c
-@@ -182,6 +182,8 @@ static PixmapPtr fixup_shadow(DrawablePtr drawable, PixmapPtr pixmap)
- 	/* And redirect the pixmap to the new bo (for 3D). */
- 	intel_set_pixmap_private(old, priv);
- 	old->refcnt++;
-+
-+	intel_get_screen_private(xf86Screens[screen->myNum])->needs_flush = TRUE;
- 	return old;
- }
- 
-@@ -425,7 +427,7 @@ I830DRI2CopyRegion(DrawablePtr drawable, RegionPtr pRegion,
- 
- 	/* Wait for the scanline to be outside the region to be copied */
- 	if (pixmap_is_scanout(get_drawable_pixmap(dst)) &&
--	    intel->swapbuffers_wait) {
-+	    intel->swapbuffers_wait && INTEL_INFO(intel)->gen < 60) {
- 		BoxPtr box;
- 		BoxRec crtcbox;
- 		int y1, y2;
-diff --git a/src/intel_driver.c b/src/intel_driver.c
-index e867351..8666421 100644
---- a/src/intel_driver.c
-+++ b/src/intel_driver.c
-@@ -84,7 +84,6 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
-  */
- 
- typedef enum {
--   OPTION_ACCELMETHOD,
-    OPTION_DRI,
-    OPTION_VIDEO_KEY,
-    OPTION_COLOR_KEY,
-@@ -105,7 +104,6 @@ typedef enum {
- } I830Opts;
- 
- static OptionInfoRec I830Options[] = {
--   {OPTION_ACCELMETHOD,	"AccelMethod",	OPTV_ANYSTR,	{0},	FALSE},
-    {OPTION_DRI,		"DRI",		OPTV_BOOLEAN,	{0},	TRUE},
-    {OPTION_COLOR_KEY,	"ColorKey",	OPTV_INTEGER,	{0},	FALSE},
-    {OPTION_VIDEO_KEY,	"VideoKey",	OPTV_INTEGER,	{0},	FALSE},
-@@ -328,10 +326,10 @@ static void intel_check_dri_option(ScrnInfoPtr scrn)
- 	if (!xf86ReturnOptValBool(intel->Options, OPTION_DRI, TRUE))
- 		intel->directRenderingType = DRI_DISABLED;
- 
--	if (scrn->depth != 16 && scrn->depth != 24) {
-+	if (scrn->depth != 16 && scrn->depth != 24 && scrn->depth != 30) {
- 		xf86DrvMsg(scrn->scrnIndex, X_CONFIG,
- 			   "DRI is disabled because it "
--			   "runs only at depths 16 and 24.\n");
-+			   "runs only at depths 16, 24, and 30.\n");
- 		intel->directRenderingType = DRI_DISABLED;
- 	}
- }
-@@ -586,6 +584,7 @@ static Bool I830PreInit(ScrnInfoPtr scrn, int flags)
- 	case 15:
- 	case 16:
- 	case 24:
-+	case 30:
- 		break;
- 	default:
- 		xf86DrvMsg(scrn->scrnIndex, X_ERROR,
-@@ -658,8 +657,6 @@ static Bool I830PreInit(ScrnInfoPtr scrn, int flags)
- 	intel->swapbuffers_wait = xf86ReturnOptValBool(intel->Options,
- 						       OPTION_SWAPBUFFERS_WAIT,
- 						       TRUE);
--	if (IS_GEN6(intel))
--		intel->swapbuffers_wait = FALSE;
- 
- 	xf86DrvMsg(scrn->scrnIndex, X_CONFIG, "Framebuffer %s\n",
- 		   intel->tiling & INTEL_TILING_FB ? "tiled" : "linear");
-diff --git a/src/intel_driver.h b/src/intel_driver.h
-index 2e72177..4a584fe 100644
---- a/src/intel_driver.h
-+++ b/src/intel_driver.h
-@@ -184,6 +184,13 @@
- #define PCI_CHIP_SANDYBRIDGE_M_GT2_PLUS	0x0126
- #define PCI_CHIP_SANDYBRIDGE_BRIDGE_S	0x0108	/* Server */
- #define PCI_CHIP_SANDYBRIDGE_S_GT	0x010A
-+
-+#define PCI_CHIP_IVYBRIDGE_M_GT1	0x0156
-+#define PCI_CHIP_IVYBRIDGE_M_GT2	0x0166
-+#define PCI_CHIP_IVYBRIDGE_D_GT1	0x0152
-+#define PCI_CHIP_IVYBRIDGE_D_GT2	0x0162
-+#define PCI_CHIP_IVYBRIDGE_S_GT1	0x015a
-+
- #endif
- 
- #define I85X_CAPID			0x44
-@@ -209,6 +216,7 @@
- #define IS_GEN4(intel) IS_GENx(intel, 4)
- #define IS_GEN5(intel) IS_GENx(intel, 5)
- #define IS_GEN6(intel) IS_GENx(intel, 6)
-+#define IS_GEN7(intel) IS_GENx(intel, 7)
- 
- /* Some chips have specific errata (or limits) that we need to workaround. */
- #define IS_I830(intel) (DEVICE_ID((intel)->PciInfo) == PCI_CHIP_I830_M)
-@@ -222,6 +230,7 @@
- 
- /* supports Y tiled surfaces (pre-965 Mesa isn't ready yet) */
- #define SUPPORTS_YTILING(pI810) (INTEL_INFO(intel)->gen >= 40)
-+#define HAS_BLT(pI810) (INTEL_INFO(intel)->gen >= 60)
- 
- extern SymTabRec *intel_chipsets;
- 
-diff --git a/src/intel_module.c b/src/intel_module.c
-index 8416544..9468e72 100644
---- a/src/intel_module.c
-+++ b/src/intel_module.c
-@@ -39,6 +39,8 @@
- 
- #include <xf86drmMode.h>
- 
-+static struct intel_device_info *chipset_info;
-+
- static const struct intel_device_info intel_i81x_info = {
- 	.gen = 10,
- };
-@@ -71,329 +73,148 @@ static const struct intel_device_info intel_sandybridge_info = {
- 	.gen = 60,
- };
- 
-+static const struct intel_device_info intel_ivybridge_info = {
-+	.gen = 70,
-+};
-+
- static const SymTabRec _intel_chipsets[] = {
--    {PCI_CHIP_I810,		"i810"},
--    {PCI_CHIP_I810_DC100,	"i810-dc100"},
--    {PCI_CHIP_I810_E,		"i810e"},
--    {PCI_CHIP_I815,		"i815"},
--    {PCI_CHIP_I830_M,		"i830M"},
--    {PCI_CHIP_845_G,		"845G"},
--    {PCI_CHIP_I854,		"854"},
--    {PCI_CHIP_I855_GM,		"852GM/855GM"},
--    {PCI_CHIP_I865_G,		"865G"},
--    {PCI_CHIP_I915_G,		"915G"},
--    {PCI_CHIP_E7221_G,		"E7221 (i915)"},
--    {PCI_CHIP_I915_GM,		"915GM"},
--    {PCI_CHIP_I945_G,		"945G"},
--    {PCI_CHIP_I945_GM,		"945GM"},
--    {PCI_CHIP_I945_GME,		"945GME"},
--    {PCI_CHIP_PINEVIEW_M,	"Pineview GM"},
--    {PCI_CHIP_PINEVIEW_G,	"Pineview G"},
--    {PCI_CHIP_I965_G,		"965G"},
--    {PCI_CHIP_G35_G,		"G35"},
--    {PCI_CHIP_I965_Q,		"965Q"},
--    {PCI_CHIP_I946_GZ,		"946GZ"},
--    {PCI_CHIP_I965_GM,		"965GM"},
--    {PCI_CHIP_I965_GME,		"965GME/GLE"},
--    {PCI_CHIP_G33_G,		"G33"},
--    {PCI_CHIP_Q35_G,		"Q35"},
--    {PCI_CHIP_Q33_G,		"Q33"},
--    {PCI_CHIP_GM45_GM,		"GM45"},
--    {PCI_CHIP_G45_E_G,		"4 Series"},
--    {PCI_CHIP_G45_G,		"G45/G43"},
--    {PCI_CHIP_Q45_G,		"Q45/Q43"},
--    {PCI_CHIP_G41_G,		"G41"},
--    {PCI_CHIP_B43_G,		"B43"},
--    {PCI_CHIP_B43_G1,		"B43"},
--    {PCI_CHIP_IRONLAKE_D_G,		"Clarkdale"},
--    {PCI_CHIP_IRONLAKE_M_G,		"Arrandale"},
--    {PCI_CHIP_SANDYBRIDGE_GT1,	"Sandybridge" },
--    {PCI_CHIP_SANDYBRIDGE_GT2,	"Sandybridge" },
--    {PCI_CHIP_SANDYBRIDGE_GT2_PLUS,	"Sandybridge" },
--    {PCI_CHIP_SANDYBRIDGE_M_GT1,	"Sandybridge" },
--    {PCI_CHIP_SANDYBRIDGE_M_GT2,	"Sandybridge" },
--    {PCI_CHIP_SANDYBRIDGE_M_GT2_PLUS,	"Sandybridge" },
--    {PCI_CHIP_SANDYBRIDGE_S_GT,	"Sandybridge" },
--    {-1,				NULL}
-+	{PCI_CHIP_I810,				"i810"},
-+	{PCI_CHIP_I810_DC100,			"i810-dc100"},
-+	{PCI_CHIP_I810_E,			"i810e"},
-+	{PCI_CHIP_I815,				"i815"},
-+	{PCI_CHIP_I830_M,			"i830M"},
-+	{PCI_CHIP_845_G,			"845G"},
-+	{PCI_CHIP_I854,				"854"},
-+	{PCI_CHIP_I855_GM,			"852GM/855GM"},
-+	{PCI_CHIP_I865_G,			"865G"},
-+	{PCI_CHIP_I915_G,			"915G"},
-+	{PCI_CHIP_E7221_G,			"E7221 (i915)"},
-+	{PCI_CHIP_I915_GM,			"915GM"},
-+	{PCI_CHIP_I945_G,			"945G"},
-+	{PCI_CHIP_I945_GM,			"945GM"},
-+	{PCI_CHIP_I945_GME,			"945GME"},
-+	{PCI_CHIP_PINEVIEW_M,			"Pineview GM"},
-+	{PCI_CHIP_PINEVIEW_G,			"Pineview G"},
-+	{PCI_CHIP_I965_G,			"965G"},
-+	{PCI_CHIP_G35_G,			"G35"},
-+	{PCI_CHIP_I965_Q,			"965Q"},
-+	{PCI_CHIP_I946_GZ,			"946GZ"},
-+	{PCI_CHIP_I965_GM,			"965GM"},
-+	{PCI_CHIP_I965_GME,			"965GME/GLE"},
-+	{PCI_CHIP_G33_G,			"G33"},
-+	{PCI_CHIP_Q35_G,			"Q35"},
-+	{PCI_CHIP_Q33_G,			"Q33"},
-+	{PCI_CHIP_GM45_GM,			"GM45"},
-+	{PCI_CHIP_G45_E_G,			"4 Series"},
-+	{PCI_CHIP_G45_G,			"G45/G43"},
-+	{PCI_CHIP_Q45_G,			"Q45/Q43"},
-+	{PCI_CHIP_G41_G,			"G41"},
-+	{PCI_CHIP_B43_G,			"B43"},
-+	{PCI_CHIP_B43_G1,			"B43"},
-+	{PCI_CHIP_IRONLAKE_D_G,			"Clarkdale"},
-+	{PCI_CHIP_IRONLAKE_M_G,			"Arrandale"},
-+	{PCI_CHIP_SANDYBRIDGE_GT1,		"Sandybridge Desktop (GT1)" },
-+	{PCI_CHIP_SANDYBRIDGE_GT2,		"Sandybridge Desktop (GT2)" },
-+	{PCI_CHIP_SANDYBRIDGE_GT2_PLUS,		"Sandybridge Desktop (GT2+)" },
-+	{PCI_CHIP_SANDYBRIDGE_M_GT1,		"Sandybridge Mobile (GT1)" },
-+	{PCI_CHIP_SANDYBRIDGE_M_GT2,		"Sandybridge Mobile (GT2)" },
-+	{PCI_CHIP_SANDYBRIDGE_M_GT2_PLUS,	"Sandybridge Mobile (GT2+)" },
-+	{PCI_CHIP_SANDYBRIDGE_S_GT,		"Sandybridge Server" },
-+	{PCI_CHIP_IVYBRIDGE_M_GT1,		"Ivybridge Mobile (GT1)" },
-+	{PCI_CHIP_IVYBRIDGE_M_GT2,		"Ivybridge Mobile (GT2)" },
-+	{PCI_CHIP_IVYBRIDGE_D_GT1,		"Ivybridge Desktop (GT1)" },
-+	{PCI_CHIP_IVYBRIDGE_D_GT2,		"Ivybridge Desktop (GT2)" },
-+	{PCI_CHIP_IVYBRIDGE_S_GT1,		"Ivybridge Server" },
-+	{-1,					NULL}
- };
- SymTabRec *intel_chipsets = (SymTabRec *) _intel_chipsets;
- 
- #define INTEL_DEVICE_MATCH(d,i) \
--{ 0x8086, (d), PCI_MATCH_ANY, PCI_MATCH_ANY, 0, 0, (i) }
-+    { 0x8086, (d), PCI_MATCH_ANY, PCI_MATCH_ANY, 0, 0, (intptr_t)(i) }
- 
- static const struct pci_id_match intel_device_match[] = {
--    INTEL_DEVICE_MATCH (PCI_CHIP_I810, 0 ),
--    INTEL_DEVICE_MATCH (PCI_CHIP_I810_DC100, 0 ),
--    INTEL_DEVICE_MATCH (PCI_CHIP_I810_E, 0 ),
--    INTEL_DEVICE_MATCH (PCI_CHIP_I815, 0 ),
--    INTEL_DEVICE_MATCH (PCI_CHIP_I830_M, 0 ),
--    INTEL_DEVICE_MATCH (PCI_CHIP_845_G, 0 ),
--    INTEL_DEVICE_MATCH (PCI_CHIP_I854, 0 ),
--    INTEL_DEVICE_MATCH (PCI_CHIP_I855_GM, 0 ),
--    INTEL_DEVICE_MATCH (PCI_CHIP_I865_G, 0 ),
--    INTEL_DEVICE_MATCH (PCI_CHIP_I915_G, 0 ),
--    INTEL_DEVICE_MATCH (PCI_CHIP_E7221_G, 0 ),
--    INTEL_DEVICE_MATCH (PCI_CHIP_I915_GM, 0 ),
--    INTEL_DEVICE_MATCH (PCI_CHIP_I945_G, 0 ),
--    INTEL_DEVICE_MATCH (PCI_CHIP_I945_GM, 0 ),
--    INTEL_DEVICE_MATCH (PCI_CHIP_I945_GME, 0 ),
--    INTEL_DEVICE_MATCH (PCI_CHIP_PINEVIEW_M, 0 ),
--    INTEL_DEVICE_MATCH (PCI_CHIP_PINEVIEW_G, 0 ),
--    INTEL_DEVICE_MATCH (PCI_CHIP_I965_G, 0 ),
--    INTEL_DEVICE_MATCH (PCI_CHIP_G35_G, 0 ),
--    INTEL_DEVICE_MATCH (PCI_CHIP_I965_Q, 0 ),
--    INTEL_DEVICE_MATCH (PCI_CHIP_I946_GZ, 0 ),
--    INTEL_DEVICE_MATCH (PCI_CHIP_I965_GM, 0 ),
--    INTEL_DEVICE_MATCH (PCI_CHIP_I965_GME, 0 ),
--    INTEL_DEVICE_MATCH (PCI_CHIP_G33_G, 0 ),
--    INTEL_DEVICE_MATCH (PCI_CHIP_Q35_G, 0 ),
--    INTEL_DEVICE_MATCH (PCI_CHIP_Q33_G, 0 ),
--    INTEL_DEVICE_MATCH (PCI_CHIP_GM45_GM, 0 ),
--    INTEL_DEVICE_MATCH (PCI_CHIP_G45_E_G, 0 ),
--    INTEL_DEVICE_MATCH (PCI_CHIP_G45_G, 0 ),
--    INTEL_DEVICE_MATCH (PCI_CHIP_Q45_G, 0 ),
--    INTEL_DEVICE_MATCH (PCI_CHIP_G41_G, 0 ),
--    INTEL_DEVICE_MATCH (PCI_CHIP_B43_G, 0 ),
--    INTEL_DEVICE_MATCH (PCI_CHIP_IRONLAKE_D_G, 0 ),
--    INTEL_DEVICE_MATCH (PCI_CHIP_IRONLAKE_M_G, 0 ),
--    INTEL_DEVICE_MATCH (PCI_CHIP_SANDYBRIDGE_GT1, 0 ),
--    INTEL_DEVICE_MATCH (PCI_CHIP_SANDYBRIDGE_GT2, 0 ),
--    INTEL_DEVICE_MATCH (PCI_CHIP_SANDYBRIDGE_GT2_PLUS, 0 ),
--    INTEL_DEVICE_MATCH (PCI_CHIP_SANDYBRIDGE_M_GT1, 0 ),
--    INTEL_DEVICE_MATCH (PCI_CHIP_SANDYBRIDGE_M_GT2, 0 ),
--    INTEL_DEVICE_MATCH (PCI_CHIP_SANDYBRIDGE_M_GT2_PLUS, 0 ),
--    INTEL_DEVICE_MATCH (PCI_CHIP_SANDYBRIDGE_S_GT, 0 ),
--    { 0, 0, 0 },
--};
--
--static PciChipsets intel_pci_chipsets[] = {
--    {PCI_CHIP_I810,		PCI_CHIP_I810,		NULL},
--    {PCI_CHIP_I810_DC100,	PCI_CHIP_I810_DC100,	NULL},
--    {PCI_CHIP_I810_E,		PCI_CHIP_I810_E,	NULL},
--    {PCI_CHIP_I815,		PCI_CHIP_I815,		NULL},
--    {PCI_CHIP_I830_M,		PCI_CHIP_I830_M,	NULL},
--    {PCI_CHIP_845_G,		PCI_CHIP_845_G,		NULL},
--    {PCI_CHIP_I854,		PCI_CHIP_I854,		NULL},
--    {PCI_CHIP_I855_GM,		PCI_CHIP_I855_GM,	NULL},
--    {PCI_CHIP_I865_G,		PCI_CHIP_I865_G,	NULL},
--    {PCI_CHIP_I915_G,		PCI_CHIP_I915_G,	NULL},
--    {PCI_CHIP_E7221_G,		PCI_CHIP_E7221_G,	NULL},
--    {PCI_CHIP_I915_GM,		PCI_CHIP_I915_GM,	NULL},
--    {PCI_CHIP_I945_G,		PCI_CHIP_I945_G,	NULL},
--    {PCI_CHIP_I945_GM,		PCI_CHIP_I945_GM,	NULL},
--    {PCI_CHIP_I945_GME,		PCI_CHIP_I945_GME,	NULL},
--    {PCI_CHIP_PINEVIEW_M,	PCI_CHIP_PINEVIEW_M,	NULL},
--    {PCI_CHIP_PINEVIEW_G,	PCI_CHIP_PINEVIEW_G,		NULL},
--    {PCI_CHIP_I965_G,		PCI_CHIP_I965_G,	NULL},
--    {PCI_CHIP_G35_G,		PCI_CHIP_G35_G,		NULL},
--    {PCI_CHIP_I965_Q,		PCI_CHIP_I965_Q,	NULL},
--    {PCI_CHIP_I946_GZ,		PCI_CHIP_I946_GZ,	NULL},
--    {PCI_CHIP_I965_GM,		PCI_CHIP_I965_GM,	NULL},
--    {PCI_CHIP_I965_GME,		PCI_CHIP_I965_GME,	NULL},
--    {PCI_CHIP_G33_G,		PCI_CHIP_G33_G,		NULL},
--    {PCI_CHIP_Q35_G,		PCI_CHIP_Q35_G,		NULL},
--    {PCI_CHIP_Q33_G,		PCI_CHIP_Q33_G,		NULL},
--    {PCI_CHIP_GM45_GM,		PCI_CHIP_GM45_GM,	NULL},
--    {PCI_CHIP_G45_E_G,		PCI_CHIP_G45_E_G,	NULL},
--    {PCI_CHIP_G45_G,		PCI_CHIP_G45_G,		NULL},
--    {PCI_CHIP_Q45_G,		PCI_CHIP_Q45_G,		NULL},
--    {PCI_CHIP_G41_G,		PCI_CHIP_G41_G,		NULL},
--    {PCI_CHIP_B43_G,		PCI_CHIP_B43_G,		NULL},
--    {PCI_CHIP_IRONLAKE_D_G,	PCI_CHIP_IRONLAKE_D_G,	NULL},
--    {PCI_CHIP_IRONLAKE_M_G,	PCI_CHIP_IRONLAKE_M_G,	NULL},
--    {PCI_CHIP_SANDYBRIDGE_GT1,	PCI_CHIP_SANDYBRIDGE_GT1,	NULL},
--    {PCI_CHIP_SANDYBRIDGE_GT2,	PCI_CHIP_SANDYBRIDGE_GT2,	NULL},
--    {PCI_CHIP_SANDYBRIDGE_GT2_PLUS,	PCI_CHIP_SANDYBRIDGE_GT2_PLUS,	NULL},
--    {PCI_CHIP_SANDYBRIDGE_M_GT1,	PCI_CHIP_SANDYBRIDGE_M_GT1,	NULL},
--    {PCI_CHIP_SANDYBRIDGE_M_GT2,	PCI_CHIP_SANDYBRIDGE_M_GT2,	NULL},
--    {PCI_CHIP_SANDYBRIDGE_M_GT2_PLUS,	PCI_CHIP_SANDYBRIDGE_M_GT2_PLUS, NULL},
--    {PCI_CHIP_SANDYBRIDGE_S_GT,		PCI_CHIP_SANDYBRIDGE_S_GT,	NULL},
--    {-1,				-1, NULL }
-+	INTEL_DEVICE_MATCH (PCI_CHIP_I810, &intel_i81x_info ),
-+	INTEL_DEVICE_MATCH (PCI_CHIP_I810_DC100, &intel_i81x_info ),
-+	INTEL_DEVICE_MATCH (PCI_CHIP_I810_E, &intel_i81x_info ),
-+	INTEL_DEVICE_MATCH (PCI_CHIP_I815, &intel_i81x_info ),
-+
-+	INTEL_DEVICE_MATCH (PCI_CHIP_I830_M, &intel_i8xx_info ),
-+	INTEL_DEVICE_MATCH (PCI_CHIP_845_G, &intel_i8xx_info ),
-+	INTEL_DEVICE_MATCH (PCI_CHIP_I854, &intel_i8xx_info ),
-+	INTEL_DEVICE_MATCH (PCI_CHIP_I855_GM, &intel_i8xx_info ),
-+	INTEL_DEVICE_MATCH (PCI_CHIP_I865_G, &intel_i8xx_info ),
-+
-+	INTEL_DEVICE_MATCH (PCI_CHIP_I915_G, &intel_i915_info ),
-+	INTEL_DEVICE_MATCH (PCI_CHIP_E7221_G, &intel_i915_info ),
-+	INTEL_DEVICE_MATCH (PCI_CHIP_I915_GM, &intel_i915_info ),
-+	INTEL_DEVICE_MATCH (PCI_CHIP_I945_G, &intel_i915_info ),
-+	INTEL_DEVICE_MATCH (PCI_CHIP_I945_GM, &intel_i915_info ),
-+	INTEL_DEVICE_MATCH (PCI_CHIP_I945_GME, &intel_i915_info ),
-+
-+	INTEL_DEVICE_MATCH (PCI_CHIP_PINEVIEW_M, &intel_g33_info ),
-+	INTEL_DEVICE_MATCH (PCI_CHIP_PINEVIEW_G, &intel_g33_info ),
-+	INTEL_DEVICE_MATCH (PCI_CHIP_G33_G, &intel_g33_info ),
-+	INTEL_DEVICE_MATCH (PCI_CHIP_Q33_G, &intel_g33_info ),
-+	/* Another marketing win: Q35 is another g33 device not a gen4 part
-+	 * like its G35 brethren.
-+	 */
-+	INTEL_DEVICE_MATCH (PCI_CHIP_Q35_G, &intel_g33_info ),
-+
-+	INTEL_DEVICE_MATCH (PCI_CHIP_I965_G, &intel_i965_info ),
-+	INTEL_DEVICE_MATCH (PCI_CHIP_G35_G, &intel_i965_info ),
-+	INTEL_DEVICE_MATCH (PCI_CHIP_I965_Q, &intel_i965_info ),
-+	INTEL_DEVICE_MATCH (PCI_CHIP_I946_GZ, &intel_i965_info ),
-+	INTEL_DEVICE_MATCH (PCI_CHIP_I965_GM, &intel_i965_info ),
-+	INTEL_DEVICE_MATCH (PCI_CHIP_I965_GME, &intel_i965_info ),
-+
-+	INTEL_DEVICE_MATCH (PCI_CHIP_GM45_GM, &intel_g4x_info ),
-+	INTEL_DEVICE_MATCH (PCI_CHIP_G45_E_G, &intel_g4x_info ),
-+	INTEL_DEVICE_MATCH (PCI_CHIP_G45_G, &intel_g4x_info ),
-+	INTEL_DEVICE_MATCH (PCI_CHIP_Q45_G, &intel_g4x_info ),
-+	INTEL_DEVICE_MATCH (PCI_CHIP_G41_G, &intel_g4x_info ),
-+	INTEL_DEVICE_MATCH (PCI_CHIP_B43_G, &intel_g4x_info ),
-+	INTEL_DEVICE_MATCH (PCI_CHIP_B43_G1, &intel_g4x_info ),
-+
-+	INTEL_DEVICE_MATCH (PCI_CHIP_IRONLAKE_D_G, &intel_ironlake_info ),
-+	INTEL_DEVICE_MATCH (PCI_CHIP_IRONLAKE_M_G, &intel_ironlake_info ),
-+
-+	INTEL_DEVICE_MATCH (PCI_CHIP_SANDYBRIDGE_GT1, &intel_sandybridge_info ),
-+	INTEL_DEVICE_MATCH (PCI_CHIP_SANDYBRIDGE_GT2, &intel_sandybridge_info ),
-+	INTEL_DEVICE_MATCH (PCI_CHIP_SANDYBRIDGE_GT2_PLUS, &intel_sandybridge_info ),
-+	INTEL_DEVICE_MATCH (PCI_CHIP_SANDYBRIDGE_M_GT1, &intel_sandybridge_info ),
-+	INTEL_DEVICE_MATCH (PCI_CHIP_SANDYBRIDGE_M_GT2, &intel_sandybridge_info ),
-+	INTEL_DEVICE_MATCH (PCI_CHIP_SANDYBRIDGE_M_GT2_PLUS, &intel_sandybridge_info ),
-+	INTEL_DEVICE_MATCH (PCI_CHIP_SANDYBRIDGE_S_GT, &intel_sandybridge_info ),
-+
-+	INTEL_DEVICE_MATCH (PCI_CHIP_IVYBRIDGE_M_GT1, &intel_ivybridge_info ),
-+	INTEL_DEVICE_MATCH (PCI_CHIP_IVYBRIDGE_M_GT2, &intel_ivybridge_info ),
-+	INTEL_DEVICE_MATCH (PCI_CHIP_IVYBRIDGE_D_GT1, &intel_ivybridge_info ),
-+	INTEL_DEVICE_MATCH (PCI_CHIP_IVYBRIDGE_D_GT2, &intel_ivybridge_info ),
-+	INTEL_DEVICE_MATCH (PCI_CHIP_IVYBRIDGE_S_GT1, &intel_ivybridge_info ),
-+
-+	{ 0, 0, 0 },
- };
- 
- void intel_detect_chipset(ScrnInfoPtr scrn,
- 			  struct pci_device *pci,
- 			  struct intel_chipset *chipset)
- {
--    uint32_t capid;
--
--    switch (DEVICE_ID(pci)) {
--    case PCI_CHIP_I810:
--	chipset->name = "i810";
--	chipset->info = &intel_i81x_info;
--	break;
--    case PCI_CHIP_I810_DC100:
--	chipset->name = "i810-dc100";
--	chipset->info = &intel_i81x_info;
--	break;
--    case PCI_CHIP_I810_E:
--	chipset->name = "i810e";
--	chipset->info = &intel_i81x_info;
--	break;
--    case PCI_CHIP_I815:
--	chipset->name = "i815";
--	chipset->info = &intel_i81x_info;
--	break;
--    case PCI_CHIP_I830_M:
--	chipset->name = "830M";
--	chipset->info = &intel_i8xx_info;
--	break;
--    case PCI_CHIP_845_G:
--	chipset->name = "845G";
--	chipset->info = &intel_i8xx_info;
--	break;
--    case PCI_CHIP_I854:
--	chipset->name = "854";
--	chipset->info = &intel_i8xx_info;
--	break;
--    case PCI_CHIP_I855_GM:
--	/* Check capid register to find the chipset variant */
--	pci_device_cfg_read_u32(pci, &capid, I85X_CAPID);
--	chipset->variant =
--	    (capid >> I85X_VARIANT_SHIFT) & I85X_VARIANT_MASK;
--	switch (chipset->variant) {
--	case I855_GM:
--	    chipset->name = "855GM";
--	    break;
--	case I855_GME:
--	    chipset->name = "855GME";
--	    break;
--	case I852_GM:
--	    chipset->name = "852GM";
--	    break;
--	case I852_GME:
--	    chipset->name = "852GME";
--	    break;
--	default:
--	    xf86DrvMsg(scrn->scrnIndex, X_INFO,
--		       "Unknown 852GM/855GM variant: 0x%x)\n",
--		       chipset->variant);
--	    chipset->name = "852GM/855GM (unknown variant)";
--	    break;
-+	int i;
-+
-+	chipset->info = chipset_info;
-+
-+	for (i = 0; intel_chipsets[i].name != NULL; i++) {
-+		if (DEVICE_ID(pci) == intel_chipsets[i].token) {
-+			chipset->name = intel_chipsets[i].name;
-+			break;
-+		}
-+	}
-+	if (intel_chipsets[i].name == NULL) {
-+		chipset->name = "unknown chipset";
- 	}
--	chipset->info = &intel_i8xx_info;
--	break;
--    case PCI_CHIP_I865_G:
--	chipset->name = "865G";
--	chipset->info = &intel_i8xx_info;
--	break;
--    case PCI_CHIP_I915_G:
--	chipset->name = "915G";
--	chipset->info = &intel_i915_info;
--	break;
--    case PCI_CHIP_E7221_G:
--	chipset->name = "E7221 (i915)";
--	chipset->info = &intel_i915_info;
--	break;
--    case PCI_CHIP_I915_GM:
--	chipset->name = "915GM";
--	chipset->info = &intel_i915_info;
--	break;
--    case PCI_CHIP_I945_G:
--	chipset->name = "945G";
--	chipset->info = &intel_i915_info;
--	break;
--    case PCI_CHIP_I945_GM:
--	chipset->name = "945GM";
--	chipset->info = &intel_i915_info;
--	break;
--    case PCI_CHIP_I945_GME:
--	chipset->name = "945GME";
--	chipset->info = &intel_i915_info;
--	break;
--    case PCI_CHIP_PINEVIEW_M:
--	chipset->name = "Pineview GM";
--	chipset->info = &intel_g33_info;
--	break;
--    case PCI_CHIP_PINEVIEW_G:
--	chipset->name = "Pineview G";
--	chipset->info = &intel_g33_info;
--	break;
--    case PCI_CHIP_I965_G:
--	chipset->name = "965G";
--	chipset->info = &intel_i965_info;
--	break;
--    case PCI_CHIP_G35_G:
--	chipset->name = "G35";
--	chipset->info = &intel_i965_info;
--	break;
--    case PCI_CHIP_I965_Q:
--	chipset->name = "965Q";
--	chipset->info = &intel_i965_info;
--	break;
--    case PCI_CHIP_I946_GZ:
--	chipset->name = "946GZ";
--	chipset->info = &intel_i965_info;
--	break;
--    case PCI_CHIP_I965_GM:
--	chipset->name = "965GM";
--	chipset->info = &intel_i965_info;
--	break;
--    case PCI_CHIP_I965_GME:
--	chipset->name = "965GME/GLE";
--	chipset->info = &intel_i965_info;
--	break;
--    case PCI_CHIP_G33_G:
--	chipset->name = "G33";
--	chipset->info = &intel_g33_info;
--	break;
--    case PCI_CHIP_Q35_G:
--	chipset->name = "Q35";
--	chipset->info = &intel_g33_info;
--	break;
--    case PCI_CHIP_Q33_G:
--	chipset->name = "Q33";
--	chipset->info = &intel_g33_info;
--	break;
--    case PCI_CHIP_GM45_GM:
--	chipset->name = "GM45";
--	chipset->info = &intel_g4x_info;
--	break;
--    case PCI_CHIP_G45_E_G:
--	chipset->name = "4 Series";
--	chipset->info = &intel_g4x_info;
--	break;
--    case PCI_CHIP_G45_G:
--	chipset->name = "G45/G43";
--	chipset->info = &intel_g4x_info;
--	break;
--    case PCI_CHIP_Q45_G:
--	chipset->name = "Q45/Q43";
--	chipset->info = &intel_g4x_info;
--	break;
--    case PCI_CHIP_G41_G:
--	chipset->name = "G41";
--	chipset->info = &intel_g4x_info;
--	break;
--    case PCI_CHIP_B43_G:
--	chipset->name = "B43";
--	chipset->info = &intel_g4x_info;
--	break;
--    case PCI_CHIP_IRONLAKE_D_G:
--	chipset->name = "Clarkdale";
--	chipset->info = &intel_ironlake_info;
--	break;
--    case PCI_CHIP_IRONLAKE_M_G:
--	chipset->name = "Arrandale";
--	chipset->info = &intel_ironlake_info;
--	break;
--    case PCI_CHIP_SANDYBRIDGE_GT1:
--    case PCI_CHIP_SANDYBRIDGE_GT2:
--    case PCI_CHIP_SANDYBRIDGE_GT2_PLUS:
--    case PCI_CHIP_SANDYBRIDGE_M_GT1:
--    case PCI_CHIP_SANDYBRIDGE_M_GT2:
--    case PCI_CHIP_SANDYBRIDGE_M_GT2_PLUS:
--    case PCI_CHIP_SANDYBRIDGE_S_GT:
--	chipset->name = "Sandybridge";
--	chipset->info = &intel_sandybridge_info;
--	break;
--    default:
--	chipset->name = "unknown chipset";
--	break;
--    }
--
--    xf86DrvMsg(scrn->scrnIndex, X_INFO,
--	       "Integrated Graphics Chipset: Intel(R) %s\n", chipset->name);
-+
-+	xf86DrvMsg(scrn->scrnIndex, X_INFO,
-+		   "Integrated Graphics Chipset: Intel(R) %s\n", chipset->name);
- }
- 
- /*
-@@ -404,30 +225,30 @@ void intel_detect_chipset(ScrnInfoPtr scrn,
-  */
- static void intel_identify(int flags)
- {
--    xf86PrintChipsets(INTEL_NAME,
--		      "Driver for Intel Integrated Graphics Chipsets",
--		      intel_chipsets);
-+	xf86PrintChipsets(INTEL_NAME,
-+			  "Driver for Intel Integrated Graphics Chipsets",
-+			  intel_chipsets);
- }
- 
- static Bool intel_driver_func(ScrnInfoPtr pScrn,
- 			      xorgDriverFuncOp op,
- 			      pointer ptr)
- {
--    xorgHWFlags *flag;
-+	xorgHWFlags *flag;
- 
--    switch (op) {
--    case GET_REQUIRED_HW_INTERFACES:
--	flag = (CARD32*)ptr;
-+	switch (op) {
-+	case GET_REQUIRED_HW_INTERFACES:
-+		flag = (CARD32*)ptr;
- #ifdef KMS_ONLY
--	(*flag) = 0;
-+		(*flag) = 0;
- #else
--	(*flag) = HW_IO | HW_MMIO;
-+		(*flag) = HW_IO | HW_MMIO;
- #endif
--	return TRUE;
--    default:
--	/* Unknown or deprecated function */
--	return FALSE;
--    }
-+		return TRUE;
-+	default:
-+		/* Unknown or deprecated function */
-+		return FALSE;
-+	}
- }
- 
- static Bool has_kernel_mode_setting(struct pci_device *dev)
-@@ -458,55 +279,65 @@ static Bool has_kernel_mode_setting(struct pci_device *dev)
-  * Setup the dispatch table for the rest of the driver functions.
-  *
-  */
--static Bool intel_pci_probe (DriverPtr		driver,
--			     int		entity_num,
--			     struct pci_device	*device,
--			     intptr_t		match_data)
-+static Bool intel_pci_probe(DriverPtr		driver,
-+			    int			entity_num,
-+			    struct pci_device	*device,
-+			    intptr_t		match_data)
- {
--    ScrnInfoPtr scrn;
-+	ScrnInfoPtr scrn;
-+	PciChipsets intel_pci_chipsets[ARRAY_SIZE(intel_chipsets)];
-+	int i;
-+
-+	chipset_info = (void *)match_data;
- 
--    if (!has_kernel_mode_setting(device)) {
-+	if (!has_kernel_mode_setting(device)) {
- #if KMS_ONLY
--	    return FALSE;
-+		return FALSE;
- #else
--	    switch (DEVICE_ID(device)) {
--	    case PCI_CHIP_I810:
--	    case PCI_CHIP_I810_DC100:
--	    case PCI_CHIP_I810_E:
--	    case PCI_CHIP_I815:
--		    break;
--	    default:
--		    return FALSE;
--	    }
-+		switch (DEVICE_ID(device)) {
-+		case PCI_CHIP_I810:
-+		case PCI_CHIP_I810_DC100:
-+		case PCI_CHIP_I810_E:
-+		case PCI_CHIP_I815:
-+			break;
-+		default:
-+			return FALSE;
-+		}
- #endif
--    }
-+	}
- 
--    scrn = xf86ConfigPciEntity(NULL, 0, entity_num, intel_pci_chipsets,
--			       NULL, NULL, NULL, NULL, NULL);
--    if (scrn != NULL) {
--	scrn->driverVersion = INTEL_VERSION;
--	scrn->driverName = INTEL_DRIVER_NAME;
--	scrn->name = INTEL_NAME;
--	scrn->Probe = NULL;
-+	for (i = 0; i < ARRAY_SIZE(intel_chipsets); i++) {
-+		intel_pci_chipsets[i].numChipset = intel_chipsets[i].token;
-+		intel_pci_chipsets[i].PCIid = intel_chipsets[i].token;
-+		intel_pci_chipsets[i].dummy = NULL;
-+	}
-+
-+	scrn = xf86ConfigPciEntity(NULL, 0, entity_num, intel_pci_chipsets,
-+				   NULL, NULL, NULL, NULL, NULL);
-+	if (scrn != NULL) {
-+		scrn->driverVersion = INTEL_VERSION;
-+		scrn->driverName = INTEL_DRIVER_NAME;
-+		scrn->name = INTEL_NAME;
-+		scrn->Probe = NULL;
- 
- #if KMS_ONLY
--	intel_init_scrn(scrn);
-+		intel_init_scrn(scrn);
- #else
--	switch (DEVICE_ID(device)) {
--	case PCI_CHIP_I810:
--	case PCI_CHIP_I810_DC100:
--	case PCI_CHIP_I810_E:
--	case PCI_CHIP_I815:
--	    lg_i810_init(scrn);
--	    break;
--
--	default:
--	    intel_init_scrn(scrn);
--	    break;
--	}
-+		switch (DEVICE_ID(device)) {
-+		case PCI_CHIP_I810:
-+		case PCI_CHIP_I810_DC100:
-+		case PCI_CHIP_I810_E:
-+		case PCI_CHIP_I815:
-+			lg_i810_init(scrn);
-+			break;
-+
-+		default:
-+			intel_init_scrn(scrn);
-+			break;
-+		}
- #endif
--    }
--    return scrn != NULL;
-+	}
-+	return scrn != NULL;
- }
- 
- #ifdef XFree86LOADER
-@@ -514,16 +345,16 @@ static Bool intel_pci_probe (DriverPtr		driver,
- static MODULESETUPPROTO(intel_setup);
- 
- static XF86ModuleVersionInfo intel_version = {
--    "intel",
--    MODULEVENDORSTRING,
--    MODINFOSTRING1,
--    MODINFOSTRING2,
--    XORG_VERSION_CURRENT,
--    INTEL_VERSION_MAJOR, INTEL_VERSION_MINOR, INTEL_VERSION_PATCH,
--    ABI_CLASS_VIDEODRV,
--    ABI_VIDEODRV_VERSION,
--    MOD_CLASS_VIDEODRV,
--    {0, 0, 0, 0}
-+	"intel",
-+	MODULEVENDORSTRING,
-+	MODINFOSTRING1,
-+	MODINFOSTRING2,
-+	XORG_VERSION_CURRENT,
-+	INTEL_VERSION_MAJOR, INTEL_VERSION_MINOR, INTEL_VERSION_PATCH,
-+	ABI_CLASS_VIDEODRV,
-+	ABI_VIDEODRV_VERSION,
-+	MOD_CLASS_VIDEODRV,
-+	{0, 0, 0, 0}
- };
- 
- static const OptionInfoRec *
-@@ -546,16 +377,16 @@ intel_available_options(int chipid, int busid)
- }
- 
- static DriverRec intel = {
--    INTEL_VERSION,
--    INTEL_DRIVER_NAME,
--    intel_identify,
--    NULL,
--    intel_available_options,
--    NULL,
--    0,
--    intel_driver_func,
--    intel_device_match,
--    intel_pci_probe
-+	INTEL_VERSION,
-+	INTEL_DRIVER_NAME,
-+	intel_identify,
-+	NULL,
-+	intel_available_options,
-+	NULL,
-+	0,
-+	intel_driver_func,
-+	intel_device_match,
-+	intel_pci_probe
- };
- 
- static pointer intel_setup(pointer module,
-@@ -563,24 +394,24 @@ static pointer intel_setup(pointer module,
- 			   int *errmaj,
- 			   int *errmin)
- {
--    static Bool setupDone = 0;
--
--    /* This module should be loaded only once, but check to be sure.
--    */
--    if (!setupDone) {
--	setupDone = 1;
--	xf86AddDriver(&intel, module, HaveDriverFuncs);
--
--	/*
--	 * The return value must be non-NULL on success even though there
--	 * is no TearDownProc.
--	 */
--	return (pointer) 1;
--    } else {
--	if (errmaj)
--	    *errmaj = LDR_ONCEONLY;
--	return NULL;
--    }
-+	static Bool setupDone = 0;
-+
-+	/* This module should be loaded only once, but check to be sure.
-+	*/
-+	if (!setupDone) {
-+		setupDone = 1;
-+		xf86AddDriver(&intel, module, HaveDriverFuncs);
-+
-+		/*
-+		 * The return value must be non-NULL on success even though there
-+		 * is no TearDownProc.
-+		 */
-+		return (pointer) 1;
-+	} else {
-+		if (errmaj)
-+			*errmaj = LDR_ONCEONLY;
-+		return NULL;
-+	}
- }
- 
- _X_EXPORT XF86ModuleData intelModuleData = { &intel_version, intel_setup, NULL };
-diff --git a/src/intel_video.c b/src/intel_video.c
-index 499614f..021ca5f 100644
---- a/src/intel_video.c
-+++ b/src/intel_video.c
-@@ -1599,6 +1599,7 @@ I830PutImageTextured(ScrnInfoPtr scrn,
- 					 pixmap);
- 	}
- 
-+	intel_get_screen_private(scrn)->needs_flush = TRUE;
- 	DamageDamageRegion(drawable, clipBoxes);
- 
- 	return Success;



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