[arch-commits] Commit in valgrind/trunk (3 files)
Anatol Pomozov
anatolik at archlinux.org
Thu Sep 11 15:44:06 UTC 2014
Date: Thursday, September 11, 2014 @ 17:44:06
Author: anatolik
Revision: 221430
upgpkg: valgrind 3.10.0-1
Modified:
valgrind/trunk/PKGBUILD
Deleted:
valgrind/trunk/add_bnd_prefix_support.patch
valgrind/trunk/add_xabort_op.patch
------------------------------+
PKGBUILD | 16 --
add_bnd_prefix_support.patch | 234 -----------------------------------------
add_xabort_op.patch | 37 ------
3 files changed, 5 insertions(+), 282 deletions(-)
Modified: PKGBUILD
===================================================================
--- PKGBUILD 2014-09-11 13:14:07 UTC (rev 221429)
+++ PKGBUILD 2014-09-11 15:44:06 UTC (rev 221430)
@@ -3,8 +3,8 @@
# Maintainer: Allan McRae <allan at archlinux.org>
pkgname=valgrind
-pkgver=3.9.0
-pkgrel=7
+pkgver=3.10.0
+pkgrel=1
pkgdesc='A tool to help find memory-management problems in programs'
arch=(i686 x86_64)
license=(GPL)
@@ -14,19 +14,13 @@
optdepends=('openmpi: MPI support')
options=('staticlibs' '!emptydirs')
source=(http://valgrind.org/downloads/$pkgname-$pkgver.tar.bz2
- valgrind-3.9.0-glibc-2.20.patch
- add_xabort_op.patch
- add_bnd_prefix_support.patch)
-sha1sums=('9415e28933de9d6687f993c4bb797e6bd49583f1'
- '2080c3d44de20857f18b03a93404a8f3d3721f7e'
- '34e90bb5e6355fea796952de7cb270b49567874d'
- '074b60ab54ed9ff502660a9b544ff31303358a29')
+ valgrind-3.9.0-glibc-2.20.patch)
+sha1sums=('aec0b8cd042ec36c8cce4f6027b98627ab202f26'
+ '2080c3d44de20857f18b03a93404a8f3d3721f7e')
prepare() {
cd $pkgname-$pkgver
patch -p1 -i "$srcdir"/valgrind-3.9.0-glibc-2.20.patch
- patch -p0 -i "$srcdir"/add_xabort_op.patch # FS#41696
- patch -p0 -i "$srcdir"/add_bnd_prefix_support.patch
}
build() {
Deleted: add_bnd_prefix_support.patch
===================================================================
--- add_bnd_prefix_support.patch 2014-09-11 13:14:07 UTC (rev 221429)
+++ add_bnd_prefix_support.patch 2014-09-11 15:44:06 UTC (rev 221430)
@@ -1,234 +0,0 @@
-------------------------------------------------------------------------
-r2858 | mjw | 2014-05-09 04:41:06 -0700 (Fri, 09 May 2014) | 6 lines
-
-Recognize MPX instructions and bnd prefix. Bug #333666.
-
-Recognize and parse operands of new MPX instructions BNDMK, BNDCL,
-BNDCU, BNDCN, BNDMOV, BNDLDX and BNDSTX. Also recognize bnd (F2) prefix
-for CALL (E8,FF/2), RET (C2,C3), JMP (EB,E9,FF/4) and Jcc (70-7F,0F 80-8F).
-All new MPX instructions are currently NOPs and the bnd prefix is ignored.
-
-
-Index: VEX/priv/guest_amd64_toIR.c
-===================================================================
---- VEX/priv/guest_amd64_toIR.c (revision 2857)
-+++ VEX/priv/guest_amd64_toIR.c (revision 2858)
-@@ -767,10 +767,10 @@
- return toBool( ! haveNo66noF2noF3(pfx) );
- }
-
--/* Return True iff pfx has 66 or F2 set */
--static Bool have66orF2 ( Prefix pfx )
-+/* Return True iff pfx has 66 or F3 set */
-+static Bool have66orF3 ( Prefix pfx )
- {
-- return toBool((pfx & (PFX_66|PFX_F2)) > 0);
-+ return toBool((pfx & (PFX_66|PFX_F3)) > 0);
- }
-
- /* Clear all the segment-override bits in a prefix. */
-@@ -4266,8 +4266,12 @@
-
- modrm = getUChar(delta);
- if (epartIsReg(modrm)) {
-- /* F2/XACQ and F3/XREL are always invalid in the non-mem case. */
-- if (haveF2orF3(pfx)) goto unhandledR;
-+ /* F2/XACQ and F3/XREL are always invalid in the non-mem case.
-+ F2/CALL and F2/JMP may have bnd prefix. */
-+ if (haveF2orF3(pfx)
-+ && ! (haveF2(pfx)
-+ && (gregLO3ofRM(modrm) == 2 || gregLO3ofRM(modrm) == 4)))
-+ goto unhandledR;
- assign(t1, getIRegE(sz,pfx,modrm));
- switch (gregLO3ofRM(modrm)) {
- case 0: /* INC */
-@@ -4287,6 +4291,7 @@
- case 2: /* call Ev */
- /* Ignore any sz value and operate as if sz==8. */
- if (!(sz == 4 || sz == 8)) goto unhandledR;
-+ if (haveF2(pfx)) DIP("bnd ; "); /* MPX bnd prefix. */
- sz = 8;
- t3 = newTemp(Ity_I64);
- assign(t3, getIRegE(sz,pfx,modrm));
-@@ -4302,6 +4307,7 @@
- case 4: /* jmp Ev */
- /* Ignore any sz value and operate as if sz==8. */
- if (!(sz == 4 || sz == 8)) goto unhandledR;
-+ if (haveF2(pfx)) DIP("bnd ; "); /* MPX bnd prefix. */
- sz = 8;
- t3 = newTemp(Ity_I64);
- assign(t3, getIRegE(sz,pfx,modrm));
-@@ -4334,11 +4340,14 @@
- showSz ? nameISize(sz) : ' ',
- nameIRegE(sz, pfx, modrm));
- } else {
-- /* Decide if F2/XACQ or F3/XREL might be valid. */
-+ /* Decide if F2/XACQ, F3/XREL, F2/CALL or F2/JMP might be valid. */
- Bool validF2orF3 = haveF2orF3(pfx) ? False : True;
- if ((gregLO3ofRM(modrm) == 0/*INC*/ || gregLO3ofRM(modrm) == 1/*DEC*/)
- && haveF2orF3(pfx) && !haveF2andF3(pfx) && haveLOCK(pfx)) {
- validF2orF3 = True;
-+ } else if ((gregLO3ofRM(modrm) == 2 || gregLO3ofRM(modrm) == 4)
-+ && (haveF2(pfx) && !haveF3(pfx))) {
-+ validF2orF3 = True;
- }
- if (!validF2orF3) goto unhandledM;
- /* */
-@@ -4375,6 +4384,7 @@
- case 2: /* call Ev */
- /* Ignore any sz value and operate as if sz==8. */
- if (!(sz == 4 || sz == 8)) goto unhandledM;
-+ if (haveF2(pfx)) DIP("bnd ; "); /* MPX bnd prefix. */
- sz = 8;
- t3 = newTemp(Ity_I64);
- assign(t3, loadLE(Ity_I64,mkexpr(addr)));
-@@ -4390,6 +4400,7 @@
- case 4: /* JMP Ev */
- /* Ignore any sz value and operate as if sz==8. */
- if (!(sz == 4 || sz == 8)) goto unhandledM;
-+ if (haveF2(pfx)) DIP("bnd ; "); /* MPX bnd prefix. */
- sz = 8;
- t3 = newTemp(Ity_I64);
- assign(t3, loadLE(Ity_I64,mkexpr(addr)));
-@@ -19716,7 +19727,8 @@
- case 0x7F: { /* JGb/JNLEb (jump greater) */
- Long jmpDelta;
- const HChar* comment = "";
-- if (haveF2orF3(pfx)) goto decode_failure;
-+ if (haveF3(pfx)) goto decode_failure;
-+ if (haveF2(pfx)) DIP("bnd ; "); /* MPX bnd prefix. */
- jmpDelta = getSDisp8(delta);
- vassert(-128 <= jmpDelta && jmpDelta < 128);
- d64 = (guest_RIP_bbstart+delta+1) + jmpDelta;
-@@ -20369,7 +20381,8 @@
- }
-
- case 0xC2: /* RET imm16 */
-- if (have66orF2orF3(pfx)) goto decode_failure;
-+ if (have66orF3(pfx)) goto decode_failure;
-+ if (haveF2(pfx)) DIP("bnd ; "); /* MPX bnd prefix. */
- d64 = getUDisp16(delta);
- delta += 2;
- dis_ret(dres, vbi, d64);
-@@ -20377,8 +20390,9 @@
- return delta;
-
- case 0xC3: /* RET */
-- if (have66orF2(pfx)) goto decode_failure;
-+ if (have66(pfx)) goto decode_failure;
- /* F3 is acceptable on AMD. */
-+ if (haveF2(pfx)) DIP("bnd ; "); /* MPX bnd prefix. */
- dis_ret(dres, vbi, 0);
- DIP(haveF3(pfx) ? "rep ; ret\n" : "ret\n");
- return delta;
-@@ -20782,7 +20796,8 @@
- }
-
- case 0xE8: /* CALL J4 */
-- if (haveF2orF3(pfx)) goto decode_failure;
-+ if (haveF3(pfx)) goto decode_failure;
-+ if (haveF2(pfx)) DIP("bnd ; "); /* MPX bnd prefix. */
- d64 = getSDisp32(delta); delta += 4;
- d64 += (guest_RIP_bbstart+delta);
- /* (guest_RIP_bbstart+delta) == return-to addr, d64 == call-to addr */
-@@ -20805,9 +20820,10 @@
- return delta;
-
- case 0xE9: /* Jv (jump, 16/32 offset) */
-- if (haveF2orF3(pfx)) goto decode_failure;
-+ if (haveF3(pfx)) goto decode_failure;
- if (sz != 4)
- goto decode_failure; /* JRS added 2004 July 11 */
-+ if (haveF2(pfx)) DIP("bnd ; "); /* MPX bnd prefix. */
- d64 = (guest_RIP_bbstart+delta+sz) + getSDisp(sz,delta);
- delta += sz;
- if (resteerOkFn(callback_opaque,d64)) {
-@@ -20821,9 +20837,10 @@
- return delta;
-
- case 0xEB: /* Jb (jump, byte offset) */
-- if (haveF2orF3(pfx)) goto decode_failure;
-+ if (haveF3(pfx)) goto decode_failure;
- if (sz != 4)
- goto decode_failure; /* JRS added 2004 July 11 */
-+ if (haveF2(pfx)) DIP("bnd ; "); /* MPX bnd prefix. */
- d64 = (guest_RIP_bbstart+delta+1) + getSDisp8(delta);
- delta++;
- if (resteerOkFn(callback_opaque,d64)) {
-@@ -21241,7 +21258,8 @@
- case 0x8F: { /* JGb/JNLEb (jump greater) */
- Long jmpDelta;
- const HChar* comment = "";
-- if (haveF2orF3(pfx)) goto decode_failure;
-+ if (haveF3(pfx)) goto decode_failure;
-+ if (haveF2(pfx)) DIP("bnd ; "); /* MPX bnd prefix. */
- jmpDelta = getSDisp32(delta);
- d64 = (guest_RIP_bbstart+delta+4) + jmpDelta;
- delta += 4;
-@@ -21332,6 +21350,66 @@
- }
- return delta;
-
-+ case 0x1A:
-+ case 0x1B: { /* Future MPX instructions, currently NOPs.
-+ BNDMK b, m F3 0F 1B
-+ BNDCL b, r/m F3 0F 1A
-+ BNDCU b, r/m F2 0F 1A
-+ BNDCN b, r/m F2 0F 1B
-+ BNDMOV b, b/m 66 0F 1A
-+ BNDMOV b/m, b 66 0F 1B
-+ BNDLDX b, mib 0F 1A
-+ BNDSTX mib, b 0F 1B */
-+
-+ /* All instructions have two operands. One operand is always the
-+ bnd register number (bnd0-bnd3, other register numbers are
-+ ignored when MPX isn't enabled, but should generate an
-+ exception if MPX is enabled) given by gregOfRexRM. The other
-+ operand is either a ModRM:reg, ModRM:r/m or a SIB encoded
-+ address, all of which can be decoded by using either
-+ eregOfRexRM or disAMode. */
-+
-+ modrm = getUChar(delta);
-+ int bnd = gregOfRexRM(pfx,modrm);
-+ const HChar *oper;
-+ if (epartIsReg(modrm)) {
-+ oper = nameIReg64 (eregOfRexRM(pfx,modrm));
-+ delta += 1;
-+ } else {
-+ addr = disAMode ( &alen, vbi, pfx, delta, dis_buf, 0 );
-+ delta += alen;
-+ oper = dis_buf;
-+ }
-+
-+ if (haveF3no66noF2 (pfx)) {
-+ if (opc == 0x1B) {
-+ DIP ("bndmk %s, %%bnd%d\n", oper, bnd);
-+ } else /* opc == 0x1A */ {
-+ DIP ("bndcl %s, %%bnd%d\n", oper, bnd);
-+ }
-+ } else if (haveF2no66noF3 (pfx)) {
-+ if (opc == 0x1A) {
-+ DIP ("bndcu %s, %%bnd%d\n", oper, bnd);
-+ } else /* opc == 0x1B */ {
-+ DIP ("bndcn %s, %%bnd%d\n", oper, bnd);
-+ }
-+ } else if (have66noF2noF3 (pfx)) {
-+ if (opc == 0x1A) {
-+ DIP ("bndmov %s, %%bnd%d\n", oper, bnd);
-+ } else /* opc == 0x1B */ {
-+ DIP ("bndmov %%bnd%d, %s\n", bnd, oper);
-+ }
-+ } else if (haveNo66noF2noF3 (pfx)) {
-+ if (opc == 0x1A) {
-+ DIP ("bndldx %s, %%bnd%d\n", oper, bnd);
-+ } else /* opc == 0x1B */ {
-+ DIP ("bndstx %%bnd%d, %s\n", bnd, oper);
-+ }
-+ } else goto decode_failure;
-+
-+ return delta;
-+ }
-+
- case 0xA2: { /* CPUID */
- /* Uses dirty helper:
- void amd64g_dirtyhelper_CPUID ( VexGuestAMD64State* )
Deleted: add_xabort_op.patch
===================================================================
--- add_xabort_op.patch 2014-09-11 13:14:07 UTC (rev 221429)
+++ add_xabort_op.patch 2014-09-11 15:44:06 UTC (rev 221430)
@@ -1,37 +0,0 @@
-r2800 | mjw | 2013-12-09 04:54:06 -0800 (Mon, 09 Dec 2013) | 4 lines
-
-Bug 328100 - XABORT not implemented.
-
-XABORT can be called even when there is no current transaction.
-In such a case XABORT acts as a NOP. Implement xabort as nop.
-
-Index: VEX/priv/guest_amd64_toIR.c
-===================================================================
---- VEX/priv/guest_amd64_toIR.c (revision 2799)
-+++ VEX/priv/guest_amd64_toIR.c (revision 2800)
-@@ -20251,7 +20251,7 @@
- return delta;
- }
- /* BEGIN HACKY SUPPORT FOR xbegin */
-- if (modrm == 0xF8 && !have66orF2orF3(pfx) && sz == 4
-+ if (opc == 0xC7 && modrm == 0xF8 && !have66orF2orF3(pfx) && sz == 4
- && (archinfo->hwcaps & VEX_HWCAPS_AMD64_AVX)) {
- delta++; /* mod/rm byte */
- d64 = getSDisp(4,delta);
-@@ -20270,6 +20270,16 @@
- return delta;
- }
- /* END HACKY SUPPORT FOR xbegin */
-+ /* BEGIN HACKY SUPPORT FOR xabort */
-+ if (opc == 0xC6 && modrm == 0xF8 && !have66orF2orF3(pfx) && sz == 1
-+ && (archinfo->hwcaps & VEX_HWCAPS_AMD64_AVX)) {
-+ delta++; /* mod/rm byte */
-+ abyte = getUChar(delta); delta++;
-+ /* There is never a real transaction in progress, so do nothing. */
-+ DIP("xabort $%d", (Int)abyte);
-+ return delta;
-+ }
-+ /* END HACKY SUPPORT FOR xabort */
- goto decode_failure;
-
- case 0xC8: /* ENTER */
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