[arch-commits] Commit in valgrind/trunk (6 files)
Levente Polyak
anthraxx at archlinux.org
Thu Dec 21 19:35:28 UTC 2017
Date: Thursday, December 21, 2017 @ 19:35:27
Author: anthraxx
Revision: 313500
upgpkg: valgrind 3.13.0-5 (openmpi 3.0.0 rebuild + XML socket fixing)
fxies XML socket FS#55571
Added:
valgrind/trunk/valgrind-3.13.0-amd64-eflags-tests.patch
valgrind/trunk/valgrind-3.13.0-gdb-8-testfix.patch
valgrind/trunk/valgrind-3.13.0-test-fixes.patch
valgrind/trunk/valgrind-3.7.0-respect-flags.patch
valgrind/trunk/valgrind-fix-xml-socket.patch
Modified:
valgrind/trunk/PKGBUILD
------------------------------------------+
PKGBUILD | 107 +
valgrind-3.13.0-amd64-eflags-tests.patch | 2104 +++++++++++++++++++++++++++++
valgrind-3.13.0-gdb-8-testfix.patch | 183 ++
valgrind-3.13.0-test-fixes.patch | 29
valgrind-3.7.0-respect-flags.patch | 13
valgrind-fix-xml-socket.patch | 11
6 files changed, 2428 insertions(+), 19 deletions(-)
Modified: PKGBUILD
===================================================================
--- PKGBUILD 2017-12-21 18:41:56 UTC (rev 313499)
+++ PKGBUILD 2017-12-21 19:35:27 UTC (rev 313500)
@@ -1,25 +1,50 @@
-# $Id$
-# Maintainer: Dan McGee <dan at archlinux.org>
-# Maintainer: Allan McRae <allan at archlinux.org>
+# Maintainer: Levente Polyak <anthraxx[at]archlinux[dot]org>
+# Contributor: Dan McGee <dan at archlinux.org>
+# Contributor: Allan McRae <allan at archlinux.org>
pkgname=valgrind
pkgver=3.13.0
-pkgrel=4
-pkgdesc='A tool to help find memory-management problems in programs'
-arch=(x86_64)
-license=(GPL)
+pkgrel=5
+pkgdesc='Tool to help find memory-management problems in programs'
+arch=('x86_64')
+license=('GPL')
url='http://valgrind.org/'
-depends=('glibc=2.26' 'lib32-glibc=2.26' perl)
-makedepends=(gdb openmpi lib32-glibc)
+depends=('glibc=2.26' 'perl')
+makedepends=('gdb' 'openmpi' 'lib32-glibc' 'lib32-gcc-libs')
+checkdepends=('procps-ng')
optdepends=('openmpi: MPI support'
'lib32-glibc: 32-bit ABI support')
-provides=($pkgname-multilib)
-replaces=($pkgname-multilib)
-options=(!emptydirs)
-source=("https://ftp.gwdg.de/pub/linux/sources.redhat.com/$pkgname/$pkgname-$pkgver.tar.bz2")
-md5sums=('817dd08f1e8a66336b9ff206400a5369')
-sha512sums=('34e1013cd3815d30a459b86220e871bb0a6209cc9e87af968f347083693779f022e986f211bdf1a5184ad7370cde12ff2cfca8099967ff94732970bd04a97009')
+provides=('valgrind-multilib')
+replaces=('valgrind-multilib')
+options=('!emptydirs')
+source=(https://sourceware.org/pub/valgrind/valgrind-${pkgver}.tar.bz2
+ valgrind-fix-xml-socket.patch
+ valgrind-3.13.0-test-fixes.patch
+ valgrind-3.13.0-amd64-eflags-tests.patch
+ valgrind-3.13.0-gdb-8-testfix.patch
+ valgrind-3.7.0-respect-flags.patch)
+md5sums=('817dd08f1e8a66336b9ff206400a5369'
+ '0b13c1a080260497e6159bef4401ac1a'
+ '183a51089321fcf117f0f723e8e1940a'
+ '47728e356bb24a34eae52e932dd56c9f'
+ '02ce4a4f96b2dd649b36a7b8b19bd9d1'
+ '470d9881870aacc210b7a6efb64cc9a9')
+sha512sums=('34e1013cd3815d30a459b86220e871bb0a6209cc9e87af968f347083693779f022e986f211bdf1a5184ad7370cde12ff2cfca8099967ff94732970bd04a97009'
+ '610c1e74a38d5e56a41eb59b25709ad40840e8c50d0d30bea20e9959cd65b99ae44626baf8a77505e5cd2ce70d120ae429a6861165546771395b00e534c3296b'
+ '1cff77e987e2d20ce1563c96d76431c60c142c42afa978e32d3a8c8dda17d0f3c1ba29fe3d0fcf0e7445fa5ca9558690ecdaad259fb9d23f435dcdc0baa9175d'
+ '5cb1643a8eab47ba2daa1438c50f1d29457d5aef69b6902fe3f1c72176ffa82d8048aac03ebc060ab6510cb8f59a9d41cfa1b80cf9661204b54120ee1961a607'
+ 'd993b7af3debdbae1e0d997f8fe47a01f83975575a125bee425dfe6f474c6ec72a0c5252e88a762cc4e866dfcb2cb1bf5bab9fead8fb5393faf049fb4aefba4f'
+ 'e0cec39381cefeca09ae4794cca309dfac7c8693e6315e137e64f5c33684598726d41cfbb4edf764fe985503b13ff596184ca5fc32b159d500ec092e4cf8838c')
+prepare() {
+ cd ${pkgname}-${pkgver}
+ patch -Np1 < ../valgrind-3.7.0-respect-flags.patch
+ patch -Np1 < ../valgrind-3.13.0-test-fixes.patch
+ patch -Np1 < ../valgrind-3.13.0-amd64-eflags-tests.patch
+ patch -Np1 < ../valgrind-3.13.0-gdb-8-testfix.patch
+ patch -Np1 < ../valgrind-fix-xml-socket.patch
+}
+
build() {
# valgrind does not like stack protector flags
CPPFLAGS=${CPPFLAGS/-D_FORTIFY_SOURCE=2/}
@@ -26,12 +51,56 @@
CFLAGS=${CFLAGS/-fstack-protector-strong/}
CXXFLAGS=${CXXFLAGS/-fstack-protector-strong/}
- cd $pkgname-$pkgver
- ./configure --prefix=/usr --mandir=/usr/share/man --with-mpicc=mpicc
+ cd ${pkgname}-${pkgver}
+ ./configure \
+ --prefix=/usr \
+ --mandir=/usr/share/man \
+ --with-mpicc=mpicc
make
}
+check() {
+ cd ${pkgname}-${pkgver}
+
+ # Make sure a basic binary runs. There should be no errors.
+ ./vg-in-place --error-exitcode=1 /bin/true
+
+ # Make sure no extra CFLAGS, CXXFLAGS or LDFLAGS leak through,
+ # the testsuite sets all flags necessary. See also configure above.
+ make check CFLAGS="" CXXFLAGS="" LDFLAGS=""
+
+ # XXX: run full regtest but only report issues some tests fail duo
+ # current toolchain and expectations, take a manual look if its fine
+ echo ===============TESTING===================
+ make regtest || :
+
+ # Make sure test failures show up in build.log
+ # Gather up the diffs (at most the first 20 lines for each one)
+ MAX_LINES=20
+ diff_files=$(find . -name '*.diff' | sort)
+ if [ z"${diff_files}" = z ] ; then
+ echo "Congratulations, all tests passed!"
+ else
+ warning "Some tests failed!"
+ for f in ${diff_files} ; do
+ echo "=================================================" >> diffs
+ echo "${f}" >> diffs
+ echo "=================================================" >> diffs
+ if [ "$(wc -l < "${f}")" -le ${MAX_LINES} ] ; then
+ cat "${f}" >> diffs
+ else
+ head -n ${MAX_LINES} "${f}" >> diffs
+ echo "<truncated beyond ${MAX_LINES} lines>" >> diffs
+ fi
+ done
+ fi
+ cat diffs
+ echo ===============END TESTING===============
+}
+
package() {
- cd $pkgname-$pkgver
- make DESTDIR="$pkgdir" install
+ cd ${pkgname}-${pkgver}
+ make DESTDIR="${pkgdir}" install
}
+
+# vim: ts=2 sw=2 et:
Added: valgrind-3.13.0-amd64-eflags-tests.patch
===================================================================
--- valgrind-3.13.0-amd64-eflags-tests.patch (rev 0)
+++ valgrind-3.13.0-amd64-eflags-tests.patch 2017-12-21 19:35:27 UTC (rev 313500)
@@ -0,0 +1,2104 @@
+commit 4c8c3af18adc0a202d0e342b8ca3731a5b724a1d
+Author: Tom Hughes <tom at compton.nu>
+Date: Wed Aug 30 19:26:37 2017 +0100
+
+ Fix eflags handling in amd64 instruction tests
+
+ In 64 bit mode there's no way to just save eflags so we save the
+ whole of rflags but we were doing so to a 32 bit variable!
+
+ Replace that with proper rflags support that knows it is dealing
+ with the full 64 bit flags word in 64 bit mode.
+
+diff --git a/none/tests/amd64/gen_insn_test.pl b/none/tests/amd64/gen_insn_test.pl
+index 863e560..a144ec4 100644
+--- a/none/tests/amd64/gen_insn_test.pl
++++ b/none/tests/amd64/gen_insn_test.pl
+@@ -16,7 +16,7 @@ our %ArgTypes = (
+ m32 => "reg32_t",
+ m64 => "reg64_t",
+ m128 => "reg128_t",
+- eflags => "reg32_t",
++ rflags => "reg64_t",
+ st => "reg64_t",
+ fpucw => "reg16_t",
+ fpusw => "reg16_t"
+@@ -222,8 +222,8 @@ while (<>)
+
+ my @presets;
+ my $presetc = 0;
+- my $eflagsmask;
+- my $eflagsset;
++ my $rflagsmask;
++ my $rflagsset;
+ my $fpucwmask;
+ my $fpucwset;
+ my $fpuswmask;
+@@ -305,7 +305,7 @@ while (<>)
+
+ $presetc++;
+ }
+- elsif ($preset =~ /^(eflags)\[([^\]]+)\]$/)
++ elsif ($preset =~ /^(rflags)\[([^\]]+)\]$/)
+ {
+ my $type = $1;
+ my @values = split(/,/, $2);
+@@ -313,8 +313,8 @@ while (<>)
+ $values[0] = oct($values[0]) if $values[0] =~ /^0/;
+ $values[1] = oct($values[1]) if $values[1] =~ /^0/;
+
+- $eflagsmask = sprintf "0x%08x", $values[0] ^ 0xffffffff;
+- $eflagsset = sprintf "0x%08x", $values[1];
++ $rflagsmask = sprintf "0x%016x", ~$values[0];
++ $rflagsset = sprintf "0x%016x", $values[1];
+ }
+ elsif ($preset =~ /^(fpucw)\[([^\]]+)\]$/)
+ {
+@@ -544,7 +544,7 @@ while (<>)
+
+ print qq| $ArgTypes{$type} $name;\n|;
+ }
+- elsif ($result =~ /^eflags\[([^\]]+)\]$/)
++ elsif ($result =~ /^rflags\[([^\]]+)\]$/)
+ {
+ my @values = split(/,/, $1);
+
+@@ -553,19 +553,19 @@ while (<>)
+
+ my $result = {
+ name => $name,
+- type => "eflags",
+- subtype => "ud",
+- values => [ map { sprintf "0x%08x", $_ } @values ]
++ type => "rflags",
++ subtype => "uq",
++ values => [ map { sprintf "0x%016x", $_ } @values ]
+ };
+
+ push @results, $result;
+
+- print qq| $ArgTypes{eflags} $name;\n|;
++ print qq| $ArgTypes{rflags} $name;\n|;
+
+- if (!defined($eflagsmask) && !defined($eflagsset))
++ if (!defined($rflagsmask) && !defined($rflagsset))
+ {
+- $eflagsmask = sprintf "0x%08x", $values[0] ^ 0xffffffff;
+- $eflagsset = sprintf "0x%08x", $values[0] & ~$values[1];
++ $rflagsmask = sprintf "0x%016x", ~$values[0];
++ $rflagsset = sprintf "0x%016x", $values[0] & ~$values[1];
+ }
+ }
+ elsif ($result =~ /^fpucw\[([^\]]+)\]$/)
+@@ -722,12 +722,11 @@ while (<>)
+ }
+ }
+
+- if (defined($eflagsmask) || defined($eflagsset))
++ if (defined($rflagsmask) || defined($rflagsset))
+ {
+ print qq| \"pushfq\\n\"\n|;
+- print qq| \"andl \$$eflagsmask, (%%rsp)\\n\"\n| if defined($eflagsmask);
+- print qq| \"andl \$0, 4(%%rsp)\\n\"\n| if defined($eflagsmask);
+- print qq| \"orq \$$eflagsset, (%%rsp)\\n\"\n| if defined($eflagsset);
++ print qq| \"andq \$$rflagsmask, (%%rsp)\\n\"\n| if defined($rflagsmask);
++ print qq| \"orq \$$rflagsset, (%%rsp)\\n\"\n| if defined($rflagsset);
+ print qq| \"popfq\\n\"\n|;
+ }
+
+@@ -747,7 +746,7 @@ while (<>)
+
+ foreach my $arg (@args)
+ {
+- next if $arg->{type} eq "eflags";
++ next if $arg->{type} eq "rflags";
+
+ if ($arg->{type} =~ /^(r8|r16|r32|r64|mm|xmm)$/)
+ {
+@@ -815,7 +814,7 @@ while (<>)
+ {
+ $fpresults[$RegNums{$result->{register}}] = $result;
+ }
+- elsif ($result->{type} eq "eflags")
++ elsif ($result->{type} eq "rflags")
+ {
+ print qq| \"pushfq\\n\"\n|;
+ print qq| \"popq %$result->{argnum}\\n\"\n|;
+@@ -925,9 +924,9 @@ while (<>)
+ my $suffix = $SubTypeSuffixes{$subtype};
+ my @values = @{$result->{values}};
+
+- if ($type eq "eflags")
++ if ($type eq "rflags")
+ {
+- print qq|${prefix}\($result->{name}.ud[0] & $values[0]UL\) == $values[1]UL|;
++ print qq|${prefix}\($result->{name}.uq[0] & $values[0]UL\) == $values[1]UL|;
+ }
+ elsif ($type =~ /^fpu[cs]w$/)
+ {
+@@ -972,9 +971,9 @@ while (<>)
+ my $suffix = $SubTypeSuffixes{$subtype};
+ my @values = @{$result->{values}};
+
+- if ($type eq "eflags")
++ if ($type eq "rflags")
+ {
+- print qq| printf(" eflags & 0x%lx = 0x%lx (expected 0x%lx)\\n", $values[0]UL, $result->{name}.ud\[0\] & $values[0]UL, $values[1]UL);\n|;
++ print qq| printf(" rflags & 0x%lx = 0x%lx (expected 0x%lx)\\n", $values[0]UL, $result->{name}.ud\[0\] & $values[0]UL, $values[1]UL);\n|;
+ }
+ elsif ($type =~ /^fpu[cs]w$/)
+ {
+diff --git a/none/tests/amd64/insn_basic.def b/none/tests/amd64/insn_basic.def
+index 8b10da1..c3bef75 100644
+--- a/none/tests/amd64/insn_basic.def
++++ b/none/tests/amd64/insn_basic.def
+@@ -1,57 +1,57 @@
+-adcb eflags[0x1,0x0] : imm8[12] al.ub[34] => 1.ub[46]
+-adcb eflags[0x1,0x1] : imm8[12] al.ub[34] => 1.ub[47]
+-adcb eflags[0x1,0x0] : imm8[12] bl.ub[34] => 1.ub[46]
+-adcb eflags[0x1,0x1] : imm8[12] bl.ub[34] => 1.ub[47]
+-adcb eflags[0x1,0x0] : imm8[12] m8.ub[34] => 1.ub[46]
+-adcb eflags[0x1,0x1] : imm8[12] m8.ub[34] => 1.ub[47]
+-adcb eflags[0x1,0x0] : r8.ub[12] r8.ub[34] => 1.ub[46]
+-adcb eflags[0x1,0x1] : r8.ub[12] r8.ub[34] => 1.ub[47]
+-adcb eflags[0x1,0x0] : r8.ub[12] m8.ub[34] => 1.ub[46]
+-adcb eflags[0x1,0x1] : r8.ub[12] m8.ub[34] => 1.ub[47]
+-###adcb eflags[0x1,0x0] : m8.ub[12] r8.ub[34] => 1.ub[46]
+-###adcb eflags[0x1,0x1] : m8.ub[12] r8.ub[34] => 1.ub[47]
+-adcw eflags[0x1,0x0] : imm8[12] r16.uw[3456] => 1.uw[3468]
+-adcw eflags[0x1,0x1] : imm8[12] r16.uw[3456] => 1.uw[3469]
+-###adcw eflags[0x1,0x0] : imm16[1234] ax.uw[5678] => 1.uw[6912]
+-###adcw eflags[0x1,0x1] : imm16[1234] ax.uw[5678] => 1.uw[6913]
+-adcw eflags[0x1,0x0] : imm16[1234] bx.uw[5678] => 1.uw[6912]
+-adcw eflags[0x1,0x1] : imm16[1234] bx.uw[5678] => 1.uw[6913]
+-adcw eflags[0x1,0x0] : imm16[1234] m16.uw[5678] => 1.uw[6912]
+-adcw eflags[0x1,0x1] : imm16[1234] m16.uw[5678] => 1.uw[6913]
+-adcw eflags[0x1,0x0] : r16.uw[1234] r16.uw[5678] => 1.uw[6912]
+-adcw eflags[0x1,0x1] : r16.uw[1234] r16.uw[5678] => 1.uw[6913]
+-adcw eflags[0x1,0x0] : r16.uw[1234] m16.uw[5678] => 1.uw[6912]
+-adcw eflags[0x1,0x1] : r16.uw[1234] m16.uw[5678] => 1.uw[6913]
+-adcw eflags[0x1,0x0] : m16.uw[1234] r16.uw[5678] => 1.uw[6912]
+-adcw eflags[0x1,0x1] : m16.uw[1234] r16.uw[5678] => 1.uw[6913]
+-adcl eflags[0x1,0x0] : imm8[12] r32.ud[87654321] => 1.ud[87654333]
+-adcl eflags[0x1,0x1] : imm8[12] r32.ud[87654321] => 1.ud[87654334]
+-###adcl eflags[0x1,0x0] : imm32[12345678] eax.ud[87654321] => 1.ud[99999999]
+-###adcl eflags[0x1,0x1] : imm32[12345678] eax.ud[87654321] => 1.ud[100000000]
+-adcl eflags[0x1,0x0] : imm32[12345678] ebx.ud[87654321] => 1.ud[99999999]
+-adcl eflags[0x1,0x1] : imm32[12345678] ebx.ud[87654321] => 1.ud[100000000]
+-adcl eflags[0x1,0x0] : imm32[12345678] m32.ud[87654321] => 1.ud[99999999]
+-adcl eflags[0x1,0x1] : imm32[12345678] m32.ud[87654321] => 1.ud[100000000]
+-adcl eflags[0x1,0x0] : r32.ud[12345678] r32.ud[87654321] => 1.ud[99999999]
+-adcl eflags[0x1,0x1] : r32.ud[12345678] r32.ud[87654321] => 1.ud[100000000]
+-adcl eflags[0x1,0x0] : r32.ud[12345678] m32.ud[87654321] => 1.ud[99999999]
+-adcl eflags[0x1,0x1] : r32.ud[12345678] m32.ud[87654321] => 1.ud[100000000]
+-adcl eflags[0x1,0x0] : m32.ud[12345678] r32.ud[87654321] => 1.ud[99999999]
+-adcl eflags[0x1,0x1] : m32.ud[12345678] r32.ud[87654321] => 1.ud[100000000]
+-adcq eflags[0x1,0x0] : imm8[12] r64.uq[8765432187654321] => 1.uq[8765432187654333]
+-adcq eflags[0x1,0x1] : imm8[12] r64.uq[8765432187654321] => 1.uq[8765432187654334]
+-###adcq eflags[0x1,0x0] : imm32[12345678] rax.uq[8765432187654321] => 1.uq[8765432199999999]
+-###adcq eflags[0x1,0x1] : imm32[12345678] rax.uq[8765432187654321] => 1.uq[8765432200000000]
+-adcq eflags[0x1,0x0] : imm32[12345678] rbx.uq[8765432187654321] => 1.uq[8765432199999999]
+-adcq eflags[0x1,0x1] : imm32[12345678] rbx.uq[8765432187654321] => 1.uq[8765432200000000]
+-adcq eflags[0x1,0x0] : imm32[12345678] m64.uq[8765432187654321] => 1.uq[8765432199999999]
+-adcq eflags[0x1,0x1] : imm32[12345678] m64.uq[8765432187654321] => 1.uq[8765432200000000]
+-adcq eflags[0x1,0x0] : r64.uq[1234567812345678] r64.uq[8765432187654321] => 1.uq[9999999999999999]
+-adcq eflags[0x1,0x1] : r64.uq[1234567812345678] r64.uq[8765432187654321] => 1.uq[10000000000000000]
+-adcq eflags[0x1,0x0] : r64.uq[1234567812345678] m64.uq[8765432187654321] => 1.uq[9999999999999999]
+-adcq eflags[0x1,0x1] : r64.uq[1234567812345678] m64.uq[8765432187654321] => 1.uq[10000000000000000]
+-adcq eflags[0x1,0x0] : m64.uq[1234567812345678] r64.uq[8765432187654321] => 1.uq[9999999999999999]
+-adcq eflags[0x1,0x1] : m64.uq[1234567812345678] r64.uq[8765432187654321] => 1.uq[10000000000000000]
++adcb rflags[0x1,0x0] : imm8[12] al.ub[34] => 1.ub[46]
++adcb rflags[0x1,0x1] : imm8[12] al.ub[34] => 1.ub[47]
++adcb rflags[0x1,0x0] : imm8[12] bl.ub[34] => 1.ub[46]
++adcb rflags[0x1,0x1] : imm8[12] bl.ub[34] => 1.ub[47]
++adcb rflags[0x1,0x0] : imm8[12] m8.ub[34] => 1.ub[46]
++adcb rflags[0x1,0x1] : imm8[12] m8.ub[34] => 1.ub[47]
++adcb rflags[0x1,0x0] : r8.ub[12] r8.ub[34] => 1.ub[46]
++adcb rflags[0x1,0x1] : r8.ub[12] r8.ub[34] => 1.ub[47]
++adcb rflags[0x1,0x0] : r8.ub[12] m8.ub[34] => 1.ub[46]
++adcb rflags[0x1,0x1] : r8.ub[12] m8.ub[34] => 1.ub[47]
++###adcb rflags[0x1,0x0] : m8.ub[12] r8.ub[34] => 1.ub[46]
++###adcb rflags[0x1,0x1] : m8.ub[12] r8.ub[34] => 1.ub[47]
++adcw rflags[0x1,0x0] : imm8[12] r16.uw[3456] => 1.uw[3468]
++adcw rflags[0x1,0x1] : imm8[12] r16.uw[3456] => 1.uw[3469]
++###adcw rflags[0x1,0x0] : imm16[1234] ax.uw[5678] => 1.uw[6912]
++###adcw rflags[0x1,0x1] : imm16[1234] ax.uw[5678] => 1.uw[6913]
++adcw rflags[0x1,0x0] : imm16[1234] bx.uw[5678] => 1.uw[6912]
++adcw rflags[0x1,0x1] : imm16[1234] bx.uw[5678] => 1.uw[6913]
++adcw rflags[0x1,0x0] : imm16[1234] m16.uw[5678] => 1.uw[6912]
++adcw rflags[0x1,0x1] : imm16[1234] m16.uw[5678] => 1.uw[6913]
++adcw rflags[0x1,0x0] : r16.uw[1234] r16.uw[5678] => 1.uw[6912]
++adcw rflags[0x1,0x1] : r16.uw[1234] r16.uw[5678] => 1.uw[6913]
++adcw rflags[0x1,0x0] : r16.uw[1234] m16.uw[5678] => 1.uw[6912]
++adcw rflags[0x1,0x1] : r16.uw[1234] m16.uw[5678] => 1.uw[6913]
++adcw rflags[0x1,0x0] : m16.uw[1234] r16.uw[5678] => 1.uw[6912]
++adcw rflags[0x1,0x1] : m16.uw[1234] r16.uw[5678] => 1.uw[6913]
++adcl rflags[0x1,0x0] : imm8[12] r32.ud[87654321] => 1.ud[87654333]
++adcl rflags[0x1,0x1] : imm8[12] r32.ud[87654321] => 1.ud[87654334]
++###adcl rflags[0x1,0x0] : imm32[12345678] eax.ud[87654321] => 1.ud[99999999]
++###adcl rflags[0x1,0x1] : imm32[12345678] eax.ud[87654321] => 1.ud[100000000]
++adcl rflags[0x1,0x0] : imm32[12345678] ebx.ud[87654321] => 1.ud[99999999]
++adcl rflags[0x1,0x1] : imm32[12345678] ebx.ud[87654321] => 1.ud[100000000]
++adcl rflags[0x1,0x0] : imm32[12345678] m32.ud[87654321] => 1.ud[99999999]
++adcl rflags[0x1,0x1] : imm32[12345678] m32.ud[87654321] => 1.ud[100000000]
++adcl rflags[0x1,0x0] : r32.ud[12345678] r32.ud[87654321] => 1.ud[99999999]
++adcl rflags[0x1,0x1] : r32.ud[12345678] r32.ud[87654321] => 1.ud[100000000]
++adcl rflags[0x1,0x0] : r32.ud[12345678] m32.ud[87654321] => 1.ud[99999999]
++adcl rflags[0x1,0x1] : r32.ud[12345678] m32.ud[87654321] => 1.ud[100000000]
++adcl rflags[0x1,0x0] : m32.ud[12345678] r32.ud[87654321] => 1.ud[99999999]
++adcl rflags[0x1,0x1] : m32.ud[12345678] r32.ud[87654321] => 1.ud[100000000]
++adcq rflags[0x1,0x0] : imm8[12] r64.uq[8765432187654321] => 1.uq[8765432187654333]
++adcq rflags[0x1,0x1] : imm8[12] r64.uq[8765432187654321] => 1.uq[8765432187654334]
++###adcq rflags[0x1,0x0] : imm32[12345678] rax.uq[8765432187654321] => 1.uq[8765432199999999]
++###adcq rflags[0x1,0x1] : imm32[12345678] rax.uq[8765432187654321] => 1.uq[8765432200000000]
++adcq rflags[0x1,0x0] : imm32[12345678] rbx.uq[8765432187654321] => 1.uq[8765432199999999]
++adcq rflags[0x1,0x1] : imm32[12345678] rbx.uq[8765432187654321] => 1.uq[8765432200000000]
++adcq rflags[0x1,0x0] : imm32[12345678] m64.uq[8765432187654321] => 1.uq[8765432199999999]
++adcq rflags[0x1,0x1] : imm32[12345678] m64.uq[8765432187654321] => 1.uq[8765432200000000]
++adcq rflags[0x1,0x0] : r64.uq[1234567812345678] r64.uq[8765432187654321] => 1.uq[9999999999999999]
++adcq rflags[0x1,0x1] : r64.uq[1234567812345678] r64.uq[8765432187654321] => 1.uq[10000000000000000]
++adcq rflags[0x1,0x0] : r64.uq[1234567812345678] m64.uq[8765432187654321] => 1.uq[9999999999999999]
++adcq rflags[0x1,0x1] : r64.uq[1234567812345678] m64.uq[8765432187654321] => 1.uq[10000000000000000]
++adcq rflags[0x1,0x0] : m64.uq[1234567812345678] r64.uq[8765432187654321] => 1.uq[9999999999999999]
++adcq rflags[0x1,0x1] : m64.uq[1234567812345678] r64.uq[8765432187654321] => 1.uq[10000000000000000]
+ addb imm8[12] al.ub[34] => 1.ub[46]
+ addb imm8[12] bl.ub[34] => 1.ub[46]
+ addb imm8[12] m8.ub[34] => 1.ub[46]
+@@ -123,430 +123,430 @@ bsrq r64.uq[0x1357246813572468] r64.uq[0] => 1.uq[60]
+ bsrq m64.uq[0x7531864275318642] r64.uq[0] => 1.uq[62]
+ bswapl r32.ud[0x12345678] => 0.ud[0x78563412]
+ bswapq r64.uq[0x1234567813572468] => 0.uq[0x6824571378563412]
+-btw imm8[0] r16.uw[0x4231] => 1.uw[0x4231] eflags[0x001,0x001]
+-btw imm8[12] r16.uw[0x4231] => 1.uw[0x4231] eflags[0x001,0x000]
+-btw imm8[0] m16.uw[0x4231] => 1.uw[0x4231] eflags[0x001,0x001]
+-btw imm8[12] m16.uw[0x4231] => 1.uw[0x4231] eflags[0x001,0x000]
+-###btw r16.uw[0] r16.uw[0x4231] => 1.uw[0x4231] eflags[0x001,0x001]
+-###btw r16.uw[12] r16.uw[0x4231] => 1.uw[0x4231] eflags[0x001,0x000]
+-###btw r16.uw[0] m16.uw[0x4231] => 1.uw[0x4231] eflags[0x001,0x001]
+-###btw r16.uw[12] m16.uw[0x4231] => 1.uw[0x4231] eflags[0x001,0x000]
+-btl imm8[0] r32.ud[0x86427531] => 1.ud[0x86427531] eflags[0x001,0x001]
+-btl imm8[24] r32.ud[0x86427531] => 1.ud[0x86427531] eflags[0x001,0x000]
+-btl imm8[0] m32.ud[0x86427531] => 1.ud[0x86427531] eflags[0x001,0x001]
+-btl imm8[24] m32.ud[0x86427531] => 1.ud[0x86427531] eflags[0x001,0x000]
+-btl r32.ud[0] r32.ud[0x86427531] => 1.ud[0x86427531] eflags[0x001,0x001]
+-btl r32.ud[24] r32.ud[0x86427531] => 1.ud[0x86427531] eflags[0x001,0x000]
+-btl r32.ud[0] m32.ud[0x86427531] => 1.ud[0x86427531] eflags[0x001,0x001]
+-btl r32.ud[24] m32.ud[0x86427531] => 1.ud[0x86427531] eflags[0x001,0x000]
+-btq imm8[0] r64.uq[0x8642753124681357] => 1.uq[0x8642753124681357] eflags[0x001,0x001]
+-btq imm8[48] r64.uq[0x8642753124681357] => 1.uq[0x8642753124681357] eflags[0x001,0x000]
+-btq imm8[0] m64.uq[0x8642753124681357] => 1.uq[0x8642753124681357] eflags[0x001,0x001]
+-btq imm8[48] m64.uq[0x8642753124681357] => 1.uq[0x8642753124681357] eflags[0x001,0x000]
+-btq r64.uq[0] r64.uq[0x8642753124681357] => 1.uq[0x8642753124681357] eflags[0x001,0x001]
+-btq r64.uq[48] r64.uq[0x8642753124681357] => 1.uq[0x8642753124681357] eflags[0x001,0x000]
+-btq r64.uq[0] m64.uq[0x8642753124681357] => 1.uq[0x8642753124681357] eflags[0x001,0x001]
+-btq r64.uq[48] m64.uq[0x8642753124681357] => 1.uq[0x8642753124681357] eflags[0x001,0x000]
+-btcw imm8[0] r16.uw[0x4231] => 1.uw[0x4230] eflags[0x001,0x001]
+-btcw imm8[12] r16.uw[0x4231] => 1.uw[0x5231] eflags[0x001,0x000]
+-btcw imm8[0] m16.uw[0x4231] => 1.uw[0x4230] eflags[0x001,0x001]
+-btcw imm8[12] m16.uw[0x4231] => 1.uw[0x5231] eflags[0x001,0x000]
+-###btcw r16.uw[0] r16.uw[0x4231] => 1.uw[0x4230] eflags[0x001,0x001]
+-###btcw r16.uw[12] r16.uw[0x4231] => 1.uw[0x5231] eflags[0x001,0x000]
+-###btcw r16.uw[0] m16.uw[0x4231] => 1.uw[0x4230] eflags[0x001,0x001]
+-###btcw r16.uw[12] m16.uw[0x4231] => 1.uw[0x5231] eflags[0x001,0x000]
+-btcl imm8[0] r32.ud[0x86427531] => 1.ud[0x86427530] eflags[0x001,0x001]
+-btcl imm8[24] r32.ud[0x86427531] => 1.ud[0x87427531] eflags[0x001,0x000]
+-btcl imm8[0] m32.ud[0x86427531] => 1.ud[0x86427530] eflags[0x001,0x001]
+-btcl imm8[24] m32.ud[0x86427531] => 1.ud[0x87427531] eflags[0x001,0x000]
+-btcl r32.ud[0] r32.ud[0x86427531] => 1.ud[0x86427530] eflags[0x001,0x001]
+-btcl r32.ud[24] r32.ud[0x86427531] => 1.ud[0x87427531] eflags[0x001,0x000]
+-btcl r32.ud[0] m32.ud[0x86427531] => 1.ud[0x86427530] eflags[0x001,0x001]
+-btcl r32.ud[24] m32.ud[0x86427531] => 1.ud[0x87427531] eflags[0x001,0x000]
+-btcq imm8[0] r64.uq[0x8642753124681357] => 1.uq[0x8642753124681356] eflags[0x001,0x001]
+-btcq imm8[48] r64.uq[0x8642753124681357] => 1.uq[0x8643753124681357] eflags[0x001,0x000]
+-btcq imm8[0] m64.uq[0x8642753124681357] => 1.uq[0x8642753124681356] eflags[0x001,0x001]
+-btcq imm8[48] m64.uq[0x8642753124681357] => 1.uq[0x8643753124681357] eflags[0x001,0x000]
+-btcq r64.uq[0] r64.uq[0x8642753124681357] => 1.uq[0x8642753124681356] eflags[0x001,0x001]
+-btcq r64.uq[48] r64.uq[0x8642753124681357] => 1.uq[0x8643753124681357] eflags[0x001,0x000]
+-btcq r64.uq[0] m64.uq[0x8642753124681357] => 1.uq[0x8642753124681356] eflags[0x001,0x001]
+-btcq r64.uq[48] m64.uq[0x8642753124681357] => 1.uq[0x8643753124681357] eflags[0x001,0x000]
+-btrw imm8[0] r16.uw[0x4231] => 1.uw[0x4230] eflags[0x001,0x001]
+-btrw imm8[12] r16.uw[0x4231] => 1.uw[0x4231] eflags[0x001,0x000]
+-btrw imm8[0] m16.uw[0x4231] => 1.uw[0x4230] eflags[0x001,0x001]
+-btrw imm8[12] m16.uw[0x4231] => 1.uw[0x4231] eflags[0x001,0x000]
+-###btrw r16.uw[0] r16.uw[0x4231] => 1.uw[0x4230] eflags[0x001,0x001]
+-###btrw r16.uw[12] r16.uw[0x4231] => 1.uw[0x4231] eflags[0x001,0x000]
+-###btrw r16.uw[0] m16.uw[0x4231] => 1.uw[0x4230] eflags[0x001,0x001]
+-###btrw r16.uw[12] m16.uw[0x4231] => 1.uw[0x4231] eflags[0x001,0x000]
+-btrl imm8[0] r32.ud[0x86427531] => 1.ud[0x86427530] eflags[0x001,0x001]
+-btrl imm8[24] r32.ud[0x86427531] => 1.ud[0x86427531] eflags[0x001,0x000]
+-btrl imm8[0] m32.ud[0x86427531] => 1.ud[0x86427530] eflags[0x001,0x001]
+-btrl imm8[24] m32.ud[0x86427531] => 1.ud[0x86427531] eflags[0x001,0x000]
+-btrl r32.ud[0] r32.ud[0x86427531] => 1.ud[0x86427530] eflags[0x001,0x001]
+-btrl r32.ud[24] r32.ud[0x86427531] => 1.ud[0x86427531] eflags[0x001,0x000]
+-btrl r32.ud[0] m32.ud[0x86427531] => 1.ud[0x86427530] eflags[0x001,0x001]
+-btrl r32.ud[24] m32.ud[0x86427531] => 1.ud[0x86427531] eflags[0x001,0x000]
+-btrq imm8[0] r64.uq[0x8642753124681357] => 1.uq[0x8642753124681356] eflags[0x001,0x001]
+-btrq imm8[48] r64.uq[0x8642753124681357] => 1.uq[0x8642753124681357] eflags[0x001,0x000]
+-btrq imm8[0] m64.uq[0x8642753124681357] => 1.uq[0x8642753124681356] eflags[0x001,0x001]
+-btrq imm8[48] m64.uq[0x8642753124681357] => 1.uq[0x8642753124681357] eflags[0x001,0x000]
+-btrq r64.uq[0] r64.uq[0x8642753124681357] => 1.uq[0x8642753124681356] eflags[0x001,0x001]
+-btrq r64.uq[48] r64.uq[0x8642753124681357] => 1.uq[0x8642753124681357] eflags[0x001,0x000]
+-btrq r64.uq[0] m64.uq[0x8642753124681357] => 1.uq[0x8642753124681356] eflags[0x001,0x001]
+-btrq r64.uq[48] m64.uq[0x8642753124681357] => 1.uq[0x8642753124681357] eflags[0x001,0x000]
+-btsw imm8[0] r16.uw[0x4231] => 1.uw[0x4231] eflags[0x001,0x001]
+-btsw imm8[12] r16.uw[0x4231] => 1.uw[0x5231] eflags[0x001,0x000]
+-btsw imm8[0] m16.uw[0x4231] => 1.uw[0x4231] eflags[0x001,0x001]
+-btsw imm8[12] m16.uw[0x4231] => 1.uw[0x5231] eflags[0x001,0x000]
+-###btsw r16.uw[0] r16.uw[0x4231] => 1.uw[0x4231] eflags[0x001,0x001]
+-###btsw r16.uw[12] r16.uw[0x4231] => 1.uw[0x5231] eflags[0x001,0x000]
+-###btsw r16.uw[0] m16.uw[0x4231] => 1.uw[0x4231] eflags[0x001,0x001]
+-###btsw r16.uw[12] m16.uw[0x4231] => 1.uw[0x5231] eflags[0x001,0x000]
+-btsl imm8[0] r32.ud[0x86427531] => 1.ud[0x86427531] eflags[0x001,0x001]
+-btsl imm8[24] r32.ud[0x86427531] => 1.ud[0x87427531] eflags[0x001,0x000]
+-btsl imm8[0] m32.ud[0x86427531] => 1.ud[0x86427531] eflags[0x001,0x001]
+-btsl imm8[24] m32.ud[0x86427531] => 1.ud[0x87427531] eflags[0x001,0x000]
+-btsl r32.ud[0] r32.ud[0x86427531] => 1.ud[0x86427531] eflags[0x001,0x001]
+-btsl r32.ud[24] r32.ud[0x86427531] => 1.ud[0x87427531] eflags[0x001,0x000]
+-btsl r32.ud[0] m32.ud[0x86427531] => 1.ud[0x86427531] eflags[0x001,0x001]
+-btsl r32.ud[24] m32.ud[0x86427531] => 1.ud[0x87427531] eflags[0x001,0x000]
+-btsq imm8[0] r64.uq[0x8642753124681357] => 1.uq[0x8642753124681357] eflags[0x001,0x001]
+-btsq imm8[48] r64.uq[0x8642753124681357] => 1.uq[0x8643753124681357] eflags[0x001,0x000]
+-btsq imm8[0] m64.uq[0x8642753124681357] => 1.uq[0x8642753124681357] eflags[0x001,0x001]
+-btsq imm8[48] m64.uq[0x8642753124681357] => 1.uq[0x8643753124681357] eflags[0x001,0x000]
+-btsq r64.uq[0] r64.uq[0x8642753124681357] => 1.uq[0x8642753124681357] eflags[0x001,0x001]
+-btsq r64.uq[48] r64.uq[0x8642753124681357] => 1.uq[0x8643753124681357] eflags[0x001,0x000]
+-btsq r64.uq[0] m64.uq[0x8642753124681357] => 1.uq[0x8642753124681357] eflags[0x001,0x001]
+-btsq r64.uq[48] m64.uq[0x8642753124681357] => 1.uq[0x8643753124681357] eflags[0x001,0x000]
++btw imm8[0] r16.uw[0x4231] => 1.uw[0x4231] rflags[0x001,0x001]
++btw imm8[12] r16.uw[0x4231] => 1.uw[0x4231] rflags[0x001,0x000]
++btw imm8[0] m16.uw[0x4231] => 1.uw[0x4231] rflags[0x001,0x001]
++btw imm8[12] m16.uw[0x4231] => 1.uw[0x4231] rflags[0x001,0x000]
++###btw r16.uw[0] r16.uw[0x4231] => 1.uw[0x4231] rflags[0x001,0x001]
++###btw r16.uw[12] r16.uw[0x4231] => 1.uw[0x4231] rflags[0x001,0x000]
++###btw r16.uw[0] m16.uw[0x4231] => 1.uw[0x4231] rflags[0x001,0x001]
++###btw r16.uw[12] m16.uw[0x4231] => 1.uw[0x4231] rflags[0x001,0x000]
++btl imm8[0] r32.ud[0x86427531] => 1.ud[0x86427531] rflags[0x001,0x001]
++btl imm8[24] r32.ud[0x86427531] => 1.ud[0x86427531] rflags[0x001,0x000]
++btl imm8[0] m32.ud[0x86427531] => 1.ud[0x86427531] rflags[0x001,0x001]
++btl imm8[24] m32.ud[0x86427531] => 1.ud[0x86427531] rflags[0x001,0x000]
++btl r32.ud[0] r32.ud[0x86427531] => 1.ud[0x86427531] rflags[0x001,0x001]
++btl r32.ud[24] r32.ud[0x86427531] => 1.ud[0x86427531] rflags[0x001,0x000]
++btl r32.ud[0] m32.ud[0x86427531] => 1.ud[0x86427531] rflags[0x001,0x001]
++btl r32.ud[24] m32.ud[0x86427531] => 1.ud[0x86427531] rflags[0x001,0x000]
++btq imm8[0] r64.uq[0x8642753124681357] => 1.uq[0x8642753124681357] rflags[0x001,0x001]
++btq imm8[48] r64.uq[0x8642753124681357] => 1.uq[0x8642753124681357] rflags[0x001,0x000]
++btq imm8[0] m64.uq[0x8642753124681357] => 1.uq[0x8642753124681357] rflags[0x001,0x001]
++btq imm8[48] m64.uq[0x8642753124681357] => 1.uq[0x8642753124681357] rflags[0x001,0x000]
++btq r64.uq[0] r64.uq[0x8642753124681357] => 1.uq[0x8642753124681357] rflags[0x001,0x001]
++btq r64.uq[48] r64.uq[0x8642753124681357] => 1.uq[0x8642753124681357] rflags[0x001,0x000]
++btq r64.uq[0] m64.uq[0x8642753124681357] => 1.uq[0x8642753124681357] rflags[0x001,0x001]
++btq r64.uq[48] m64.uq[0x8642753124681357] => 1.uq[0x8642753124681357] rflags[0x001,0x000]
++btcw imm8[0] r16.uw[0x4231] => 1.uw[0x4230] rflags[0x001,0x001]
++btcw imm8[12] r16.uw[0x4231] => 1.uw[0x5231] rflags[0x001,0x000]
++btcw imm8[0] m16.uw[0x4231] => 1.uw[0x4230] rflags[0x001,0x001]
++btcw imm8[12] m16.uw[0x4231] => 1.uw[0x5231] rflags[0x001,0x000]
++###btcw r16.uw[0] r16.uw[0x4231] => 1.uw[0x4230] rflags[0x001,0x001]
++###btcw r16.uw[12] r16.uw[0x4231] => 1.uw[0x5231] rflags[0x001,0x000]
++###btcw r16.uw[0] m16.uw[0x4231] => 1.uw[0x4230] rflags[0x001,0x001]
++###btcw r16.uw[12] m16.uw[0x4231] => 1.uw[0x5231] rflags[0x001,0x000]
++btcl imm8[0] r32.ud[0x86427531] => 1.ud[0x86427530] rflags[0x001,0x001]
++btcl imm8[24] r32.ud[0x86427531] => 1.ud[0x87427531] rflags[0x001,0x000]
++btcl imm8[0] m32.ud[0x86427531] => 1.ud[0x86427530] rflags[0x001,0x001]
++btcl imm8[24] m32.ud[0x86427531] => 1.ud[0x87427531] rflags[0x001,0x000]
++btcl r32.ud[0] r32.ud[0x86427531] => 1.ud[0x86427530] rflags[0x001,0x001]
++btcl r32.ud[24] r32.ud[0x86427531] => 1.ud[0x87427531] rflags[0x001,0x000]
++btcl r32.ud[0] m32.ud[0x86427531] => 1.ud[0x86427530] rflags[0x001,0x001]
++btcl r32.ud[24] m32.ud[0x86427531] => 1.ud[0x87427531] rflags[0x001,0x000]
++btcq imm8[0] r64.uq[0x8642753124681357] => 1.uq[0x8642753124681356] rflags[0x001,0x001]
++btcq imm8[48] r64.uq[0x8642753124681357] => 1.uq[0x8643753124681357] rflags[0x001,0x000]
++btcq imm8[0] m64.uq[0x8642753124681357] => 1.uq[0x8642753124681356] rflags[0x001,0x001]
++btcq imm8[48] m64.uq[0x8642753124681357] => 1.uq[0x8643753124681357] rflags[0x001,0x000]
++btcq r64.uq[0] r64.uq[0x8642753124681357] => 1.uq[0x8642753124681356] rflags[0x001,0x001]
++btcq r64.uq[48] r64.uq[0x8642753124681357] => 1.uq[0x8643753124681357] rflags[0x001,0x000]
++btcq r64.uq[0] m64.uq[0x8642753124681357] => 1.uq[0x8642753124681356] rflags[0x001,0x001]
++btcq r64.uq[48] m64.uq[0x8642753124681357] => 1.uq[0x8643753124681357] rflags[0x001,0x000]
++btrw imm8[0] r16.uw[0x4231] => 1.uw[0x4230] rflags[0x001,0x001]
++btrw imm8[12] r16.uw[0x4231] => 1.uw[0x4231] rflags[0x001,0x000]
++btrw imm8[0] m16.uw[0x4231] => 1.uw[0x4230] rflags[0x001,0x001]
++btrw imm8[12] m16.uw[0x4231] => 1.uw[0x4231] rflags[0x001,0x000]
++###btrw r16.uw[0] r16.uw[0x4231] => 1.uw[0x4230] rflags[0x001,0x001]
++###btrw r16.uw[12] r16.uw[0x4231] => 1.uw[0x4231] rflags[0x001,0x000]
++###btrw r16.uw[0] m16.uw[0x4231] => 1.uw[0x4230] rflags[0x001,0x001]
++###btrw r16.uw[12] m16.uw[0x4231] => 1.uw[0x4231] rflags[0x001,0x000]
++btrl imm8[0] r32.ud[0x86427531] => 1.ud[0x86427530] rflags[0x001,0x001]
++btrl imm8[24] r32.ud[0x86427531] => 1.ud[0x86427531] rflags[0x001,0x000]
++btrl imm8[0] m32.ud[0x86427531] => 1.ud[0x86427530] rflags[0x001,0x001]
++btrl imm8[24] m32.ud[0x86427531] => 1.ud[0x86427531] rflags[0x001,0x000]
++btrl r32.ud[0] r32.ud[0x86427531] => 1.ud[0x86427530] rflags[0x001,0x001]
++btrl r32.ud[24] r32.ud[0x86427531] => 1.ud[0x86427531] rflags[0x001,0x000]
++btrl r32.ud[0] m32.ud[0x86427531] => 1.ud[0x86427530] rflags[0x001,0x001]
++btrl r32.ud[24] m32.ud[0x86427531] => 1.ud[0x86427531] rflags[0x001,0x000]
++btrq imm8[0] r64.uq[0x8642753124681357] => 1.uq[0x8642753124681356] rflags[0x001,0x001]
++btrq imm8[48] r64.uq[0x8642753124681357] => 1.uq[0x8642753124681357] rflags[0x001,0x000]
++btrq imm8[0] m64.uq[0x8642753124681357] => 1.uq[0x8642753124681356] rflags[0x001,0x001]
++btrq imm8[48] m64.uq[0x8642753124681357] => 1.uq[0x8642753124681357] rflags[0x001,0x000]
++btrq r64.uq[0] r64.uq[0x8642753124681357] => 1.uq[0x8642753124681356] rflags[0x001,0x001]
++btrq r64.uq[48] r64.uq[0x8642753124681357] => 1.uq[0x8642753124681357] rflags[0x001,0x000]
++btrq r64.uq[0] m64.uq[0x8642753124681357] => 1.uq[0x8642753124681356] rflags[0x001,0x001]
++btrq r64.uq[48] m64.uq[0x8642753124681357] => 1.uq[0x8642753124681357] rflags[0x001,0x000]
++btsw imm8[0] r16.uw[0x4231] => 1.uw[0x4231] rflags[0x001,0x001]
++btsw imm8[12] r16.uw[0x4231] => 1.uw[0x5231] rflags[0x001,0x000]
++btsw imm8[0] m16.uw[0x4231] => 1.uw[0x4231] rflags[0x001,0x001]
++btsw imm8[12] m16.uw[0x4231] => 1.uw[0x5231] rflags[0x001,0x000]
++###btsw r16.uw[0] r16.uw[0x4231] => 1.uw[0x4231] rflags[0x001,0x001]
++###btsw r16.uw[12] r16.uw[0x4231] => 1.uw[0x5231] rflags[0x001,0x000]
++###btsw r16.uw[0] m16.uw[0x4231] => 1.uw[0x4231] rflags[0x001,0x001]
++###btsw r16.uw[12] m16.uw[0x4231] => 1.uw[0x5231] rflags[0x001,0x000]
++btsl imm8[0] r32.ud[0x86427531] => 1.ud[0x86427531] rflags[0x001,0x001]
++btsl imm8[24] r32.ud[0x86427531] => 1.ud[0x87427531] rflags[0x001,0x000]
++btsl imm8[0] m32.ud[0x86427531] => 1.ud[0x86427531] rflags[0x001,0x001]
++btsl imm8[24] m32.ud[0x86427531] => 1.ud[0x87427531] rflags[0x001,0x000]
++btsl r32.ud[0] r32.ud[0x86427531] => 1.ud[0x86427531] rflags[0x001,0x001]
++btsl r32.ud[24] r32.ud[0x86427531] => 1.ud[0x87427531] rflags[0x001,0x000]
++btsl r32.ud[0] m32.ud[0x86427531] => 1.ud[0x86427531] rflags[0x001,0x001]
++btsl r32.ud[24] m32.ud[0x86427531] => 1.ud[0x87427531] rflags[0x001,0x000]
++btsq imm8[0] r64.uq[0x8642753124681357] => 1.uq[0x8642753124681357] rflags[0x001,0x001]
++btsq imm8[48] r64.uq[0x8642753124681357] => 1.uq[0x8643753124681357] rflags[0x001,0x000]
++btsq imm8[0] m64.uq[0x8642753124681357] => 1.uq[0x8642753124681357] rflags[0x001,0x001]
++btsq imm8[48] m64.uq[0x8642753124681357] => 1.uq[0x8643753124681357] rflags[0x001,0x000]
++btsq r64.uq[0] r64.uq[0x8642753124681357] => 1.uq[0x8642753124681357] rflags[0x001,0x001]
++btsq r64.uq[48] r64.uq[0x8642753124681357] => 1.uq[0x8643753124681357] rflags[0x001,0x000]
++btsq r64.uq[0] m64.uq[0x8642753124681357] => 1.uq[0x8642753124681357] rflags[0x001,0x001]
++btsq r64.uq[48] m64.uq[0x8642753124681357] => 1.uq[0x8643753124681357] rflags[0x001,0x000]
+ cbw al.sb[123] : => ax.sw[123]
+ cbw al.sb[-123] : => ax.sw[-123]
+ cdq eax.ud[0x12345678] : => edx.ud[0x00000000] eax.ud[0x12345678]
+ cdq eax.ud[0xfedcba98] : => edx.ud[0xffffffff] eax.ud[0xfedcba98]
+ cdqe eax.ud[0x12345678] : => rax.uq[0x0000000012345678]
+ cdqe eax.ud[0xfedcba98] : => rax.uq[0xfffffffffedcba98]
+-###clc eflags[0x001,0x000] : => eflags[0x001,0x000]
+-###clc eflags[0x001,0x001] : => eflags[0x001,0x000]
+-cld eflags[0x400,0x000] : => eflags[0x400,0x000]
+-cld eflags[0x400,0x400] : => eflags[0x400,0x000]
+-###cmc eflags[0x001,0x000] : => eflags[0x001,0x001]
+-###cmc eflags[0x001,0x001] : => eflags[0x001,0x000]
+-cmpb imm8[3] al.ub[2] => eflags[0x010,0x010]
+-cmpb imm8[2] al.ub[3] => eflags[0x010,0x000]
+-cmpb imm8[12] al.ub[12] => eflags[0x044,0x044]
+-cmpb imm8[12] al.ub[34] => eflags[0x044,0x000]
+-cmpb imm8[34] al.ub[12] => eflags[0x081,0x081]
+-cmpb imm8[12] al.ub[34] => eflags[0x081,0x000]
+-cmpb imm8[100] al.sb[-100] => eflags[0x800,0x800]
+-cmpb imm8[50] al.sb[-50] => eflags[0x800,0x000]
+-cmpb imm8[-50] al.sb[50] => eflags[0x800,0x000]
+-cmpb imm8[-100] al.sb[100] => eflags[0x800,0x800]
+-cmpb imm8[3] r8.ub[2] => eflags[0x010,0x010]
+-cmpb imm8[2] r8.ub[3] => eflags[0x010,0x000]
+-cmpb imm8[12] r8.ub[12] => eflags[0x044,0x044]
+-cmpb imm8[12] r8.ub[34] => eflags[0x044,0x000]
+-cmpb imm8[34] r8.ub[12] => eflags[0x081,0x081]
+-cmpb imm8[12] r8.ub[34] => eflags[0x081,0x000]
+-cmpb imm8[100] r8.sb[-100] => eflags[0x800,0x800]
+-cmpb imm8[50] r8.sb[-50] => eflags[0x800,0x000]
+-cmpb imm8[-50] r8.sb[50] => eflags[0x800,0x000]
+-cmpb imm8[-100] r8.sb[100] => eflags[0x800,0x800]
+-cmpb imm8[3] m8.ub[2] => eflags[0x010,0x010]
+-cmpb imm8[2] m8.ub[3] => eflags[0x010,0x000]
+-cmpb imm8[12] m8.ub[12] => eflags[0x044,0x044]
+-cmpb imm8[12] m8.ub[34] => eflags[0x044,0x000]
+-cmpb imm8[34] m8.ub[12] => eflags[0x081,0x081]
+-cmpb imm8[12] m8.ub[34] => eflags[0x081,0x000]
+-cmpb imm8[100] m8.sb[-100] => eflags[0x800,0x800]
+-cmpb imm8[50] m8.sb[-50] => eflags[0x800,0x000]
+-cmpb imm8[-50] m8.sb[50] => eflags[0x800,0x000]
+-cmpb imm8[-100] m8.sb[100] => eflags[0x800,0x800]
+-cmpb r8.ub[3] r8.ub[2] => eflags[0x010,0x010]
+-cmpb r8.ub[2] r8.ub[3] => eflags[0x010,0x000]
+-cmpb r8.ub[12] r8.ub[12] => eflags[0x044,0x044]
+-cmpb r8.ub[12] r8.ub[34] => eflags[0x044,0x000]
+-cmpb r8.ub[34] r8.ub[12] => eflags[0x081,0x081]
+-cmpb r8.ub[12] r8.ub[34] => eflags[0x081,0x000]
+-cmpb r8.ub[100] r8.sb[-100] => eflags[0x800,0x800]
+-cmpb r8.ub[50] r8.sb[-50] => eflags[0x800,0x000]
+-cmpb r8.sb[-50] r8.sb[50] => eflags[0x800,0x000]
+-cmpb r8.sb[-100] r8.sb[100] => eflags[0x800,0x800]
+-cmpb r8.ub[3] m8.ub[2] => eflags[0x010,0x010]
+-cmpb r8.ub[2] m8.ub[3] => eflags[0x010,0x000]
+-cmpb r8.ub[12] m8.ub[12] => eflags[0x044,0x044]
+-cmpb r8.ub[12] m8.ub[34] => eflags[0x044,0x000]
+-cmpb r8.ub[34] m8.ub[12] => eflags[0x081,0x081]
+-cmpb r8.ub[12] m8.ub[34] => eflags[0x081,0x000]
+-cmpb r8.ub[100] m8.sb[-100] => eflags[0x800,0x800]
+-cmpb r8.ub[50] m8.sb[-50] => eflags[0x800,0x000]
+-cmpb r8.sb[-50] m8.sb[50] => eflags[0x800,0x000]
+-cmpb r8.sb[-100] m8.sb[100] => eflags[0x800,0x800]
+-cmpb m8.ub[3] r8.ub[2] => eflags[0x010,0x010]
+-cmpb m8.ub[2] r8.ub[3] => eflags[0x010,0x000]
+-cmpb m8.ub[12] r8.ub[12] => eflags[0x044,0x044]
+-cmpb m8.ub[12] r8.ub[34] => eflags[0x044,0x000]
+-cmpb m8.ub[34] r8.ub[12] => eflags[0x081,0x081]
+-cmpb m8.ub[12] r8.ub[34] => eflags[0x081,0x000]
+-cmpb m8.ub[100] r8.sb[-100] => eflags[0x800,0x800]
+-cmpb m8.ub[50] r8.sb[-50] => eflags[0x800,0x000]
+-cmpb m8.sb[-50] r8.sb[50] => eflags[0x800,0x000]
+-cmpb m8.sb[-100] r8.sb[100] => eflags[0x800,0x800]
+-cmpw imm8[3] r16.uw[2] => eflags[0x010,0x010]
+-cmpw imm8[2] r16.uw[3] => eflags[0x010,0x000]
+-cmpw imm8[12] r16.uw[12] => eflags[0x044,0x044]
+-cmpw imm8[12] r16.uw[34] => eflags[0x044,0x000]
+-cmpw imm8[34] r16.uw[12] => eflags[0x081,0x081]
+-cmpw imm8[12] r16.uw[34] => eflags[0x081,0x000]
+-cmpw imm8[100] r16.sw[-32700] => eflags[0x800,0x800]
+-cmpw imm8[50] r16.sw[-50] => eflags[0x800,0x000]
+-cmpw imm8[-50] r16.sw[50] => eflags[0x800,0x000]
+-cmpw imm8[-100] r16.sw[32700] => eflags[0x800,0x800]
+-cmpw imm8[3] m16.uw[2] => eflags[0x010,0x010]
+-cmpw imm8[2] m16.uw[3] => eflags[0x010,0x000]
+-cmpw imm8[12] m16.uw[12] => eflags[0x044,0x044]
+-cmpw imm8[12] m16.uw[34] => eflags[0x044,0x000]
+-cmpw imm8[34] m16.uw[12] => eflags[0x081,0x081]
+-cmpw imm8[12] m16.uw[34] => eflags[0x081,0x000]
+-cmpw imm8[100] m16.sw[-32700] => eflags[0x800,0x800]
+-cmpw imm8[50] m16.sw[-50] => eflags[0x800,0x000]
+-cmpw imm8[-50] m16.sw[50] => eflags[0x800,0x000]
+-cmpw imm8[-100] m16.sw[32700] => eflags[0x800,0x800]
+-cmpw imm16[3] ax.uw[2] => eflags[0x010,0x010]
+-cmpw imm16[2] ax.uw[3] => eflags[0x010,0x000]
+-cmpw imm16[12] ax.uw[12] => eflags[0x044,0x044]
+-cmpw imm16[12] ax.uw[34] => eflags[0x044,0x000]
+-cmpw imm16[34] ax.uw[12] => eflags[0x081,0x081]
+-cmpw imm16[12] ax.uw[34] => eflags[0x081,0x000]
+-cmpw imm16[100] ax.sw[-32700] => eflags[0x800,0x800]
+-cmpw imm16[50] ax.sw[-50] => eflags[0x800,0x000]
+-cmpw imm16[-50] ax.sw[50] => eflags[0x800,0x000]
+-cmpw imm16[-100] ax.sw[32700] => eflags[0x800,0x800]
+-cmpw imm16[3] r16.uw[2] => eflags[0x010,0x010]
+-cmpw imm16[2] r16.uw[3] => eflags[0x010,0x000]
+-cmpw imm16[12] r16.uw[12] => eflags[0x044,0x044]
+-cmpw imm16[12] r16.uw[34] => eflags[0x044,0x000]
+-cmpw imm16[34] r16.uw[12] => eflags[0x081,0x081]
+-cmpw imm16[12] r16.uw[34] => eflags[0x081,0x000]
+-cmpw imm16[100] r16.sw[-32700] => eflags[0x800,0x800]
+-cmpw imm16[50] r16.sw[-50] => eflags[0x800,0x000]
+-cmpw imm16[-50] r16.sw[50] => eflags[0x800,0x000]
+-cmpw imm16[-100] r16.sw[32700] => eflags[0x800,0x800]
+-cmpw imm16[3] m16.uw[2] => eflags[0x010,0x010]
+-cmpw imm16[2] m16.uw[3] => eflags[0x010,0x000]
+-cmpw imm16[12] m16.uw[12] => eflags[0x044,0x044]
+-cmpw imm16[12] m16.uw[34] => eflags[0x044,0x000]
+-cmpw imm16[34] m16.uw[12] => eflags[0x081,0x081]
+-cmpw imm16[12] m16.uw[34] => eflags[0x081,0x000]
+-cmpw imm16[100] m16.sw[-32700] => eflags[0x800,0x800]
+-cmpw imm16[50] m16.sw[-50] => eflags[0x800,0x000]
+-cmpw imm16[-50] m16.sw[50] => eflags[0x800,0x000]
+-cmpw imm16[-100] m16.sw[32700] => eflags[0x800,0x800]
+-cmpw r16.uw[3] r16.uw[2] => eflags[0x010,0x010]
+-cmpw r16.uw[2] r16.uw[3] => eflags[0x010,0x000]
+-cmpw r16.uw[12] r16.uw[12] => eflags[0x044,0x044]
+-cmpw r16.uw[12] r16.uw[34] => eflags[0x044,0x000]
+-cmpw r16.uw[34] r16.uw[12] => eflags[0x081,0x081]
+-cmpw r16.uw[12] r16.uw[34] => eflags[0x081,0x000]
+-cmpw r16.uw[100] r16.sw[-32700] => eflags[0x800,0x800]
+-cmpw r16.uw[50] r16.sw[-50] => eflags[0x800,0x000]
+-cmpw r16.sw[-50] r16.sw[50] => eflags[0x800,0x000]
+-cmpw r16.sw[-100] r16.sw[32700] => eflags[0x800,0x800]
+-cmpw r16.uw[3] m16.uw[2] => eflags[0x010,0x010]
+-cmpw r16.uw[2] m16.uw[3] => eflags[0x010,0x000]
+-cmpw r16.uw[12] m16.uw[12] => eflags[0x044,0x044]
+-cmpw r16.uw[12] m16.uw[34] => eflags[0x044,0x000]
+-cmpw r16.uw[34] m16.uw[12] => eflags[0x081,0x081]
+-cmpw r16.uw[12] m16.uw[34] => eflags[0x081,0x000]
+-cmpw r16.uw[100] m16.sw[-32700] => eflags[0x800,0x800]
+-cmpw r16.uw[50] m16.sw[-50] => eflags[0x800,0x000]
+-cmpw r16.sw[-50] m16.sw[50] => eflags[0x800,0x000]
+-cmpw r16.sw[-100] m16.sw[32700] => eflags[0x800,0x800]
+-cmpw m16.uw[3] r16.uw[2] => eflags[0x010,0x010]
+-cmpw m16.uw[2] r16.uw[3] => eflags[0x010,0x000]
+-cmpw m16.uw[12] r16.uw[12] => eflags[0x044,0x044]
+-cmpw m16.uw[12] r16.uw[34] => eflags[0x044,0x000]
+-cmpw m16.uw[34] r16.uw[12] => eflags[0x081,0x081]
+-cmpw m16.uw[12] r16.uw[34] => eflags[0x081,0x000]
+-cmpw m16.uw[100] r16.sw[-32700] => eflags[0x800,0x800]
+-cmpw m16.uw[50] r16.sw[-50] => eflags[0x800,0x000]
+-cmpw m16.sw[-50] r16.sw[50] => eflags[0x800,0x000]
+-cmpw m16.sw[-100] r16.sw[32700] => eflags[0x800,0x800]
+-cmpl imm8[3] r32.ud[2] => eflags[0x010,0x010]
+-cmpl imm8[2] r32.ud[3] => eflags[0x010,0x000]
+-cmpl imm8[12] r32.ud[12] => eflags[0x044,0x044]
+-###cmpl imm8[12] r32.ud[34] => eflags[0x044,0x000]
+-cmpl imm8[34] r32.ud[12] => eflags[0x081,0x081]
+-cmpl imm8[12] r32.ud[34] => eflags[0x081,0x000]
+-cmpl imm8[100] r32.sd[-2147483600] => eflags[0x800,0x800]
+-cmpl imm8[50] r32.sd[-50] => eflags[0x800,0x000]
+-cmpl imm8[-50] r32.sd[50] => eflags[0x800,0x000]
+-cmpl imm8[-100] r32.sd[2147483600] => eflags[0x800,0x800]
+-cmpl imm8[3] m32.ud[2] => eflags[0x010,0x010]
+-cmpl imm8[2] m32.ud[3] => eflags[0x010,0x000]
+-cmpl imm8[12] m32.ud[12] => eflags[0x044,0x044]
+-cmpl imm8[12] m32.ud[34] => eflags[0x044,0x000]
+-cmpl imm8[34] m32.ud[12] => eflags[0x081,0x081]
+-cmpl imm8[12] m32.ud[34] => eflags[0x081,0x000]
+-cmpl imm8[100] m32.sd[-2147483600] => eflags[0x800,0x800]
+-cmpl imm8[50] m32.sd[-50] => eflags[0x800,0x000]
+-cmpl imm8[-50] m32.sd[50] => eflags[0x800,0x000]
+-cmpl imm8[-100] m32.sd[2147483600] => eflags[0x800,0x800]
+-cmpl imm32[3] eax.ud[2] => eflags[0x010,0x010]
+-cmpl imm32[2] eax.ud[3] => eflags[0x010,0x000]
+-cmpl imm32[12] eax.ud[12] => eflags[0x044,0x044]
+-cmpl imm32[12] eax.ud[34] => eflags[0x044,0x000]
+-cmpl imm32[34] eax.ud[12] => eflags[0x081,0x081]
+-cmpl imm32[12] eax.ud[34] => eflags[0x081,0x000]
+-cmpl imm32[100] eax.sd[-2147483600] => eflags[0x800,0x800]
+-cmpl imm32[50] eax.sd[-50] => eflags[0x800,0x000]
+-cmpl imm32[-50] eax.sd[50] => eflags[0x800,0x000]
+-cmpl imm32[-100] eax.sd[2147483600] => eflags[0x800,0x800]
+-cmpl imm32[3] r32.ud[2] => eflags[0x010,0x010]
+-cmpl imm32[2] r32.ud[3] => eflags[0x010,0x000]
+-cmpl imm32[12] r32.ud[12] => eflags[0x044,0x044]
+-cmpl imm32[12] r32.ud[34] => eflags[0x044,0x000]
+-cmpl imm32[34] r32.ud[12] => eflags[0x081,0x081]
+-cmpl imm32[12] r32.ud[34] => eflags[0x081,0x000]
+-cmpl imm32[100] r32.sd[-2147483600] => eflags[0x800,0x800]
+-cmpl imm32[50] r32.sd[-50] => eflags[0x800,0x000]
+-cmpl imm32[-50] r32.sd[50] => eflags[0x800,0x000]
+-cmpl imm32[-100] r32.sd[2147483600] => eflags[0x800,0x800]
+-cmpl imm32[3] m32.ud[2] => eflags[0x010,0x010]
+-cmpl imm32[2] m32.ud[3] => eflags[0x010,0x000]
+-cmpl imm32[12] m32.ud[12] => eflags[0x044,0x044]
+-cmpl imm32[12] m32.ud[34] => eflags[0x044,0x000]
+-cmpl imm32[34] m32.ud[12] => eflags[0x081,0x081]
+-cmpl imm32[12] m32.ud[34] => eflags[0x081,0x000]
+-cmpl imm32[100] m32.sd[-2147483600] => eflags[0x800,0x800]
+-cmpl imm32[50] m32.sd[-50] => eflags[0x800,0x000]
+-cmpl imm32[-50] m32.sd[50] => eflags[0x800,0x000]
+-cmpl imm32[-100] m32.sd[2147483600] => eflags[0x800,0x800]
+-cmpl r32.ud[3] r32.ud[2] => eflags[0x010,0x010]
+-cmpl r32.ud[2] r32.ud[3] => eflags[0x010,0x000]
+-cmpl r32.ud[12] r32.ud[12] => eflags[0x044,0x044]
+-cmpl r32.ud[12] r32.ud[34] => eflags[0x044,0x000]
+-cmpl r32.ud[34] r32.ud[12] => eflags[0x081,0x081]
+-cmpl r32.ud[12] r32.ud[34] => eflags[0x081,0x000]
+-cmpl r32.ud[100] r32.sd[-2147483600] => eflags[0x800,0x800]
+-cmpl r32.ud[50] r32.sd[-50] => eflags[0x800,0x000]
+-cmpl r32.sd[-50] r32.sd[50] => eflags[0x800,0x000]
+-cmpl r32.sd[-100] r32.sd[2147483600] => eflags[0x800,0x800]
+-cmpl r32.ud[3] m32.ud[2] => eflags[0x010,0x010]
+-cmpl r32.ud[2] m32.ud[3] => eflags[0x010,0x000]
+-cmpl r32.ud[12] m32.ud[12] => eflags[0x044,0x044]
+-cmpl r32.ud[12] m32.ud[34] => eflags[0x044,0x000]
+-cmpl r32.ud[34] m32.ud[12] => eflags[0x081,0x081]
+-cmpl r32.ud[12] m32.ud[34] => eflags[0x081,0x000]
+-cmpl r32.ud[100] m32.sd[-2147483600] => eflags[0x800,0x800]
+-cmpl r32.ud[50] m32.sd[-50] => eflags[0x800,0x000]
+-cmpl r32.sd[-50] m32.sd[50] => eflags[0x800,0x000]
+-cmpl r32.sd[-100] m32.sd[2147483600] => eflags[0x800,0x800]
+-cmpl m32.ud[3] r32.ud[2] => eflags[0x010,0x010]
+-cmpl m32.ud[2] r32.ud[3] => eflags[0x010,0x000]
+-cmpl m32.ud[12] r32.ud[12] => eflags[0x044,0x044]
+-cmpl m32.ud[12] r32.ud[34] => eflags[0x044,0x000]
+-cmpl m32.ud[34] r32.ud[12] => eflags[0x081,0x081]
+-cmpl m32.ud[12] r32.ud[34] => eflags[0x081,0x000]
+-cmpl m32.ud[100] r32.sd[-2147483600] => eflags[0x800,0x800]
+-cmpl m32.ud[50] r32.sd[-50] => eflags[0x800,0x000]
+-cmpl m32.sd[-50] r32.sd[50] => eflags[0x800,0x000]
+-###cmpl m32.sd[-100] r32.sd[2147483600] => eflags[0x800,0x800]
+-cmpq imm8[3] r64.uq[2] => eflags[0x010,0x010]
+-cmpq imm8[2] r64.uq[3] => eflags[0x010,0x000]
+-cmpq imm8[12] r64.uq[12] => eflags[0x044,0x044]
+-cmpq imm8[12] r64.uq[34] => eflags[0x044,0x000]
+-cmpq imm8[34] r64.uq[12] => eflags[0x081,0x081]
+-cmpq imm8[12] r64.uq[34] => eflags[0x081,0x000]
+-cmpq imm8[100] r64.sq[-9223372036854775800] => eflags[0x800,0x800]
+-cmpq imm8[50] r64.sq[-50] => eflags[0x800,0x000]
+-cmpq imm8[-50] r64.sq[50] => eflags[0x800,0x000]
+-cmpq imm8[-100] r64.sq[9223372036854775800] => eflags[0x800,0x800]
+-cmpq imm8[3] m64.uq[2] => eflags[0x010,0x010]
+-cmpq imm8[2] m64.uq[3] => eflags[0x010,0x000]
+-cmpq imm8[12] m64.uq[12] => eflags[0x044,0x044]
+-cmpq imm8[12] m64.uq[34] => eflags[0x044,0x000]
+-cmpq imm8[34] m64.uq[12] => eflags[0x081,0x081]
+-cmpq imm8[12] m64.uq[34] => eflags[0x081,0x000]
+-cmpq imm8[100] m64.sq[-9223372036854775800] => eflags[0x800,0x800]
+-cmpq imm8[50] m64.sq[-50] => eflags[0x800,0x000]
+-cmpq imm8[-50] m64.sq[50] => eflags[0x800,0x000]
+-cmpq imm8[-100] m64.sq[9223372036854775800] => eflags[0x800,0x800]
+-cmpq imm32[3] rax.uq[2] => eflags[0x010,0x010]
+-cmpq imm32[2] rax.uq[3] => eflags[0x010,0x000]
+-cmpq imm32[12] rax.uq[12] => eflags[0x044,0x044]
+-cmpq imm32[12] rax.uq[34] => eflags[0x044,0x000]
+-cmpq imm32[34] rax.uq[12] => eflags[0x081,0x081]
+-cmpq imm32[12] rax.uq[34] => eflags[0x081,0x000]
+-cmpq imm32[100] rax.sq[-9223372036854775800] => eflags[0x800,0x800]
+-cmpq imm32[50] rax.sq[-50] => eflags[0x800,0x000]
+-cmpq imm32[-50] rax.sq[50] => eflags[0x800,0x000]
+-cmpq imm32[-100] rax.sq[9223372036854775800] => eflags[0x800,0x800]
+-cmpq imm32[3] r64.uq[2] => eflags[0x010,0x010]
+-cmpq imm32[2] r64.uq[3] => eflags[0x010,0x000]
+-cmpq imm32[12] r64.uq[12] => eflags[0x044,0x044]
+-cmpq imm32[12] r64.uq[34] => eflags[0x044,0x000]
+-cmpq imm32[34] r64.uq[12] => eflags[0x081,0x081]
+-cmpq imm32[12] r64.uq[34] => eflags[0x081,0x000]
+-cmpq imm32[100] r64.sq[-9223372036854775800] => eflags[0x800,0x800]
+-cmpq imm32[50] r64.sq[-50] => eflags[0x800,0x000]
+-cmpq imm32[-50] r64.sq[50] => eflags[0x800,0x000]
+-cmpq imm32[-100] r64.sq[9223372036854775800] => eflags[0x800,0x800]
+-cmpq imm32[3] m64.uq[2] => eflags[0x010,0x010]
+-cmpq imm32[2] m64.uq[3] => eflags[0x010,0x000]
+-cmpq imm32[12] m64.uq[12] => eflags[0x044,0x044]
+-cmpq imm32[12] m64.uq[34] => eflags[0x044,0x000]
+-cmpq imm32[34] m64.uq[12] => eflags[0x081,0x081]
+-cmpq imm32[12] m64.uq[34] => eflags[0x081,0x000]
+-cmpq imm32[100] m64.sq[-9223372036854775800] => eflags[0x800,0x800]
+-cmpq imm32[50] m64.sq[-50] => eflags[0x800,0x000]
+-cmpq imm32[-50] m64.sq[50] => eflags[0x800,0x000]
+-cmpq imm32[-100] m64.sq[9223372036854775800] => eflags[0x800,0x800]
+-cmpq r64.uq[3] r64.uq[2] => eflags[0x010,0x010]
+-cmpq r64.uq[2] r64.uq[3] => eflags[0x010,0x000]
+-cmpq r64.uq[12] r64.uq[12] => eflags[0x044,0x044]
+-cmpq r64.uq[12] r64.uq[34] => eflags[0x044,0x000]
+-cmpq r64.uq[34] r64.uq[12] => eflags[0x081,0x081]
+-cmpq r64.uq[12] r64.uq[34] => eflags[0x081,0x000]
+-cmpq r64.uq[100] r64.sq[-9223372036854775800] => eflags[0x800,0x800]
+-cmpq r64.uq[50] r64.sq[-50] => eflags[0x800,0x000]
+-cmpq r64.sq[-50] r64.sq[50] => eflags[0x800,0x000]
+-cmpq r64.sq[-100] r64.sq[9223372036854775800] => eflags[0x800,0x800]
+-cmpq r64.uq[3] m64.uq[2] => eflags[0x010,0x010]
+-cmpq r64.uq[2] m64.uq[3] => eflags[0x010,0x000]
+-cmpq r64.uq[12] m64.uq[12] => eflags[0x044,0x044]
+-cmpq r64.uq[12] m64.uq[34] => eflags[0x044,0x000]
+-cmpq r64.uq[34] m64.uq[12] => eflags[0x081,0x081]
+-cmpq r64.uq[12] m64.uq[34] => eflags[0x081,0x000]
+-cmpq r64.uq[100] m64.sq[-9223372036854775800] => eflags[0x800,0x800]
+-cmpq r64.uq[50] m64.sq[-50] => eflags[0x800,0x000]
+-cmpq r64.sq[-50] m64.sq[50] => eflags[0x800,0x000]
+-cmpq r64.sq[-100] m64.sq[9223372036854775800] => eflags[0x800,0x800]
+-cmpq m64.uq[3] r64.uq[2] => eflags[0x010,0x010]
+-cmpq m64.uq[2] r64.uq[3] => eflags[0x010,0x000]
+-cmpq m64.uq[12] r64.uq[12] => eflags[0x044,0x044]
+-cmpq m64.uq[12] r64.uq[34] => eflags[0x044,0x000]
+-cmpq m64.uq[34] r64.uq[12] => eflags[0x081,0x081]
+-cmpq m64.uq[12] r64.uq[34] => eflags[0x081,0x000]
+-cmpq m64.uq[100] r64.sq[-9223372036854775800] => eflags[0x800,0x800]
+-cmpq m64.uq[50] r64.sq[-50] => eflags[0x800,0x000]
+-cmpq m64.sq[-50] r64.sq[50] => eflags[0x800,0x000]
+-cmpq m64.sq[-100] r64.sq[9223372036854775800] => eflags[0x800,0x800]
+-###cmpxchgb eflags[0x40,0x00] al.ub[12] : r8.ub[56] r8.ub[12] => eflags[0x40,0x40] al.ub[12] 0.ub[56] 1.ub[56]
+-###cmpxchgb eflags[0x40,0x40] al.ub[12] : r8.ub[56] r8.ub[34] => eflags[0x40,0x00] al.ub[34] 0.ub[56] 1.ub[34]
+-###cmpxchgb eflags[0x40,0x00] al.ub[12] : r8.ub[56] m8.ub[12] => eflags[0x40,0x40] al.ub[12] 0.ub[56] 1.ub[56]
+-###cmpxchgb eflags[0x40,0x40] al.ub[12] : r8.ub[56] m8.ub[34] => eflags[0x40,0x00] al.ub[34] 0.ub[56] 1.ub[34]
+-###cmpxchgw eflags[0x40,0x00] ax.uw[123] : r16.uw[567] r16.uw[123] => eflags[0x40,0x40] ax.uw[123] 0.uw[567] 1.uw[567]
+-###cmpxchgw eflags[0x40,0x40] ax.uw[123] : r16.uw[567] r16.uw[345] => eflags[0x40,0x00] ax.uw[345] 0.uw[567] 1.uw[345]
+-cmpxchgw eflags[0x40,0x00] ax.uw[123] : r16.uw[567] m16.uw[123] => eflags[0x40,0x40] ax.uw[123] 0.uw[567] 1.uw[567]
+-###cmpxchgw eflags[0x40,0x40] ax.uw[123] : r16.uw[567] m16.uw[345] => eflags[0x40,0x00] ax.uw[345] 0.uw[567] 1.uw[345]
+-###cmpxchgl eflags[0x40,0x00] eax.ud[1234] : r32.ud[5678] r32.ud[1234] => eflags[0x40,0x40] eax.ud[1234] 0.ud[5678] 1.ud[5678]
+-###cmpxchgl eflags[0x40,0x40] eax.ud[1234] : r32.ud[5678] r32.ud[3456] => eflags[0x40,0x00] eax.ud[3456] 0.ud[5678] 1.ud[3456]
+-cmpxchgl eflags[0x40,0x00] eax.ud[1234] : r32.ud[5678] m32.ud[1234] => eflags[0x40,0x40] eax.ud[1234] 0.ud[5678] 1.ud[5678]
+-cmpxchgl eflags[0x40,0x40] eax.ud[1234] : r32.ud[5678] m32.ud[3456] => eflags[0x40,0x00] eax.ud[3456] 0.ud[5678] 1.ud[3456]
+-###cmpxchgq eflags[0x40,0x00] rax.uq[12345] : r64.uq[56789] r64.uq[12345] => eflags[0x40,0x40] rax.uq[12345] 0.uq[56789] 1.uq[56789]
+-###cmpxchgq eflags[0x40,0x40] rax.uq[12345] : r64.uq[56789] r64.uq[34567] => eflags[0x40,0x00] rax.uq[34567] 0.uq[56789] 1.uq[34567]
+-cmpxchgq eflags[0x40,0x00] rax.uq[12345] : r64.uq[56789] m64.uq[12345] => eflags[0x40,0x40] rax.uq[12345] 0.uq[56789] 1.uq[56789]
+-cmpxchgq eflags[0x40,0x40] rax.uq[12345] : r64.uq[56789] m64.uq[34567] => eflags[0x40,0x00] rax.uq[34567] 0.uq[56789] 1.uq[34567]
++###clc rflags[0x001,0x000] : => rflags[0x001,0x000]
++###clc rflags[0x001,0x001] : => rflags[0x001,0x000]
++cld rflags[0x400,0x000] : => rflags[0x400,0x000]
++cld rflags[0x400,0x400] : => rflags[0x400,0x000]
++###cmc rflags[0x001,0x000] : => rflags[0x001,0x001]
++###cmc rflags[0x001,0x001] : => rflags[0x001,0x000]
++cmpb imm8[3] al.ub[2] => rflags[0x010,0x010]
++cmpb imm8[2] al.ub[3] => rflags[0x010,0x000]
++cmpb imm8[12] al.ub[12] => rflags[0x044,0x044]
++cmpb imm8[12] al.ub[34] => rflags[0x044,0x000]
++cmpb imm8[34] al.ub[12] => rflags[0x081,0x081]
++cmpb imm8[12] al.ub[34] => rflags[0x081,0x000]
++cmpb imm8[100] al.sb[-100] => rflags[0x800,0x800]
++cmpb imm8[50] al.sb[-50] => rflags[0x800,0x000]
++cmpb imm8[-50] al.sb[50] => rflags[0x800,0x000]
++cmpb imm8[-100] al.sb[100] => rflags[0x800,0x800]
++cmpb imm8[3] r8.ub[2] => rflags[0x010,0x010]
++cmpb imm8[2] r8.ub[3] => rflags[0x010,0x000]
++cmpb imm8[12] r8.ub[12] => rflags[0x044,0x044]
++cmpb imm8[12] r8.ub[34] => rflags[0x044,0x000]
++cmpb imm8[34] r8.ub[12] => rflags[0x081,0x081]
++cmpb imm8[12] r8.ub[34] => rflags[0x081,0x000]
++cmpb imm8[100] r8.sb[-100] => rflags[0x800,0x800]
++cmpb imm8[50] r8.sb[-50] => rflags[0x800,0x000]
++cmpb imm8[-50] r8.sb[50] => rflags[0x800,0x000]
++cmpb imm8[-100] r8.sb[100] => rflags[0x800,0x800]
++cmpb imm8[3] m8.ub[2] => rflags[0x010,0x010]
++cmpb imm8[2] m8.ub[3] => rflags[0x010,0x000]
++cmpb imm8[12] m8.ub[12] => rflags[0x044,0x044]
++cmpb imm8[12] m8.ub[34] => rflags[0x044,0x000]
++cmpb imm8[34] m8.ub[12] => rflags[0x081,0x081]
++cmpb imm8[12] m8.ub[34] => rflags[0x081,0x000]
++cmpb imm8[100] m8.sb[-100] => rflags[0x800,0x800]
++cmpb imm8[50] m8.sb[-50] => rflags[0x800,0x000]
++cmpb imm8[-50] m8.sb[50] => rflags[0x800,0x000]
++cmpb imm8[-100] m8.sb[100] => rflags[0x800,0x800]
++cmpb r8.ub[3] r8.ub[2] => rflags[0x010,0x010]
++cmpb r8.ub[2] r8.ub[3] => rflags[0x010,0x000]
++cmpb r8.ub[12] r8.ub[12] => rflags[0x044,0x044]
++cmpb r8.ub[12] r8.ub[34] => rflags[0x044,0x000]
++cmpb r8.ub[34] r8.ub[12] => rflags[0x081,0x081]
++cmpb r8.ub[12] r8.ub[34] => rflags[0x081,0x000]
++cmpb r8.ub[100] r8.sb[-100] => rflags[0x800,0x800]
++cmpb r8.ub[50] r8.sb[-50] => rflags[0x800,0x000]
++cmpb r8.sb[-50] r8.sb[50] => rflags[0x800,0x000]
++cmpb r8.sb[-100] r8.sb[100] => rflags[0x800,0x800]
++cmpb r8.ub[3] m8.ub[2] => rflags[0x010,0x010]
++cmpb r8.ub[2] m8.ub[3] => rflags[0x010,0x000]
++cmpb r8.ub[12] m8.ub[12] => rflags[0x044,0x044]
++cmpb r8.ub[12] m8.ub[34] => rflags[0x044,0x000]
++cmpb r8.ub[34] m8.ub[12] => rflags[0x081,0x081]
++cmpb r8.ub[12] m8.ub[34] => rflags[0x081,0x000]
++cmpb r8.ub[100] m8.sb[-100] => rflags[0x800,0x800]
++cmpb r8.ub[50] m8.sb[-50] => rflags[0x800,0x000]
++cmpb r8.sb[-50] m8.sb[50] => rflags[0x800,0x000]
++cmpb r8.sb[-100] m8.sb[100] => rflags[0x800,0x800]
++cmpb m8.ub[3] r8.ub[2] => rflags[0x010,0x010]
++cmpb m8.ub[2] r8.ub[3] => rflags[0x010,0x000]
++cmpb m8.ub[12] r8.ub[12] => rflags[0x044,0x044]
++cmpb m8.ub[12] r8.ub[34] => rflags[0x044,0x000]
++cmpb m8.ub[34] r8.ub[12] => rflags[0x081,0x081]
++cmpb m8.ub[12] r8.ub[34] => rflags[0x081,0x000]
++cmpb m8.ub[100] r8.sb[-100] => rflags[0x800,0x800]
++cmpb m8.ub[50] r8.sb[-50] => rflags[0x800,0x000]
++cmpb m8.sb[-50] r8.sb[50] => rflags[0x800,0x000]
++cmpb m8.sb[-100] r8.sb[100] => rflags[0x800,0x800]
++cmpw imm8[3] r16.uw[2] => rflags[0x010,0x010]
++cmpw imm8[2] r16.uw[3] => rflags[0x010,0x000]
++cmpw imm8[12] r16.uw[12] => rflags[0x044,0x044]
++cmpw imm8[12] r16.uw[34] => rflags[0x044,0x000]
++cmpw imm8[34] r16.uw[12] => rflags[0x081,0x081]
++cmpw imm8[12] r16.uw[34] => rflags[0x081,0x000]
++cmpw imm8[100] r16.sw[-32700] => rflags[0x800,0x800]
++cmpw imm8[50] r16.sw[-50] => rflags[0x800,0x000]
++cmpw imm8[-50] r16.sw[50] => rflags[0x800,0x000]
++cmpw imm8[-100] r16.sw[32700] => rflags[0x800,0x800]
++cmpw imm8[3] m16.uw[2] => rflags[0x010,0x010]
++cmpw imm8[2] m16.uw[3] => rflags[0x010,0x000]
++cmpw imm8[12] m16.uw[12] => rflags[0x044,0x044]
++cmpw imm8[12] m16.uw[34] => rflags[0x044,0x000]
++cmpw imm8[34] m16.uw[12] => rflags[0x081,0x081]
++cmpw imm8[12] m16.uw[34] => rflags[0x081,0x000]
++cmpw imm8[100] m16.sw[-32700] => rflags[0x800,0x800]
++cmpw imm8[50] m16.sw[-50] => rflags[0x800,0x000]
++cmpw imm8[-50] m16.sw[50] => rflags[0x800,0x000]
++cmpw imm8[-100] m16.sw[32700] => rflags[0x800,0x800]
++cmpw imm16[3] ax.uw[2] => rflags[0x010,0x010]
++cmpw imm16[2] ax.uw[3] => rflags[0x010,0x000]
++cmpw imm16[12] ax.uw[12] => rflags[0x044,0x044]
++cmpw imm16[12] ax.uw[34] => rflags[0x044,0x000]
++cmpw imm16[34] ax.uw[12] => rflags[0x081,0x081]
++cmpw imm16[12] ax.uw[34] => rflags[0x081,0x000]
++cmpw imm16[100] ax.sw[-32700] => rflags[0x800,0x800]
++cmpw imm16[50] ax.sw[-50] => rflags[0x800,0x000]
++cmpw imm16[-50] ax.sw[50] => rflags[0x800,0x000]
++cmpw imm16[-100] ax.sw[32700] => rflags[0x800,0x800]
++cmpw imm16[3] r16.uw[2] => rflags[0x010,0x010]
++cmpw imm16[2] r16.uw[3] => rflags[0x010,0x000]
++cmpw imm16[12] r16.uw[12] => rflags[0x044,0x044]
++cmpw imm16[12] r16.uw[34] => rflags[0x044,0x000]
++cmpw imm16[34] r16.uw[12] => rflags[0x081,0x081]
++cmpw imm16[12] r16.uw[34] => rflags[0x081,0x000]
++cmpw imm16[100] r16.sw[-32700] => rflags[0x800,0x800]
++cmpw imm16[50] r16.sw[-50] => rflags[0x800,0x000]
++cmpw imm16[-50] r16.sw[50] => rflags[0x800,0x000]
++cmpw imm16[-100] r16.sw[32700] => rflags[0x800,0x800]
++cmpw imm16[3] m16.uw[2] => rflags[0x010,0x010]
++cmpw imm16[2] m16.uw[3] => rflags[0x010,0x000]
++cmpw imm16[12] m16.uw[12] => rflags[0x044,0x044]
++cmpw imm16[12] m16.uw[34] => rflags[0x044,0x000]
++cmpw imm16[34] m16.uw[12] => rflags[0x081,0x081]
++cmpw imm16[12] m16.uw[34] => rflags[0x081,0x000]
++cmpw imm16[100] m16.sw[-32700] => rflags[0x800,0x800]
++cmpw imm16[50] m16.sw[-50] => rflags[0x800,0x000]
++cmpw imm16[-50] m16.sw[50] => rflags[0x800,0x000]
++cmpw imm16[-100] m16.sw[32700] => rflags[0x800,0x800]
++cmpw r16.uw[3] r16.uw[2] => rflags[0x010,0x010]
++cmpw r16.uw[2] r16.uw[3] => rflags[0x010,0x000]
++cmpw r16.uw[12] r16.uw[12] => rflags[0x044,0x044]
++cmpw r16.uw[12] r16.uw[34] => rflags[0x044,0x000]
++cmpw r16.uw[34] r16.uw[12] => rflags[0x081,0x081]
++cmpw r16.uw[12] r16.uw[34] => rflags[0x081,0x000]
++cmpw r16.uw[100] r16.sw[-32700] => rflags[0x800,0x800]
++cmpw r16.uw[50] r16.sw[-50] => rflags[0x800,0x000]
++cmpw r16.sw[-50] r16.sw[50] => rflags[0x800,0x000]
++cmpw r16.sw[-100] r16.sw[32700] => rflags[0x800,0x800]
++cmpw r16.uw[3] m16.uw[2] => rflags[0x010,0x010]
++cmpw r16.uw[2] m16.uw[3] => rflags[0x010,0x000]
++cmpw r16.uw[12] m16.uw[12] => rflags[0x044,0x044]
++cmpw r16.uw[12] m16.uw[34] => rflags[0x044,0x000]
++cmpw r16.uw[34] m16.uw[12] => rflags[0x081,0x081]
++cmpw r16.uw[12] m16.uw[34] => rflags[0x081,0x000]
++cmpw r16.uw[100] m16.sw[-32700] => rflags[0x800,0x800]
++cmpw r16.uw[50] m16.sw[-50] => rflags[0x800,0x000]
++cmpw r16.sw[-50] m16.sw[50] => rflags[0x800,0x000]
++cmpw r16.sw[-100] m16.sw[32700] => rflags[0x800,0x800]
++cmpw m16.uw[3] r16.uw[2] => rflags[0x010,0x010]
++cmpw m16.uw[2] r16.uw[3] => rflags[0x010,0x000]
++cmpw m16.uw[12] r16.uw[12] => rflags[0x044,0x044]
++cmpw m16.uw[12] r16.uw[34] => rflags[0x044,0x000]
++cmpw m16.uw[34] r16.uw[12] => rflags[0x081,0x081]
++cmpw m16.uw[12] r16.uw[34] => rflags[0x081,0x000]
++cmpw m16.uw[100] r16.sw[-32700] => rflags[0x800,0x800]
++cmpw m16.uw[50] r16.sw[-50] => rflags[0x800,0x000]
++cmpw m16.sw[-50] r16.sw[50] => rflags[0x800,0x000]
++cmpw m16.sw[-100] r16.sw[32700] => rflags[0x800,0x800]
++cmpl imm8[3] r32.ud[2] => rflags[0x010,0x010]
++cmpl imm8[2] r32.ud[3] => rflags[0x010,0x000]
++cmpl imm8[12] r32.ud[12] => rflags[0x044,0x044]
++###cmpl imm8[12] r32.ud[34] => rflags[0x044,0x000]
++cmpl imm8[34] r32.ud[12] => rflags[0x081,0x081]
++cmpl imm8[12] r32.ud[34] => rflags[0x081,0x000]
++cmpl imm8[100] r32.sd[-2147483600] => rflags[0x800,0x800]
++cmpl imm8[50] r32.sd[-50] => rflags[0x800,0x000]
++cmpl imm8[-50] r32.sd[50] => rflags[0x800,0x000]
++cmpl imm8[-100] r32.sd[2147483600] => rflags[0x800,0x800]
++cmpl imm8[3] m32.ud[2] => rflags[0x010,0x010]
++cmpl imm8[2] m32.ud[3] => rflags[0x010,0x000]
++cmpl imm8[12] m32.ud[12] => rflags[0x044,0x044]
++cmpl imm8[12] m32.ud[34] => rflags[0x044,0x000]
++cmpl imm8[34] m32.ud[12] => rflags[0x081,0x081]
++cmpl imm8[12] m32.ud[34] => rflags[0x081,0x000]
++cmpl imm8[100] m32.sd[-2147483600] => rflags[0x800,0x800]
++cmpl imm8[50] m32.sd[-50] => rflags[0x800,0x000]
++cmpl imm8[-50] m32.sd[50] => rflags[0x800,0x000]
++cmpl imm8[-100] m32.sd[2147483600] => rflags[0x800,0x800]
++cmpl imm32[3] eax.ud[2] => rflags[0x010,0x010]
++cmpl imm32[2] eax.ud[3] => rflags[0x010,0x000]
++cmpl imm32[12] eax.ud[12] => rflags[0x044,0x044]
++cmpl imm32[12] eax.ud[34] => rflags[0x044,0x000]
++cmpl imm32[34] eax.ud[12] => rflags[0x081,0x081]
++cmpl imm32[12] eax.ud[34] => rflags[0x081,0x000]
++cmpl imm32[100] eax.sd[-2147483600] => rflags[0x800,0x800]
++cmpl imm32[50] eax.sd[-50] => rflags[0x800,0x000]
++cmpl imm32[-50] eax.sd[50] => rflags[0x800,0x000]
++cmpl imm32[-100] eax.sd[2147483600] => rflags[0x800,0x800]
++cmpl imm32[3] r32.ud[2] => rflags[0x010,0x010]
++cmpl imm32[2] r32.ud[3] => rflags[0x010,0x000]
++cmpl imm32[12] r32.ud[12] => rflags[0x044,0x044]
++cmpl imm32[12] r32.ud[34] => rflags[0x044,0x000]
++cmpl imm32[34] r32.ud[12] => rflags[0x081,0x081]
++cmpl imm32[12] r32.ud[34] => rflags[0x081,0x000]
++cmpl imm32[100] r32.sd[-2147483600] => rflags[0x800,0x800]
++cmpl imm32[50] r32.sd[-50] => rflags[0x800,0x000]
++cmpl imm32[-50] r32.sd[50] => rflags[0x800,0x000]
++cmpl imm32[-100] r32.sd[2147483600] => rflags[0x800,0x800]
++cmpl imm32[3] m32.ud[2] => rflags[0x010,0x010]
++cmpl imm32[2] m32.ud[3] => rflags[0x010,0x000]
++cmpl imm32[12] m32.ud[12] => rflags[0x044,0x044]
++cmpl imm32[12] m32.ud[34] => rflags[0x044,0x000]
++cmpl imm32[34] m32.ud[12] => rflags[0x081,0x081]
++cmpl imm32[12] m32.ud[34] => rflags[0x081,0x000]
++cmpl imm32[100] m32.sd[-2147483600] => rflags[0x800,0x800]
++cmpl imm32[50] m32.sd[-50] => rflags[0x800,0x000]
++cmpl imm32[-50] m32.sd[50] => rflags[0x800,0x000]
++cmpl imm32[-100] m32.sd[2147483600] => rflags[0x800,0x800]
++cmpl r32.ud[3] r32.ud[2] => rflags[0x010,0x010]
++cmpl r32.ud[2] r32.ud[3] => rflags[0x010,0x000]
++cmpl r32.ud[12] r32.ud[12] => rflags[0x044,0x044]
++cmpl r32.ud[12] r32.ud[34] => rflags[0x044,0x000]
++cmpl r32.ud[34] r32.ud[12] => rflags[0x081,0x081]
++cmpl r32.ud[12] r32.ud[34] => rflags[0x081,0x000]
++cmpl r32.ud[100] r32.sd[-2147483600] => rflags[0x800,0x800]
++cmpl r32.ud[50] r32.sd[-50] => rflags[0x800,0x000]
++cmpl r32.sd[-50] r32.sd[50] => rflags[0x800,0x000]
++cmpl r32.sd[-100] r32.sd[2147483600] => rflags[0x800,0x800]
++cmpl r32.ud[3] m32.ud[2] => rflags[0x010,0x010]
++cmpl r32.ud[2] m32.ud[3] => rflags[0x010,0x000]
++cmpl r32.ud[12] m32.ud[12] => rflags[0x044,0x044]
++cmpl r32.ud[12] m32.ud[34] => rflags[0x044,0x000]
++cmpl r32.ud[34] m32.ud[12] => rflags[0x081,0x081]
++cmpl r32.ud[12] m32.ud[34] => rflags[0x081,0x000]
++cmpl r32.ud[100] m32.sd[-2147483600] => rflags[0x800,0x800]
++cmpl r32.ud[50] m32.sd[-50] => rflags[0x800,0x000]
++cmpl r32.sd[-50] m32.sd[50] => rflags[0x800,0x000]
++cmpl r32.sd[-100] m32.sd[2147483600] => rflags[0x800,0x800]
++cmpl m32.ud[3] r32.ud[2] => rflags[0x010,0x010]
++cmpl m32.ud[2] r32.ud[3] => rflags[0x010,0x000]
++cmpl m32.ud[12] r32.ud[12] => rflags[0x044,0x044]
++cmpl m32.ud[12] r32.ud[34] => rflags[0x044,0x000]
++cmpl m32.ud[34] r32.ud[12] => rflags[0x081,0x081]
++cmpl m32.ud[12] r32.ud[34] => rflags[0x081,0x000]
++cmpl m32.ud[100] r32.sd[-2147483600] => rflags[0x800,0x800]
++cmpl m32.ud[50] r32.sd[-50] => rflags[0x800,0x000]
++cmpl m32.sd[-50] r32.sd[50] => rflags[0x800,0x000]
++###cmpl m32.sd[-100] r32.sd[2147483600] => rflags[0x800,0x800]
++cmpq imm8[3] r64.uq[2] => rflags[0x010,0x010]
++cmpq imm8[2] r64.uq[3] => rflags[0x010,0x000]
++cmpq imm8[12] r64.uq[12] => rflags[0x044,0x044]
++cmpq imm8[12] r64.uq[34] => rflags[0x044,0x000]
++cmpq imm8[34] r64.uq[12] => rflags[0x081,0x081]
++cmpq imm8[12] r64.uq[34] => rflags[0x081,0x000]
++cmpq imm8[100] r64.sq[-9223372036854775800] => rflags[0x800,0x800]
++cmpq imm8[50] r64.sq[-50] => rflags[0x800,0x000]
++cmpq imm8[-50] r64.sq[50] => rflags[0x800,0x000]
++cmpq imm8[-100] r64.sq[9223372036854775800] => rflags[0x800,0x800]
++cmpq imm8[3] m64.uq[2] => rflags[0x010,0x010]
++cmpq imm8[2] m64.uq[3] => rflags[0x010,0x000]
++cmpq imm8[12] m64.uq[12] => rflags[0x044,0x044]
++cmpq imm8[12] m64.uq[34] => rflags[0x044,0x000]
++cmpq imm8[34] m64.uq[12] => rflags[0x081,0x081]
++cmpq imm8[12] m64.uq[34] => rflags[0x081,0x000]
++cmpq imm8[100] m64.sq[-9223372036854775800] => rflags[0x800,0x800]
++cmpq imm8[50] m64.sq[-50] => rflags[0x800,0x000]
++cmpq imm8[-50] m64.sq[50] => rflags[0x800,0x000]
++cmpq imm8[-100] m64.sq[9223372036854775800] => rflags[0x800,0x800]
++cmpq imm32[3] rax.uq[2] => rflags[0x010,0x010]
++cmpq imm32[2] rax.uq[3] => rflags[0x010,0x000]
++cmpq imm32[12] rax.uq[12] => rflags[0x044,0x044]
++cmpq imm32[12] rax.uq[34] => rflags[0x044,0x000]
++cmpq imm32[34] rax.uq[12] => rflags[0x081,0x081]
++cmpq imm32[12] rax.uq[34] => rflags[0x081,0x000]
++cmpq imm32[100] rax.sq[-9223372036854775800] => rflags[0x800,0x800]
++cmpq imm32[50] rax.sq[-50] => rflags[0x800,0x000]
++cmpq imm32[-50] rax.sq[50] => rflags[0x800,0x000]
++cmpq imm32[-100] rax.sq[9223372036854775800] => rflags[0x800,0x800]
++cmpq imm32[3] r64.uq[2] => rflags[0x010,0x010]
++cmpq imm32[2] r64.uq[3] => rflags[0x010,0x000]
++cmpq imm32[12] r64.uq[12] => rflags[0x044,0x044]
++cmpq imm32[12] r64.uq[34] => rflags[0x044,0x000]
++cmpq imm32[34] r64.uq[12] => rflags[0x081,0x081]
++cmpq imm32[12] r64.uq[34] => rflags[0x081,0x000]
++cmpq imm32[100] r64.sq[-9223372036854775800] => rflags[0x800,0x800]
++cmpq imm32[50] r64.sq[-50] => rflags[0x800,0x000]
++cmpq imm32[-50] r64.sq[50] => rflags[0x800,0x000]
++cmpq imm32[-100] r64.sq[9223372036854775800] => rflags[0x800,0x800]
++cmpq imm32[3] m64.uq[2] => rflags[0x010,0x010]
++cmpq imm32[2] m64.uq[3] => rflags[0x010,0x000]
++cmpq imm32[12] m64.uq[12] => rflags[0x044,0x044]
++cmpq imm32[12] m64.uq[34] => rflags[0x044,0x000]
++cmpq imm32[34] m64.uq[12] => rflags[0x081,0x081]
++cmpq imm32[12] m64.uq[34] => rflags[0x081,0x000]
++cmpq imm32[100] m64.sq[-9223372036854775800] => rflags[0x800,0x800]
++cmpq imm32[50] m64.sq[-50] => rflags[0x800,0x000]
++cmpq imm32[-50] m64.sq[50] => rflags[0x800,0x000]
++cmpq imm32[-100] m64.sq[9223372036854775800] => rflags[0x800,0x800]
++cmpq r64.uq[3] r64.uq[2] => rflags[0x010,0x010]
++cmpq r64.uq[2] r64.uq[3] => rflags[0x010,0x000]
++cmpq r64.uq[12] r64.uq[12] => rflags[0x044,0x044]
++cmpq r64.uq[12] r64.uq[34] => rflags[0x044,0x000]
++cmpq r64.uq[34] r64.uq[12] => rflags[0x081,0x081]
++cmpq r64.uq[12] r64.uq[34] => rflags[0x081,0x000]
++cmpq r64.uq[100] r64.sq[-9223372036854775800] => rflags[0x800,0x800]
++cmpq r64.uq[50] r64.sq[-50] => rflags[0x800,0x000]
++cmpq r64.sq[-50] r64.sq[50] => rflags[0x800,0x000]
++cmpq r64.sq[-100] r64.sq[9223372036854775800] => rflags[0x800,0x800]
++cmpq r64.uq[3] m64.uq[2] => rflags[0x010,0x010]
++cmpq r64.uq[2] m64.uq[3] => rflags[0x010,0x000]
++cmpq r64.uq[12] m64.uq[12] => rflags[0x044,0x044]
++cmpq r64.uq[12] m64.uq[34] => rflags[0x044,0x000]
++cmpq r64.uq[34] m64.uq[12] => rflags[0x081,0x081]
++cmpq r64.uq[12] m64.uq[34] => rflags[0x081,0x000]
++cmpq r64.uq[100] m64.sq[-9223372036854775800] => rflags[0x800,0x800]
++cmpq r64.uq[50] m64.sq[-50] => rflags[0x800,0x000]
++cmpq r64.sq[-50] m64.sq[50] => rflags[0x800,0x000]
++cmpq r64.sq[-100] m64.sq[9223372036854775800] => rflags[0x800,0x800]
++cmpq m64.uq[3] r64.uq[2] => rflags[0x010,0x010]
++cmpq m64.uq[2] r64.uq[3] => rflags[0x010,0x000]
++cmpq m64.uq[12] r64.uq[12] => rflags[0x044,0x044]
++cmpq m64.uq[12] r64.uq[34] => rflags[0x044,0x000]
++cmpq m64.uq[34] r64.uq[12] => rflags[0x081,0x081]
++cmpq m64.uq[12] r64.uq[34] => rflags[0x081,0x000]
++cmpq m64.uq[100] r64.sq[-9223372036854775800] => rflags[0x800,0x800]
++cmpq m64.uq[50] r64.sq[-50] => rflags[0x800,0x000]
++cmpq m64.sq[-50] r64.sq[50] => rflags[0x800,0x000]
++cmpq m64.sq[-100] r64.sq[9223372036854775800] => rflags[0x800,0x800]
++###cmpxchgb rflags[0x40,0x00] al.ub[12] : r8.ub[56] r8.ub[12] => rflags[0x40,0x40] al.ub[12] 0.ub[56] 1.ub[56]
++###cmpxchgb rflags[0x40,0x40] al.ub[12] : r8.ub[56] r8.ub[34] => rflags[0x40,0x00] al.ub[34] 0.ub[56] 1.ub[34]
++###cmpxchgb rflags[0x40,0x00] al.ub[12] : r8.ub[56] m8.ub[12] => rflags[0x40,0x40] al.ub[12] 0.ub[56] 1.ub[56]
++###cmpxchgb rflags[0x40,0x40] al.ub[12] : r8.ub[56] m8.ub[34] => rflags[0x40,0x00] al.ub[34] 0.ub[56] 1.ub[34]
++###cmpxchgw rflags[0x40,0x00] ax.uw[123] : r16.uw[567] r16.uw[123] => rflags[0x40,0x40] ax.uw[123] 0.uw[567] 1.uw[567]
++###cmpxchgw rflags[0x40,0x40] ax.uw[123] : r16.uw[567] r16.uw[345] => rflags[0x40,0x00] ax.uw[345] 0.uw[567] 1.uw[345]
++cmpxchgw rflags[0x40,0x00] ax.uw[123] : r16.uw[567] m16.uw[123] => rflags[0x40,0x40] ax.uw[123] 0.uw[567] 1.uw[567]
++###cmpxchgw rflags[0x40,0x40] ax.uw[123] : r16.uw[567] m16.uw[345] => rflags[0x40,0x00] ax.uw[345] 0.uw[567] 1.uw[345]
++###cmpxchgl rflags[0x40,0x00] eax.ud[1234] : r32.ud[5678] r32.ud[1234] => rflags[0x40,0x40] eax.ud[1234] 0.ud[5678] 1.ud[5678]
++###cmpxchgl rflags[0x40,0x40] eax.ud[1234] : r32.ud[5678] r32.ud[3456] => rflags[0x40,0x00] eax.ud[3456] 0.ud[5678] 1.ud[3456]
++cmpxchgl rflags[0x40,0x00] eax.ud[1234] : r32.ud[5678] m32.ud[1234] => rflags[0x40,0x40] eax.ud[1234] 0.ud[5678] 1.ud[5678]
++cmpxchgl rflags[0x40,0x40] eax.ud[1234] : r32.ud[5678] m32.ud[3456] => rflags[0x40,0x00] eax.ud[3456] 0.ud[5678] 1.ud[3456]
++###cmpxchgq rflags[0x40,0x00] rax.uq[12345] : r64.uq[56789] r64.uq[12345] => rflags[0x40,0x40] rax.uq[12345] 0.uq[56789] 1.uq[56789]
++###cmpxchgq rflags[0x40,0x40] rax.uq[12345] : r64.uq[56789] r64.uq[34567] => rflags[0x40,0x00] rax.uq[34567] 0.uq[56789] 1.uq[34567]
++cmpxchgq rflags[0x40,0x00] rax.uq[12345] : r64.uq[56789] m64.uq[12345] => rflags[0x40,0x40] rax.uq[12345] 0.uq[56789] 1.uq[56789]
++cmpxchgq rflags[0x40,0x40] rax.uq[12345] : r64.uq[56789] m64.uq[34567] => rflags[0x40,0x00] rax.uq[34567] 0.uq[56789] 1.uq[34567]
+ cqo rax.uq[0x0123456789abcdef] : => rdx.uq[0x0000000000000000] rax.uq[0x0123456789abcdef]
+ cqo rax.uq[0xfedcba9876543210] : => rdx.uq[0xffffffffffffffff] rax.uq[0xfedcba9876543210]
+ cwd ax.uw[0x1234] : => dx.uw[0x0000] ax.uw[0x1234]
+@@ -617,8 +617,8 @@ incl r32.ud[12345678] => 0.ud[12345679]
+ incl m32.ud[12345678] => 0.ud[12345679]
+ incq r64.uq[1234567813572468] => 0.uq[1234567813572469]
+ incq m64.uq[1234567813572468] => 0.uq[1234567813572469]
+-###lahf eflags[0xff,0xfd] ah.ub[0x28] : => ah.ub[0xd7]
+-###lahf eflags[0xff,0x28] ah.ub[0xfd] : => ah.ub[0x02]
++###lahf rflags[0xff,0xfd] ah.ub[0x28] : => ah.ub[0xd7]
++###lahf rflags[0xff,0x28] ah.ub[0xfd] : => ah.ub[0x02]
+ movb imm8[123] r8.ub[0] => 1.ub[123]
+ movb imm8[123] m8.ub[0] => 1.ub[123]
+ movb r8.ub[123] r8.ub[0] => 1.ub[123]
+@@ -714,54 +714,54 @@ orq imm32[-2042464975] m64.uq[0x1234567812345678] => 1.uq[0xffffffff96767779]
+ orq r64.uq[0xeca86420fdb97531] r64.uq[0x0123456789abcdef] => 1.uq[0xedab6567fdbbfdff]
+ orq r64.uq[0xeca86420fdb97531] m64.uq[0x0123456789abcdef] => 1.uq[0xedab6567fdbbfdff]
+ orq m64.uq[0xeca86420fdb97531] r64.uq[0x0123456789abcdef] => 1.uq[0xedab6567fdbbfdff]
+-###rclb eflags[0x1,0x0] : r8.ub[0xca] => 0.ub[0x94] eflags[0x1,0x1]
+-###rclb eflags[0x1,0x0] : m8.ub[0xca] => 0.ub[0x94] eflags[0x1,0x1]
+-###rclb eflags[0x1,0x0] : imm8[2] r8.ub[0xca] => 1.ub[0x29] eflags[0x1,0x1]
+-###rclb eflags[0x1,0x0] : imm8[2] m8.ub[0xca] => 1.ub[0x29] eflags[0x1,0x1]
+-###rclb eflags[0x1,0x0] : cl.ub[2] r8.ub[0xca] => 1.ub[0x29] eflags[0x1,0x1]
+-###rclb eflags[0x1,0x0] : cl.ub[2] m8.ub[0xca] => 1.ub[0x29] eflags[0x1,0x1]
+-###rclw eflags[0x1,0x0] : r16.uw[0xf0ca] => 0.uw[0xe194] eflags[0x1,0x1]
+-###rclw eflags[0x1,0x0] : m16.uw[0xf0ca] => 0.uw[0xe194] eflags[0x1,0x1]
+-###rclw eflags[0x1,0x0] : imm8[4] r16.uw[0xf0ca] => 1.uw[0x0ca7] eflags[0x1,0x1]
+-###rclw eflags[0x1,0x0] : imm8[4] m16.uw[0xf0ca] => 1.uw[0x0ca7] eflags[0x1,0x1]
+-###rclw eflags[0x1,0x0] : cl.ub[4] r16.uw[0xf0ca] => 1.uw[0x0ca7] eflags[0x1,0x1]
+-###rclw eflags[0x1,0x0] : cl.ub[4] m16.uw[0xf0ca] => 1.uw[0x0ca7] eflags[0x1,0x1]
+-###rcll eflags[0x1,0x0] : r32.ud[0xff00f0ca] => 0.ud[0xfe01e194] eflags[0x1,0x1]
+-###rcll eflags[0x1,0x0] : m32.ud[0xff00f0ca] => 0.ud[0xfe01e194] eflags[0x1,0x1]
+-###rcll eflags[0x1,0x0] : imm8[8] r32.ud[0xff00f0ca] => 1.ud[0x00f0ca7f] eflags[0x1,0x1]
+-###rcll eflags[0x1,0x0] : imm8[8] m32.ud[0xff00f0ca] => 1.ud[0x00f0ca7f] eflags[0x1,0x1]
+-###rcll eflags[0x1,0x0] : cl.ub[8] r32.ud[0xff00f0ca] => 1.ud[0x00f0ca7f] eflags[0x1,0x1]
+-###rcll eflags[0x1,0x0] : cl.ub[8] m32.ud[0xff00f0ca] => 1.ud[0x00f0ca7f] eflags[0x1,0x1]
+-###rclq eflags[0x1,0x0] : r64.uq[0xffff0000ff00f0ca] => 0.uq[0xfffe0001fe01e194] eflags[0x1,0x1]
+-###rclq eflags[0x1,0x0] : m64.uq[0xffff0000ff00f0ca] => 0.uq[0xfffe0001fe01e194] eflags[0x1,0x1]
+-###rclq eflags[0x1,0x0] : imm8[16] r64.uq[0xffff0000ff00f0ca] => 1.uq[0x0000ff00f0ca7fff] eflags[0x1,0x1]
+-###rclq eflags[0x1,0x0] : imm8[16] m64.uq[0xffff0000ff00f0ca] => 1.uq[0x0000ff00f0ca7fff] eflags[0x1,0x1]
+-###rclq eflags[0x1,0x0] : cl.ub[16] r64.uq[0xffff0000ff00f0ca] => 1.uq[0x0000ff00f0ca7fff] eflags[0x1,0x1]
+-###rclq eflags[0x1,0x0] : cl.ub[16] m64.uq[0xffff0000ff00f0ca] => 1.uq[0x0000ff00f0ca7fff] eflags[0x1,0x1]
+-rcrb eflags[0x1,0x1] : r8.ub[0xca] => 0.ub[0xe5] eflags[0x1,0x0]
+-rcrb eflags[0x1,0x1] : m8.ub[0xca] => 0.ub[0xe5] eflags[0x1,0x0]
+-rcrb eflags[0x1,0x0] : imm8[2] r8.ub[0xca] => 1.ub[0x32] eflags[0x1,0x1]
+-rcrb eflags[0x1,0x0] : imm8[2] m8.ub[0xca] => 1.ub[0x32] eflags[0x1,0x1]
+-rcrb eflags[0x1,0x0] : cl.ub[2] r8.ub[0xca] => 1.ub[0x32] eflags[0x1,0x1]
+-rcrb eflags[0x1,0x0] : cl.ub[2] m8.ub[0xca] => 1.ub[0x32] eflags[0x1,0x1]
+-rcrw eflags[0x1,0x1] : r16.uw[0xf0ca] => 0.uw[0xf865] eflags[0x1,0x0]
+-rcrw eflags[0x1,0x1] : m16.uw[0xf0ca] => 0.uw[0xf865] eflags[0x1,0x0]
+-rcrw eflags[0x1,0x0] : imm8[4] r16.uw[0xf0ca] => 1.uw[0x4f0c] eflags[0x1,0x1]
+-rcrw eflags[0x1,0x0] : imm8[4] m16.uw[0xf0ca] => 1.uw[0x4f0c] eflags[0x1,0x1]
+-rcrw eflags[0x1,0x0] : cl.ub[4] r16.uw[0xf0ca] => 1.uw[0x4f0c] eflags[0x1,0x1]
+-rcrw eflags[0x1,0x0] : cl.ub[4] m16.uw[0xf0ca] => 1.uw[0x4f0c] eflags[0x1,0x1]
+-rcrl eflags[0x1,0x1] : r32.ud[0xff00f0ca] => 0.ud[0xff807865] eflags[0x1,0x0]
+-rcrl eflags[0x1,0x1] : m32.ud[0xff00f0ca] => 0.ud[0xff807865] eflags[0x1,0x0]
+-rcrl eflags[0x1,0x0] : imm8[8] r32.ud[0xff00f0ca] => 1.ud[0x94ff00f0] eflags[0x1,0x1]
+-rcrl eflags[0x1,0x0] : imm8[8] m32.ud[0xff00f0ca] => 1.ud[0x94ff00f0] eflags[0x1,0x1]
+-rcrl eflags[0x1,0x0] : cl.ub[8] r32.ud[0xff00f0ca] => 1.ud[0x94ff00f0] eflags[0x1,0x1]
+-rcrl eflags[0x1,0x0] : cl.ub[8] m32.ud[0xff00f0ca] => 1.ud[0x94ff00f0] eflags[0x1,0x1]
+-rcrq eflags[0x1,0x1] : r64.uq[0xffff0000ff00f0ca] => 0.uq[0xffff80007f807865] eflags[0x1,0x0]
+-rcrq eflags[0x1,0x1] : m64.uq[0xffff0000ff00f0ca] => 0.uq[0xffff80007f807865] eflags[0x1,0x0]
+-rcrq eflags[0x1,0x0] : imm8[16] r64.uq[0xffff0000ff00f0ca] => 1.uq[0xe194ffff0000ff00] eflags[0x1,0x1]
+-rcrq eflags[0x1,0x0] : imm8[16] m64.uq[0xffff0000ff00f0ca] => 1.uq[0xe194ffff0000ff00] eflags[0x1,0x1]
+-rcrq eflags[0x1,0x0] : cl.ub[16] r64.uq[0xffff0000ff00f0ca] => 1.uq[0xe194ffff0000ff00] eflags[0x1,0x1]
+-rcrq eflags[0x1,0x0] : cl.ub[16] m64.uq[0xffff0000ff00f0ca] => 1.uq[0xe194ffff0000ff00] eflags[0x1,0x1]
++###rclb rflags[0x1,0x0] : r8.ub[0xca] => 0.ub[0x94] rflags[0x1,0x1]
++###rclb rflags[0x1,0x0] : m8.ub[0xca] => 0.ub[0x94] rflags[0x1,0x1]
++###rclb rflags[0x1,0x0] : imm8[2] r8.ub[0xca] => 1.ub[0x29] rflags[0x1,0x1]
++###rclb rflags[0x1,0x0] : imm8[2] m8.ub[0xca] => 1.ub[0x29] rflags[0x1,0x1]
++###rclb rflags[0x1,0x0] : cl.ub[2] r8.ub[0xca] => 1.ub[0x29] rflags[0x1,0x1]
++###rclb rflags[0x1,0x0] : cl.ub[2] m8.ub[0xca] => 1.ub[0x29] rflags[0x1,0x1]
++###rclw rflags[0x1,0x0] : r16.uw[0xf0ca] => 0.uw[0xe194] rflags[0x1,0x1]
++###rclw rflags[0x1,0x0] : m16.uw[0xf0ca] => 0.uw[0xe194] rflags[0x1,0x1]
++###rclw rflags[0x1,0x0] : imm8[4] r16.uw[0xf0ca] => 1.uw[0x0ca7] rflags[0x1,0x1]
++###rclw rflags[0x1,0x0] : imm8[4] m16.uw[0xf0ca] => 1.uw[0x0ca7] rflags[0x1,0x1]
++###rclw rflags[0x1,0x0] : cl.ub[4] r16.uw[0xf0ca] => 1.uw[0x0ca7] rflags[0x1,0x1]
++###rclw rflags[0x1,0x0] : cl.ub[4] m16.uw[0xf0ca] => 1.uw[0x0ca7] rflags[0x1,0x1]
++###rcll rflags[0x1,0x0] : r32.ud[0xff00f0ca] => 0.ud[0xfe01e194] rflags[0x1,0x1]
++###rcll rflags[0x1,0x0] : m32.ud[0xff00f0ca] => 0.ud[0xfe01e194] rflags[0x1,0x1]
++###rcll rflags[0x1,0x0] : imm8[8] r32.ud[0xff00f0ca] => 1.ud[0x00f0ca7f] rflags[0x1,0x1]
++###rcll rflags[0x1,0x0] : imm8[8] m32.ud[0xff00f0ca] => 1.ud[0x00f0ca7f] rflags[0x1,0x1]
++###rcll rflags[0x1,0x0] : cl.ub[8] r32.ud[0xff00f0ca] => 1.ud[0x00f0ca7f] rflags[0x1,0x1]
++###rcll rflags[0x1,0x0] : cl.ub[8] m32.ud[0xff00f0ca] => 1.ud[0x00f0ca7f] rflags[0x1,0x1]
++###rclq rflags[0x1,0x0] : r64.uq[0xffff0000ff00f0ca] => 0.uq[0xfffe0001fe01e194] rflags[0x1,0x1]
++###rclq rflags[0x1,0x0] : m64.uq[0xffff0000ff00f0ca] => 0.uq[0xfffe0001fe01e194] rflags[0x1,0x1]
++###rclq rflags[0x1,0x0] : imm8[16] r64.uq[0xffff0000ff00f0ca] => 1.uq[0x0000ff00f0ca7fff] rflags[0x1,0x1]
++###rclq rflags[0x1,0x0] : imm8[16] m64.uq[0xffff0000ff00f0ca] => 1.uq[0x0000ff00f0ca7fff] rflags[0x1,0x1]
++###rclq rflags[0x1,0x0] : cl.ub[16] r64.uq[0xffff0000ff00f0ca] => 1.uq[0x0000ff00f0ca7fff] rflags[0x1,0x1]
++###rclq rflags[0x1,0x0] : cl.ub[16] m64.uq[0xffff0000ff00f0ca] => 1.uq[0x0000ff00f0ca7fff] rflags[0x1,0x1]
++rcrb rflags[0x1,0x1] : r8.ub[0xca] => 0.ub[0xe5] rflags[0x1,0x0]
++rcrb rflags[0x1,0x1] : m8.ub[0xca] => 0.ub[0xe5] rflags[0x1,0x0]
++rcrb rflags[0x1,0x0] : imm8[2] r8.ub[0xca] => 1.ub[0x32] rflags[0x1,0x1]
++rcrb rflags[0x1,0x0] : imm8[2] m8.ub[0xca] => 1.ub[0x32] rflags[0x1,0x1]
++rcrb rflags[0x1,0x0] : cl.ub[2] r8.ub[0xca] => 1.ub[0x32] rflags[0x1,0x1]
++rcrb rflags[0x1,0x0] : cl.ub[2] m8.ub[0xca] => 1.ub[0x32] rflags[0x1,0x1]
++rcrw rflags[0x1,0x1] : r16.uw[0xf0ca] => 0.uw[0xf865] rflags[0x1,0x0]
++rcrw rflags[0x1,0x1] : m16.uw[0xf0ca] => 0.uw[0xf865] rflags[0x1,0x0]
++rcrw rflags[0x1,0x0] : imm8[4] r16.uw[0xf0ca] => 1.uw[0x4f0c] rflags[0x1,0x1]
++rcrw rflags[0x1,0x0] : imm8[4] m16.uw[0xf0ca] => 1.uw[0x4f0c] rflags[0x1,0x1]
++rcrw rflags[0x1,0x0] : cl.ub[4] r16.uw[0xf0ca] => 1.uw[0x4f0c] rflags[0x1,0x1]
++rcrw rflags[0x1,0x0] : cl.ub[4] m16.uw[0xf0ca] => 1.uw[0x4f0c] rflags[0x1,0x1]
++rcrl rflags[0x1,0x1] : r32.ud[0xff00f0ca] => 0.ud[0xff807865] rflags[0x1,0x0]
++rcrl rflags[0x1,0x1] : m32.ud[0xff00f0ca] => 0.ud[0xff807865] rflags[0x1,0x0]
++rcrl rflags[0x1,0x0] : imm8[8] r32.ud[0xff00f0ca] => 1.ud[0x94ff00f0] rflags[0x1,0x1]
++rcrl rflags[0x1,0x0] : imm8[8] m32.ud[0xff00f0ca] => 1.ud[0x94ff00f0] rflags[0x1,0x1]
++rcrl rflags[0x1,0x0] : cl.ub[8] r32.ud[0xff00f0ca] => 1.ud[0x94ff00f0] rflags[0x1,0x1]
++rcrl rflags[0x1,0x0] : cl.ub[8] m32.ud[0xff00f0ca] => 1.ud[0x94ff00f0] rflags[0x1,0x1]
++rcrq rflags[0x1,0x1] : r64.uq[0xffff0000ff00f0ca] => 0.uq[0xffff80007f807865] rflags[0x1,0x0]
++rcrq rflags[0x1,0x1] : m64.uq[0xffff0000ff00f0ca] => 0.uq[0xffff80007f807865] rflags[0x1,0x0]
++rcrq rflags[0x1,0x0] : imm8[16] r64.uq[0xffff0000ff00f0ca] => 1.uq[0xe194ffff0000ff00] rflags[0x1,0x1]
++rcrq rflags[0x1,0x0] : imm8[16] m64.uq[0xffff0000ff00f0ca] => 1.uq[0xe194ffff0000ff00] rflags[0x1,0x1]
++rcrq rflags[0x1,0x0] : cl.ub[16] r64.uq[0xffff0000ff00f0ca] => 1.uq[0xe194ffff0000ff00] rflags[0x1,0x1]
++rcrq rflags[0x1,0x0] : cl.ub[16] m64.uq[0xffff0000ff00f0ca] => 1.uq[0xe194ffff0000ff00] rflags[0x1,0x1]
+ rolb r8.ub[0xca] => 0.ub[0x95]
+ rolb m8.ub[0xca] => 0.ub[0x95]
+ rolb imm8[2] r8.ub[0xca] => 1.ub[0x2b]
+@@ -810,8 +810,8 @@ rorq imm8[16] r64.uq[0xffff0000ff00f0ca] => 1.uq[0xf0caffff0000ff00]
+ rorq imm8[16] m64.uq[0xffff0000ff00f0ca] => 1.uq[0xf0caffff0000ff00]
+ rorq cl.ub[16] r64.uq[0xffff0000ff00f0ca] => 1.uq[0xf0caffff0000ff00]
+ rorq cl.ub[16] m64.uq[0xffff0000ff00f0ca] => 1.uq[0xf0caffff0000ff00]
+-###sahf eflags[0xff,0x28] ah.ub[0xfd] : => eflags[0xfd,0xd5]
+-###sahf eflags[0xff,0xfd] ah.ub[0x28] : => eflags[0xfd,0x00]
++###sahf rflags[0xff,0x28] ah.ub[0xfd] : => rflags[0xfd,0xd5]
++###sahf rflags[0xff,0xfd] ah.ub[0x28] : => rflags[0xfd,0x00]
+ salb r8.ub[0xca] => 0.ub[0x94]
+ salb m8.ub[0xca] => 0.ub[0x94]
+ salb imm8[2] r8.ub[0xca] => 1.ub[0x28]
+@@ -860,252 +860,252 @@ sarq imm8[16] r64.uq[0xffff0000ff00f0ca] => 1.uq[0xffffffff0000ff00]
+ sarq imm8[16] m64.uq[0xffff0000ff00f0ca] => 1.uq[0xffffffff0000ff00]
+ sarq cl.ub[16] r64.uq[0xffff0000ff00f0ca] => 1.uq[0xffffffff0000ff00]
+ sarq cl.ub[16] m64.uq[0xffff0000ff00f0ca] => 1.uq[0xffffffff0000ff00]
+-###sbbb eflags[0x1,0x0] : imm8[12] al.ub[34] => 1.ub[22]
+-###sbbb eflags[0x1,0x1] : imm8[12] al.ub[34] => 1.ub[21]
+-sbbb eflags[0x1,0x0] : imm8[12] bl.ub[34] => 1.ub[22]
+-sbbb eflags[0x1,0x1] : imm8[12] bl.ub[34] => 1.ub[21]
+-sbbb eflags[0x1,0x0] : imm8[12] m8.ub[34] => 1.ub[22]
+-sbbb eflags[0x1,0x1] : imm8[12] m8.ub[34] => 1.ub[21]
+-sbbb eflags[0x1,0x0] : r8.ub[12] r8.ub[34] => 1.ub[22]
+-sbbb eflags[0x1,0x1] : r8.ub[12] r8.ub[34] => 1.ub[21]
+-###sbbb eflags[0x1,0x0] : r8.ub[12] m8.ub[34] => 1.ub[22]
+-###sbbb eflags[0x1,0x1] : r8.ub[12] m8.ub[34] => 1.ub[21]
+-###sbbb eflags[0x1,0x0] : m8.ub[12] r8.ub[34] => 1.ub[22]
+-###sbbb eflags[0x1,0x1] : m8.ub[12] r8.ub[34] => 1.ub[21]
+-sbbw eflags[0x1,0x0] : imm8[12] r16.uw[3456] => 1.uw[3444]
+-sbbw eflags[0x1,0x1] : imm8[12] r16.uw[3456] => 1.uw[3443]
+-###sbbw eflags[0x1,0x0] : imm16[1234] ax.uw[5678] => 1.uw[4444]
+-###sbbw eflags[0x1,0x1] : imm16[1234] ax.uw[5678] => 1.uw[4443]
+-sbbw eflags[0x1,0x0] : imm16[1234] bx.uw[5678] => 1.uw[4444]
+-sbbw eflags[0x1,0x1] : imm16[1234] bx.uw[5678] => 1.uw[4443]
+-sbbw eflags[0x1,0x0] : imm16[1234] m16.uw[5678] => 1.uw[4444]
+-sbbw eflags[0x1,0x1] : imm16[1234] m16.uw[5678] => 1.uw[4443]
+-sbbw eflags[0x1,0x0] : r16.uw[1234] r16.uw[5678] => 1.uw[4444]
+-sbbw eflags[0x1,0x1] : r16.uw[1234] r16.uw[5678] => 1.uw[4443]
+-###sbbw eflags[0x1,0x0] : r16.uw[1234] m16.uw[5678] => 1.uw[4444]
+-###sbbw eflags[0x1,0x1] : r16.uw[1234] m16.uw[5678] => 1.uw[4443]
+-sbbw eflags[0x1,0x0] : m16.uw[1234] r16.uw[5678] => 1.uw[4444]
+-sbbw eflags[0x1,0x1] : m16.uw[1234] r16.uw[5678] => 1.uw[4443]
+-sbbl eflags[0x1,0x0] : imm8[12] r32.ud[87654321] => 1.ud[87654309]
+-sbbl eflags[0x1,0x1] : imm8[12] r32.ud[87654321] => 1.ud[87654308]
+-###sbbl eflags[0x1,0x0] : imm32[12345678] eax.ud[87654321] => 1.ud[75308643]
+-###sbbl eflags[0x1,0x1] : imm32[12345678] eax.ud[87654321] => 1.ud[75308642]
+-sbbl eflags[0x1,0x0] : imm32[12345678] ebx.ud[87654321] => 1.ud[75308643]
+-sbbl eflags[0x1,0x1] : imm32[12345678] ebx.ud[87654321] => 1.ud[75308642]
+-sbbl eflags[0x1,0x0] : imm32[12345678] m32.ud[87654321] => 1.ud[75308643]
+-sbbl eflags[0x1,0x1] : imm32[12345678] m32.ud[87654321] => 1.ud[75308642]
+-sbbl eflags[0x1,0x0] : r32.ud[12345678] r32.ud[87654321] => 1.ud[75308643]
+-sbbl eflags[0x1,0x1] : r32.ud[12345678] r32.ud[87654321] => 1.ud[75308642]
+-###sbbl eflags[0x1,0x0] : r32.ud[12345678] m32.ud[87654321] => 1.ud[75308643]
+-###sbbl eflags[0x1,0x1] : r32.ud[12345678] m32.ud[87654321] => 1.ud[75308642]
+-sbbl eflags[0x1,0x0] : m32.ud[12345678] r32.ud[87654321] => 1.ud[75308643]
+-sbbl eflags[0x1,0x1] : m32.ud[12345678] r32.ud[87654321] => 1.ud[75308642]
+-sbbq eflags[0x1,0x0] : imm8[12] r64.uq[8765432175318642] => 1.uq[8765432175318630]
+-sbbq eflags[0x1,0x1] : imm8[12] r64.uq[8765432175318642] => 1.uq[8765432175318629]
+-###sbbq eflags[0x1,0x0] : imm32[12345678] rax.uq[8765432175318642] => 1.uq[8765432162972964]
+-###sbbq eflags[0x1,0x1] : imm32[12345678] rax.uq[8765432175318642] => 1.uq[8765432162972963]
+-sbbq eflags[0x1,0x0] : imm32[12345678] rbx.uq[8765432175318642] => 1.uq[8765432162972964]
+-sbbq eflags[0x1,0x1] : imm32[12345678] rbx.uq[8765432175318642] => 1.uq[8765432162972963]
+-sbbq eflags[0x1,0x0] : imm32[12345678] m64.uq[8765432175318642] => 1.uq[8765432162972964]
+-sbbq eflags[0x1,0x1] : imm32[12345678] m64.uq[8765432175318642] => 1.uq[8765432162972963]
+-sbbq eflags[0x1,0x0] : r64.uq[1234567813572468] r64.uq[8765432175318642] => 1.uq[7530864361746174]
+-sbbq eflags[0x1,0x1] : r64.uq[1234567813572468] r64.uq[8765432175318642] => 1.uq[7530864361746173]
+-###sbbq eflags[0x1,0x0] : r64.uq[1234567813572468] m64.uq[8765432175318642] => 1.uq[7530864361746174]
+-###sbbq eflags[0x1,0x1] : r64.uq[1234567813572468] m64.uq[8765432175318642] => 1.uq[7530864361746173]
+-sbbq eflags[0x1,0x0] : m64.uq[1234567813572468] r64.uq[8765432175318642] => 1.uq[7530864361746174]
+-sbbq eflags[0x1,0x1] : m64.uq[1234567813572468] r64.uq[8765432175318642] => 1.uq[7530864361746173]
+-seta eflags[0x041,0x000] : r8.ub[123] => 0.ub[1]
+-seta eflags[0x041,0x001] : r8.ub[123] => 0.ub[0]
+-seta eflags[0x041,0x040] : r8.ub[123] => 0.ub[0]
+-seta eflags[0x041,0x041] : r8.ub[123] => 0.ub[0]
+-seta eflags[0x041,0x000] : m8.ub[123] => 0.ub[1]
+-seta eflags[0x041,0x001] : m8.ub[123] => 0.ub[0]
+-seta eflags[0x041,0x040] : m8.ub[123] => 0.ub[0]
+-seta eflags[0x041,0x041] : m8.ub[123] => 0.ub[0]
+-setae eflags[0x001,0x000] : r8.ub[123] => 0.ub[1]
+-setae eflags[0x001,0x001] : r8.ub[123] => 0.ub[0]
+-setae eflags[0x001,0x000] : m8.ub[123] => 0.ub[1]
+-setae eflags[0x001,0x001] : m8.ub[123] => 0.ub[0]
+-setb eflags[0x001,0x000] : r8.ub[123] => 0.ub[0]
+-setb eflags[0x001,0x001] : r8.ub[123] => 0.ub[1]
+-setb eflags[0x001,0x000] : m8.ub[123] => 0.ub[0]
+-setb eflags[0x001,0x001] : m8.ub[123] => 0.ub[1]
+-setbe eflags[0x041,0x000] : r8.ub[123] => 0.ub[0]
+-setbe eflags[0x041,0x001] : r8.ub[123] => 0.ub[1]
+-setbe eflags[0x041,0x040] : r8.ub[123] => 0.ub[1]
+-setbe eflags[0x041,0x041] : r8.ub[123] => 0.ub[1]
+-setbe eflags[0x041,0x000] : m8.ub[123] => 0.ub[0]
+-setbe eflags[0x041,0x001] : m8.ub[123] => 0.ub[1]
+-setbe eflags[0x041,0x040] : m8.ub[123] => 0.ub[1]
+-setbe eflags[0x041,0x041] : m8.ub[123] => 0.ub[1]
+-setc eflags[0x001,0x000] : r8.ub[123] => 0.ub[0]
+-setc eflags[0x001,0x001] : r8.ub[123] => 0.ub[1]
+-setc eflags[0x001,0x000] : m8.ub[123] => 0.ub[0]
+-setc eflags[0x001,0x001] : m8.ub[123] => 0.ub[1]
+-sete eflags[0x040,0x000] : r8.ub[123] => 0.ub[0]
+-sete eflags[0x040,0x040] : r8.ub[123] => 0.ub[1]
+-sete eflags[0x040,0x000] : m8.ub[123] => 0.ub[0]
+-sete eflags[0x040,0x040] : m8.ub[123] => 0.ub[1]
+-setg eflags[0x8c0,0x000] : r8.ub[123] => 0.ub[1]
+-setg eflags[0x8c0,0x040] : r8.ub[123] => 0.ub[0]
+-setg eflags[0x8c0,0x080] : r8.ub[123] => 0.ub[0]
+-setg eflags[0x8c0,0x0c0] : r8.ub[123] => 0.ub[0]
+-setg eflags[0x8c0,0x800] : r8.ub[123] => 0.ub[0]
+-setg eflags[0x8c0,0x840] : r8.ub[123] => 0.ub[0]
+-setg eflags[0x8c0,0x880] : r8.ub[123] => 0.ub[1]
+-setg eflags[0x8c0,0x8c0] : r8.ub[123] => 0.ub[0]
+-setg eflags[0x8c0,0x000] : m8.ub[123] => 0.ub[1]
+-setg eflags[0x8c0,0x040] : m8.ub[123] => 0.ub[0]
+-setg eflags[0x8c0,0x080] : m8.ub[123] => 0.ub[0]
+-setg eflags[0x8c0,0x0c0] : m8.ub[123] => 0.ub[0]
+-setg eflags[0x8c0,0x800] : m8.ub[123] => 0.ub[0]
+-setg eflags[0x8c0,0x840] : m8.ub[123] => 0.ub[0]
+-setg eflags[0x8c0,0x880] : m8.ub[123] => 0.ub[1]
+-setg eflags[0x8c0,0x8c0] : m8.ub[123] => 0.ub[0]
+-setge eflags[0x8c0,0x000] : r8.ub[123] => 0.ub[1]
+-setge eflags[0x8c0,0x080] : r8.ub[123] => 0.ub[0]
+-setge eflags[0x8c0,0x800] : r8.ub[123] => 0.ub[0]
+-setge eflags[0x8c0,0x880] : r8.ub[123] => 0.ub[1]
+-setge eflags[0x8c0,0x000] : m8.ub[123] => 0.ub[1]
+-setge eflags[0x8c0,0x080] : m8.ub[123] => 0.ub[0]
+-setge eflags[0x8c0,0x800] : m8.ub[123] => 0.ub[0]
+-setge eflags[0x8c0,0x880] : m8.ub[123] => 0.ub[1]
+-setl eflags[0x8c0,0x000] : r8.ub[123] => 0.ub[0]
+-setl eflags[0x8c0,0x080] : r8.ub[123] => 0.ub[1]
+-setl eflags[0x8c0,0x800] : r8.ub[123] => 0.ub[1]
+-setl eflags[0x8c0,0x880] : r8.ub[123] => 0.ub[0]
+-setl eflags[0x8c0,0x000] : m8.ub[123] => 0.ub[0]
+-setl eflags[0x8c0,0x080] : m8.ub[123] => 0.ub[1]
+-setl eflags[0x8c0,0x800] : m8.ub[123] => 0.ub[1]
+-setl eflags[0x8c0,0x880] : m8.ub[123] => 0.ub[0]
+-setle eflags[0x8c0,0x000] : r8.ub[123] => 0.ub[0]
+-setle eflags[0x8c0,0x040] : r8.ub[123] => 0.ub[1]
+-setle eflags[0x8c0,0x080] : r8.ub[123] => 0.ub[1]
+-setle eflags[0x8c0,0x0c0] : r8.ub[123] => 0.ub[1]
+-setle eflags[0x8c0,0x800] : r8.ub[123] => 0.ub[1]
+-setle eflags[0x8c0,0x840] : r8.ub[123] => 0.ub[1]
+-setle eflags[0x8c0,0x880] : r8.ub[123] => 0.ub[0]
+-setle eflags[0x8c0,0x8c0] : r8.ub[123] => 0.ub[1]
+-setle eflags[0x8c0,0x000] : m8.ub[123] => 0.ub[0]
+-setle eflags[0x8c0,0x040] : m8.ub[123] => 0.ub[1]
+-setle eflags[0x8c0,0x080] : m8.ub[123] => 0.ub[1]
+-setle eflags[0x8c0,0x0c0] : m8.ub[123] => 0.ub[1]
+-setle eflags[0x8c0,0x800] : m8.ub[123] => 0.ub[1]
+-setle eflags[0x8c0,0x840] : m8.ub[123] => 0.ub[1]
+-setle eflags[0x8c0,0x880] : m8.ub[123] => 0.ub[0]
+-setle eflags[0x8c0,0x8c0] : m8.ub[123] => 0.ub[1]
+-setna eflags[0x041,0x000] : r8.ub[123] => 0.ub[0]
+-setna eflags[0x041,0x001] : r8.ub[123] => 0.ub[1]
+-setna eflags[0x041,0x040] : r8.ub[123] => 0.ub[1]
+-setna eflags[0x041,0x041] : r8.ub[123] => 0.ub[1]
+-setna eflags[0x041,0x000] : m8.ub[123] => 0.ub[0]
+-setna eflags[0x041,0x001] : m8.ub[123] => 0.ub[1]
+-setna eflags[0x041,0x040] : m8.ub[123] => 0.ub[1]
+-setna eflags[0x041,0x041] : m8.ub[123] => 0.ub[1]
+-setnae eflags[0x001,0x000] : r8.ub[123] => 0.ub[0]
+-setnae eflags[0x001,0x001] : r8.ub[123] => 0.ub[1]
+-setnae eflags[0x001,0x000] : m8.ub[123] => 0.ub[0]
+-setnae eflags[0x001,0x001] : m8.ub[123] => 0.ub[1]
+-setnb eflags[0x001,0x000] : r8.ub[123] => 0.ub[1]
+-setnb eflags[0x001,0x001] : r8.ub[123] => 0.ub[0]
+-setnb eflags[0x001,0x000] : m8.ub[123] => 0.ub[1]
+-setnb eflags[0x001,0x001] : m8.ub[123] => 0.ub[0]
+-setnbe eflags[0x041,0x000] : r8.ub[123] => 0.ub[1]
+-setnbe eflags[0x041,0x001] : r8.ub[123] => 0.ub[0]
+-setnbe eflags[0x041,0x040] : r8.ub[123] => 0.ub[0]
+-setnbe eflags[0x041,0x041] : r8.ub[123] => 0.ub[0]
+-setnbe eflags[0x041,0x000] : m8.ub[123] => 0.ub[1]
+-setnbe eflags[0x041,0x001] : m8.ub[123] => 0.ub[0]
+-setnbe eflags[0x041,0x040] : m8.ub[123] => 0.ub[0]
+-setnbe eflags[0x041,0x041] : m8.ub[123] => 0.ub[0]
+-setnc eflags[0x001,0x000] : r8.ub[123] => 0.ub[1]
+-setnc eflags[0x001,0x001] : r8.ub[123] => 0.ub[0]
+-setnc eflags[0x001,0x000] : m8.ub[123] => 0.ub[1]
+-setnc eflags[0x001,0x001] : m8.ub[123] => 0.ub[0]
+-setne eflags[0x040,0x000] : r8.ub[123] => 0.ub[1]
+-setne eflags[0x040,0x040] : r8.ub[123] => 0.ub[0]
+-setne eflags[0x040,0x000] : m8.ub[123] => 0.ub[1]
+-setne eflags[0x040,0x040] : m8.ub[123] => 0.ub[0]
+-setng eflags[0x8c0,0x000] : r8.ub[123] => 0.ub[0]
+-setng eflags[0x8c0,0x040] : r8.ub[123] => 0.ub[1]
+-setng eflags[0x8c0,0x080] : r8.ub[123] => 0.ub[1]
+-setng eflags[0x8c0,0x0c0] : r8.ub[123] => 0.ub[1]
+-setng eflags[0x8c0,0x800] : r8.ub[123] => 0.ub[1]
+-setng eflags[0x8c0,0x840] : r8.ub[123] => 0.ub[1]
+-setng eflags[0x8c0,0x880] : r8.ub[123] => 0.ub[0]
+-setng eflags[0x8c0,0x8c0] : r8.ub[123] => 0.ub[1]
+-setng eflags[0x8c0,0x000] : m8.ub[123] => 0.ub[0]
+-setng eflags[0x8c0,0x040] : m8.ub[123] => 0.ub[1]
+-setng eflags[0x8c0,0x080] : m8.ub[123] => 0.ub[1]
+-setng eflags[0x8c0,0x0c0] : m8.ub[123] => 0.ub[1]
+-setng eflags[0x8c0,0x800] : m8.ub[123] => 0.ub[1]
+-setng eflags[0x8c0,0x840] : m8.ub[123] => 0.ub[1]
+-setng eflags[0x8c0,0x880] : m8.ub[123] => 0.ub[0]
+-setng eflags[0x8c0,0x8c0] : m8.ub[123] => 0.ub[1]
+-setnge eflags[0x8c0,0x000] : r8.ub[123] => 0.ub[0]
+-setnge eflags[0x8c0,0x080] : r8.ub[123] => 0.ub[1]
+-setnge eflags[0x8c0,0x800] : r8.ub[123] => 0.ub[1]
+-setnge eflags[0x8c0,0x880] : r8.ub[123] => 0.ub[0]
+-setnge eflags[0x8c0,0x000] : m8.ub[123] => 0.ub[0]
+-setnge eflags[0x8c0,0x080] : m8.ub[123] => 0.ub[1]
+-setnge eflags[0x8c0,0x800] : m8.ub[123] => 0.ub[1]
+-setnge eflags[0x8c0,0x880] : m8.ub[123] => 0.ub[0]
+-setnl eflags[0x8c0,0x000] : r8.ub[123] => 0.ub[1]
+-setnl eflags[0x8c0,0x080] : r8.ub[123] => 0.ub[0]
+-setnl eflags[0x8c0,0x800] : r8.ub[123] => 0.ub[0]
+-setnl eflags[0x8c0,0x880] : r8.ub[123] => 0.ub[1]
+-setnl eflags[0x8c0,0x000] : m8.ub[123] => 0.ub[1]
+-setnl eflags[0x8c0,0x080] : m8.ub[123] => 0.ub[0]
+-setnl eflags[0x8c0,0x800] : m8.ub[123] => 0.ub[0]
+-setnl eflags[0x8c0,0x880] : m8.ub[123] => 0.ub[1]
+-setnle eflags[0x8c0,0x000] : r8.ub[123] => 0.ub[1]
+-setnle eflags[0x8c0,0x040] : r8.ub[123] => 0.ub[0]
+-setnle eflags[0x8c0,0x080] : r8.ub[123] => 0.ub[0]
+-setnle eflags[0x8c0,0x0c0] : r8.ub[123] => 0.ub[0]
+-setnle eflags[0x8c0,0x800] : r8.ub[123] => 0.ub[0]
+-setnle eflags[0x8c0,0x840] : r8.ub[123] => 0.ub[0]
+-setnle eflags[0x8c0,0x880] : r8.ub[123] => 0.ub[1]
+-setnle eflags[0x8c0,0x8c0] : r8.ub[123] => 0.ub[0]
+-setnle eflags[0x8c0,0x000] : m8.ub[123] => 0.ub[1]
+-setnle eflags[0x8c0,0x040] : m8.ub[123] => 0.ub[0]
+-setnle eflags[0x8c0,0x080] : m8.ub[123] => 0.ub[0]
+-setnle eflags[0x8c0,0x0c0] : m8.ub[123] => 0.ub[0]
+-setnle eflags[0x8c0,0x800] : m8.ub[123] => 0.ub[0]
+-setnle eflags[0x8c0,0x840] : m8.ub[123] => 0.ub[0]
+-setnle eflags[0x8c0,0x880] : m8.ub[123] => 0.ub[1]
+-setnle eflags[0x8c0,0x8c0] : m8.ub[123] => 0.ub[0]
+-setno eflags[0x800,0x000] : r8.ub[123] => 0.ub[1]
+-setno eflags[0x800,0x800] : r8.ub[123] => 0.ub[0]
+-setno eflags[0x800,0x000] : m8.ub[123] => 0.ub[1]
+-setno eflags[0x800,0x800] : m8.ub[123] => 0.ub[0]
+-setnp eflags[0x004,0x000] : r8.ub[123] => 0.ub[1]
+-setnp eflags[0x004,0x004] : r8.ub[123] => 0.ub[0]
+-setnp eflags[0x004,0x000] : m8.ub[123] => 0.ub[1]
+-setnp eflags[0x004,0x004] : m8.ub[123] => 0.ub[0]
+-setns eflags[0x080,0x000] : r8.ub[123] => 0.ub[1]
+-setns eflags[0x080,0x080] : r8.ub[123] => 0.ub[0]
+-setns eflags[0x080,0x000] : m8.ub[123] => 0.ub[1]
+-setns eflags[0x080,0x080] : m8.ub[123] => 0.ub[0]
+-setnz eflags[0x040,0x000] : r8.ub[123] => 0.ub[1]
+-setnz eflags[0x040,0x040] : r8.ub[123] => 0.ub[0]
+-setnz eflags[0x040,0x000] : m8.ub[123] => 0.ub[1]
+-setnz eflags[0x040,0x040] : m8.ub[123] => 0.ub[0]
+-seto eflags[0x800,0x000] : r8.ub[123] => 0.ub[0]
+-seto eflags[0x800,0x800] : r8.ub[123] => 0.ub[1]
+-seto eflags[0x800,0x000] : m8.ub[123] => 0.ub[0]
+-seto eflags[0x800,0x800] : m8.ub[123] => 0.ub[1]
+-setp eflags[0x004,0x000] : r8.ub[123] => 0.ub[0]
+-setp eflags[0x004,0x004] : r8.ub[123] => 0.ub[1]
+-setp eflags[0x004,0x000] : m8.ub[123] => 0.ub[0]
+-setp eflags[0x004,0x004] : m8.ub[123] => 0.ub[1]
+-sets eflags[0x080,0x000] : r8.ub[123] => 0.ub[0]
+-sets eflags[0x080,0x080] : r8.ub[123] => 0.ub[1]
+-sets eflags[0x080,0x000] : m8.ub[123] => 0.ub[0]
+-sets eflags[0x080,0x080] : m8.ub[123] => 0.ub[1]
+-setz eflags[0x040,0x000] : r8.ub[123] => 0.ub[0]
+-setz eflags[0x040,0x040] : r8.ub[123] => 0.ub[1]
+-setz eflags[0x040,0x000] : m8.ub[123] => 0.ub[0]
+-setz eflags[0x040,0x040] : m8.ub[123] => 0.ub[1]
++###sbbb rflags[0x1,0x0] : imm8[12] al.ub[34] => 1.ub[22]
++###sbbb rflags[0x1,0x1] : imm8[12] al.ub[34] => 1.ub[21]
++sbbb rflags[0x1,0x0] : imm8[12] bl.ub[34] => 1.ub[22]
++sbbb rflags[0x1,0x1] : imm8[12] bl.ub[34] => 1.ub[21]
++sbbb rflags[0x1,0x0] : imm8[12] m8.ub[34] => 1.ub[22]
++sbbb rflags[0x1,0x1] : imm8[12] m8.ub[34] => 1.ub[21]
++sbbb rflags[0x1,0x0] : r8.ub[12] r8.ub[34] => 1.ub[22]
++sbbb rflags[0x1,0x1] : r8.ub[12] r8.ub[34] => 1.ub[21]
++###sbbb rflags[0x1,0x0] : r8.ub[12] m8.ub[34] => 1.ub[22]
++###sbbb rflags[0x1,0x1] : r8.ub[12] m8.ub[34] => 1.ub[21]
++###sbbb rflags[0x1,0x0] : m8.ub[12] r8.ub[34] => 1.ub[22]
++###sbbb rflags[0x1,0x1] : m8.ub[12] r8.ub[34] => 1.ub[21]
++sbbw rflags[0x1,0x0] : imm8[12] r16.uw[3456] => 1.uw[3444]
++sbbw rflags[0x1,0x1] : imm8[12] r16.uw[3456] => 1.uw[3443]
++###sbbw rflags[0x1,0x0] : imm16[1234] ax.uw[5678] => 1.uw[4444]
++###sbbw rflags[0x1,0x1] : imm16[1234] ax.uw[5678] => 1.uw[4443]
++sbbw rflags[0x1,0x0] : imm16[1234] bx.uw[5678] => 1.uw[4444]
++sbbw rflags[0x1,0x1] : imm16[1234] bx.uw[5678] => 1.uw[4443]
++sbbw rflags[0x1,0x0] : imm16[1234] m16.uw[5678] => 1.uw[4444]
++sbbw rflags[0x1,0x1] : imm16[1234] m16.uw[5678] => 1.uw[4443]
++sbbw rflags[0x1,0x0] : r16.uw[1234] r16.uw[5678] => 1.uw[4444]
++sbbw rflags[0x1,0x1] : r16.uw[1234] r16.uw[5678] => 1.uw[4443]
++###sbbw rflags[0x1,0x0] : r16.uw[1234] m16.uw[5678] => 1.uw[4444]
++###sbbw rflags[0x1,0x1] : r16.uw[1234] m16.uw[5678] => 1.uw[4443]
++sbbw rflags[0x1,0x0] : m16.uw[1234] r16.uw[5678] => 1.uw[4444]
++sbbw rflags[0x1,0x1] : m16.uw[1234] r16.uw[5678] => 1.uw[4443]
++sbbl rflags[0x1,0x0] : imm8[12] r32.ud[87654321] => 1.ud[87654309]
++sbbl rflags[0x1,0x1] : imm8[12] r32.ud[87654321] => 1.ud[87654308]
++###sbbl rflags[0x1,0x0] : imm32[12345678] eax.ud[87654321] => 1.ud[75308643]
++###sbbl rflags[0x1,0x1] : imm32[12345678] eax.ud[87654321] => 1.ud[75308642]
++sbbl rflags[0x1,0x0] : imm32[12345678] ebx.ud[87654321] => 1.ud[75308643]
++sbbl rflags[0x1,0x1] : imm32[12345678] ebx.ud[87654321] => 1.ud[75308642]
++sbbl rflags[0x1,0x0] : imm32[12345678] m32.ud[87654321] => 1.ud[75308643]
++sbbl rflags[0x1,0x1] : imm32[12345678] m32.ud[87654321] => 1.ud[75308642]
++sbbl rflags[0x1,0x0] : r32.ud[12345678] r32.ud[87654321] => 1.ud[75308643]
++sbbl rflags[0x1,0x1] : r32.ud[12345678] r32.ud[87654321] => 1.ud[75308642]
++###sbbl rflags[0x1,0x0] : r32.ud[12345678] m32.ud[87654321] => 1.ud[75308643]
++###sbbl rflags[0x1,0x1] : r32.ud[12345678] m32.ud[87654321] => 1.ud[75308642]
++sbbl rflags[0x1,0x0] : m32.ud[12345678] r32.ud[87654321] => 1.ud[75308643]
++sbbl rflags[0x1,0x1] : m32.ud[12345678] r32.ud[87654321] => 1.ud[75308642]
++sbbq rflags[0x1,0x0] : imm8[12] r64.uq[8765432175318642] => 1.uq[8765432175318630]
++sbbq rflags[0x1,0x1] : imm8[12] r64.uq[8765432175318642] => 1.uq[8765432175318629]
++###sbbq rflags[0x1,0x0] : imm32[12345678] rax.uq[8765432175318642] => 1.uq[8765432162972964]
++###sbbq rflags[0x1,0x1] : imm32[12345678] rax.uq[8765432175318642] => 1.uq[8765432162972963]
++sbbq rflags[0x1,0x0] : imm32[12345678] rbx.uq[8765432175318642] => 1.uq[8765432162972964]
++sbbq rflags[0x1,0x1] : imm32[12345678] rbx.uq[8765432175318642] => 1.uq[8765432162972963]
++sbbq rflags[0x1,0x0] : imm32[12345678] m64.uq[8765432175318642] => 1.uq[8765432162972964]
++sbbq rflags[0x1,0x1] : imm32[12345678] m64.uq[8765432175318642] => 1.uq[8765432162972963]
++sbbq rflags[0x1,0x0] : r64.uq[1234567813572468] r64.uq[8765432175318642] => 1.uq[7530864361746174]
++sbbq rflags[0x1,0x1] : r64.uq[1234567813572468] r64.uq[8765432175318642] => 1.uq[7530864361746173]
++###sbbq rflags[0x1,0x0] : r64.uq[1234567813572468] m64.uq[8765432175318642] => 1.uq[7530864361746174]
++###sbbq rflags[0x1,0x1] : r64.uq[1234567813572468] m64.uq[8765432175318642] => 1.uq[7530864361746173]
++sbbq rflags[0x1,0x0] : m64.uq[1234567813572468] r64.uq[8765432175318642] => 1.uq[7530864361746174]
++sbbq rflags[0x1,0x1] : m64.uq[1234567813572468] r64.uq[8765432175318642] => 1.uq[7530864361746173]
++seta rflags[0x041,0x000] : r8.ub[123] => 0.ub[1]
++seta rflags[0x041,0x001] : r8.ub[123] => 0.ub[0]
++seta rflags[0x041,0x040] : r8.ub[123] => 0.ub[0]
++seta rflags[0x041,0x041] : r8.ub[123] => 0.ub[0]
++seta rflags[0x041,0x000] : m8.ub[123] => 0.ub[1]
++seta rflags[0x041,0x001] : m8.ub[123] => 0.ub[0]
++seta rflags[0x041,0x040] : m8.ub[123] => 0.ub[0]
++seta rflags[0x041,0x041] : m8.ub[123] => 0.ub[0]
++setae rflags[0x001,0x000] : r8.ub[123] => 0.ub[1]
++setae rflags[0x001,0x001] : r8.ub[123] => 0.ub[0]
++setae rflags[0x001,0x000] : m8.ub[123] => 0.ub[1]
++setae rflags[0x001,0x001] : m8.ub[123] => 0.ub[0]
++setb rflags[0x001,0x000] : r8.ub[123] => 0.ub[0]
++setb rflags[0x001,0x001] : r8.ub[123] => 0.ub[1]
++setb rflags[0x001,0x000] : m8.ub[123] => 0.ub[0]
++setb rflags[0x001,0x001] : m8.ub[123] => 0.ub[1]
++setbe rflags[0x041,0x000] : r8.ub[123] => 0.ub[0]
++setbe rflags[0x041,0x001] : r8.ub[123] => 0.ub[1]
++setbe rflags[0x041,0x040] : r8.ub[123] => 0.ub[1]
++setbe rflags[0x041,0x041] : r8.ub[123] => 0.ub[1]
++setbe rflags[0x041,0x000] : m8.ub[123] => 0.ub[0]
++setbe rflags[0x041,0x001] : m8.ub[123] => 0.ub[1]
++setbe rflags[0x041,0x040] : m8.ub[123] => 0.ub[1]
++setbe rflags[0x041,0x041] : m8.ub[123] => 0.ub[1]
++setc rflags[0x001,0x000] : r8.ub[123] => 0.ub[0]
++setc rflags[0x001,0x001] : r8.ub[123] => 0.ub[1]
++setc rflags[0x001,0x000] : m8.ub[123] => 0.ub[0]
++setc rflags[0x001,0x001] : m8.ub[123] => 0.ub[1]
++sete rflags[0x040,0x000] : r8.ub[123] => 0.ub[0]
++sete rflags[0x040,0x040] : r8.ub[123] => 0.ub[1]
++sete rflags[0x040,0x000] : m8.ub[123] => 0.ub[0]
++sete rflags[0x040,0x040] : m8.ub[123] => 0.ub[1]
++setg rflags[0x8c0,0x000] : r8.ub[123] => 0.ub[1]
++setg rflags[0x8c0,0x040] : r8.ub[123] => 0.ub[0]
++setg rflags[0x8c0,0x080] : r8.ub[123] => 0.ub[0]
++setg rflags[0x8c0,0x0c0] : r8.ub[123] => 0.ub[0]
++setg rflags[0x8c0,0x800] : r8.ub[123] => 0.ub[0]
++setg rflags[0x8c0,0x840] : r8.ub[123] => 0.ub[0]
++setg rflags[0x8c0,0x880] : r8.ub[123] => 0.ub[1]
++setg rflags[0x8c0,0x8c0] : r8.ub[123] => 0.ub[0]
++setg rflags[0x8c0,0x000] : m8.ub[123] => 0.ub[1]
++setg rflags[0x8c0,0x040] : m8.ub[123] => 0.ub[0]
++setg rflags[0x8c0,0x080] : m8.ub[123] => 0.ub[0]
++setg rflags[0x8c0,0x0c0] : m8.ub[123] => 0.ub[0]
++setg rflags[0x8c0,0x800] : m8.ub[123] => 0.ub[0]
++setg rflags[0x8c0,0x840] : m8.ub[123] => 0.ub[0]
++setg rflags[0x8c0,0x880] : m8.ub[123] => 0.ub[1]
++setg rflags[0x8c0,0x8c0] : m8.ub[123] => 0.ub[0]
++setge rflags[0x8c0,0x000] : r8.ub[123] => 0.ub[1]
++setge rflags[0x8c0,0x080] : r8.ub[123] => 0.ub[0]
++setge rflags[0x8c0,0x800] : r8.ub[123] => 0.ub[0]
++setge rflags[0x8c0,0x880] : r8.ub[123] => 0.ub[1]
++setge rflags[0x8c0,0x000] : m8.ub[123] => 0.ub[1]
++setge rflags[0x8c0,0x080] : m8.ub[123] => 0.ub[0]
++setge rflags[0x8c0,0x800] : m8.ub[123] => 0.ub[0]
++setge rflags[0x8c0,0x880] : m8.ub[123] => 0.ub[1]
++setl rflags[0x8c0,0x000] : r8.ub[123] => 0.ub[0]
++setl rflags[0x8c0,0x080] : r8.ub[123] => 0.ub[1]
++setl rflags[0x8c0,0x800] : r8.ub[123] => 0.ub[1]
++setl rflags[0x8c0,0x880] : r8.ub[123] => 0.ub[0]
++setl rflags[0x8c0,0x000] : m8.ub[123] => 0.ub[0]
++setl rflags[0x8c0,0x080] : m8.ub[123] => 0.ub[1]
++setl rflags[0x8c0,0x800] : m8.ub[123] => 0.ub[1]
++setl rflags[0x8c0,0x880] : m8.ub[123] => 0.ub[0]
++setle rflags[0x8c0,0x000] : r8.ub[123] => 0.ub[0]
++setle rflags[0x8c0,0x040] : r8.ub[123] => 0.ub[1]
++setle rflags[0x8c0,0x080] : r8.ub[123] => 0.ub[1]
++setle rflags[0x8c0,0x0c0] : r8.ub[123] => 0.ub[1]
++setle rflags[0x8c0,0x800] : r8.ub[123] => 0.ub[1]
++setle rflags[0x8c0,0x840] : r8.ub[123] => 0.ub[1]
++setle rflags[0x8c0,0x880] : r8.ub[123] => 0.ub[0]
++setle rflags[0x8c0,0x8c0] : r8.ub[123] => 0.ub[1]
++setle rflags[0x8c0,0x000] : m8.ub[123] => 0.ub[0]
++setle rflags[0x8c0,0x040] : m8.ub[123] => 0.ub[1]
++setle rflags[0x8c0,0x080] : m8.ub[123] => 0.ub[1]
++setle rflags[0x8c0,0x0c0] : m8.ub[123] => 0.ub[1]
++setle rflags[0x8c0,0x800] : m8.ub[123] => 0.ub[1]
++setle rflags[0x8c0,0x840] : m8.ub[123] => 0.ub[1]
++setle rflags[0x8c0,0x880] : m8.ub[123] => 0.ub[0]
++setle rflags[0x8c0,0x8c0] : m8.ub[123] => 0.ub[1]
++setna rflags[0x041,0x000] : r8.ub[123] => 0.ub[0]
++setna rflags[0x041,0x001] : r8.ub[123] => 0.ub[1]
++setna rflags[0x041,0x040] : r8.ub[123] => 0.ub[1]
++setna rflags[0x041,0x041] : r8.ub[123] => 0.ub[1]
++setna rflags[0x041,0x000] : m8.ub[123] => 0.ub[0]
++setna rflags[0x041,0x001] : m8.ub[123] => 0.ub[1]
++setna rflags[0x041,0x040] : m8.ub[123] => 0.ub[1]
++setna rflags[0x041,0x041] : m8.ub[123] => 0.ub[1]
++setnae rflags[0x001,0x000] : r8.ub[123] => 0.ub[0]
++setnae rflags[0x001,0x001] : r8.ub[123] => 0.ub[1]
++setnae rflags[0x001,0x000] : m8.ub[123] => 0.ub[0]
++setnae rflags[0x001,0x001] : m8.ub[123] => 0.ub[1]
++setnb rflags[0x001,0x000] : r8.ub[123] => 0.ub[1]
++setnb rflags[0x001,0x001] : r8.ub[123] => 0.ub[0]
++setnb rflags[0x001,0x000] : m8.ub[123] => 0.ub[1]
++setnb rflags[0x001,0x001] : m8.ub[123] => 0.ub[0]
++setnbe rflags[0x041,0x000] : r8.ub[123] => 0.ub[1]
++setnbe rflags[0x041,0x001] : r8.ub[123] => 0.ub[0]
++setnbe rflags[0x041,0x040] : r8.ub[123] => 0.ub[0]
++setnbe rflags[0x041,0x041] : r8.ub[123] => 0.ub[0]
++setnbe rflags[0x041,0x000] : m8.ub[123] => 0.ub[1]
++setnbe rflags[0x041,0x001] : m8.ub[123] => 0.ub[0]
++setnbe rflags[0x041,0x040] : m8.ub[123] => 0.ub[0]
++setnbe rflags[0x041,0x041] : m8.ub[123] => 0.ub[0]
++setnc rflags[0x001,0x000] : r8.ub[123] => 0.ub[1]
++setnc rflags[0x001,0x001] : r8.ub[123] => 0.ub[0]
++setnc rflags[0x001,0x000] : m8.ub[123] => 0.ub[1]
++setnc rflags[0x001,0x001] : m8.ub[123] => 0.ub[0]
++setne rflags[0x040,0x000] : r8.ub[123] => 0.ub[1]
++setne rflags[0x040,0x040] : r8.ub[123] => 0.ub[0]
++setne rflags[0x040,0x000] : m8.ub[123] => 0.ub[1]
++setne rflags[0x040,0x040] : m8.ub[123] => 0.ub[0]
++setng rflags[0x8c0,0x000] : r8.ub[123] => 0.ub[0]
++setng rflags[0x8c0,0x040] : r8.ub[123] => 0.ub[1]
++setng rflags[0x8c0,0x080] : r8.ub[123] => 0.ub[1]
++setng rflags[0x8c0,0x0c0] : r8.ub[123] => 0.ub[1]
++setng rflags[0x8c0,0x800] : r8.ub[123] => 0.ub[1]
++setng rflags[0x8c0,0x840] : r8.ub[123] => 0.ub[1]
++setng rflags[0x8c0,0x880] : r8.ub[123] => 0.ub[0]
++setng rflags[0x8c0,0x8c0] : r8.ub[123] => 0.ub[1]
++setng rflags[0x8c0,0x000] : m8.ub[123] => 0.ub[0]
++setng rflags[0x8c0,0x040] : m8.ub[123] => 0.ub[1]
++setng rflags[0x8c0,0x080] : m8.ub[123] => 0.ub[1]
++setng rflags[0x8c0,0x0c0] : m8.ub[123] => 0.ub[1]
++setng rflags[0x8c0,0x800] : m8.ub[123] => 0.ub[1]
++setng rflags[0x8c0,0x840] : m8.ub[123] => 0.ub[1]
++setng rflags[0x8c0,0x880] : m8.ub[123] => 0.ub[0]
++setng rflags[0x8c0,0x8c0] : m8.ub[123] => 0.ub[1]
++setnge rflags[0x8c0,0x000] : r8.ub[123] => 0.ub[0]
++setnge rflags[0x8c0,0x080] : r8.ub[123] => 0.ub[1]
++setnge rflags[0x8c0,0x800] : r8.ub[123] => 0.ub[1]
++setnge rflags[0x8c0,0x880] : r8.ub[123] => 0.ub[0]
++setnge rflags[0x8c0,0x000] : m8.ub[123] => 0.ub[0]
++setnge rflags[0x8c0,0x080] : m8.ub[123] => 0.ub[1]
++setnge rflags[0x8c0,0x800] : m8.ub[123] => 0.ub[1]
++setnge rflags[0x8c0,0x880] : m8.ub[123] => 0.ub[0]
++setnl rflags[0x8c0,0x000] : r8.ub[123] => 0.ub[1]
++setnl rflags[0x8c0,0x080] : r8.ub[123] => 0.ub[0]
++setnl rflags[0x8c0,0x800] : r8.ub[123] => 0.ub[0]
++setnl rflags[0x8c0,0x880] : r8.ub[123] => 0.ub[1]
++setnl rflags[0x8c0,0x000] : m8.ub[123] => 0.ub[1]
++setnl rflags[0x8c0,0x080] : m8.ub[123] => 0.ub[0]
++setnl rflags[0x8c0,0x800] : m8.ub[123] => 0.ub[0]
++setnl rflags[0x8c0,0x880] : m8.ub[123] => 0.ub[1]
++setnle rflags[0x8c0,0x000] : r8.ub[123] => 0.ub[1]
++setnle rflags[0x8c0,0x040] : r8.ub[123] => 0.ub[0]
++setnle rflags[0x8c0,0x080] : r8.ub[123] => 0.ub[0]
++setnle rflags[0x8c0,0x0c0] : r8.ub[123] => 0.ub[0]
++setnle rflags[0x8c0,0x800] : r8.ub[123] => 0.ub[0]
++setnle rflags[0x8c0,0x840] : r8.ub[123] => 0.ub[0]
++setnle rflags[0x8c0,0x880] : r8.ub[123] => 0.ub[1]
++setnle rflags[0x8c0,0x8c0] : r8.ub[123] => 0.ub[0]
++setnle rflags[0x8c0,0x000] : m8.ub[123] => 0.ub[1]
++setnle rflags[0x8c0,0x040] : m8.ub[123] => 0.ub[0]
++setnle rflags[0x8c0,0x080] : m8.ub[123] => 0.ub[0]
++setnle rflags[0x8c0,0x0c0] : m8.ub[123] => 0.ub[0]
++setnle rflags[0x8c0,0x800] : m8.ub[123] => 0.ub[0]
++setnle rflags[0x8c0,0x840] : m8.ub[123] => 0.ub[0]
++setnle rflags[0x8c0,0x880] : m8.ub[123] => 0.ub[1]
++setnle rflags[0x8c0,0x8c0] : m8.ub[123] => 0.ub[0]
++setno rflags[0x800,0x000] : r8.ub[123] => 0.ub[1]
++setno rflags[0x800,0x800] : r8.ub[123] => 0.ub[0]
++setno rflags[0x800,0x000] : m8.ub[123] => 0.ub[1]
++setno rflags[0x800,0x800] : m8.ub[123] => 0.ub[0]
++setnp rflags[0x004,0x000] : r8.ub[123] => 0.ub[1]
++setnp rflags[0x004,0x004] : r8.ub[123] => 0.ub[0]
++setnp rflags[0x004,0x000] : m8.ub[123] => 0.ub[1]
++setnp rflags[0x004,0x004] : m8.ub[123] => 0.ub[0]
++setns rflags[0x080,0x000] : r8.ub[123] => 0.ub[1]
++setns rflags[0x080,0x080] : r8.ub[123] => 0.ub[0]
++setns rflags[0x080,0x000] : m8.ub[123] => 0.ub[1]
++setns rflags[0x080,0x080] : m8.ub[123] => 0.ub[0]
++setnz rflags[0x040,0x000] : r8.ub[123] => 0.ub[1]
++setnz rflags[0x040,0x040] : r8.ub[123] => 0.ub[0]
++setnz rflags[0x040,0x000] : m8.ub[123] => 0.ub[1]
++setnz rflags[0x040,0x040] : m8.ub[123] => 0.ub[0]
++seto rflags[0x800,0x000] : r8.ub[123] => 0.ub[0]
++seto rflags[0x800,0x800] : r8.ub[123] => 0.ub[1]
++seto rflags[0x800,0x000] : m8.ub[123] => 0.ub[0]
++seto rflags[0x800,0x800] : m8.ub[123] => 0.ub[1]
++setp rflags[0x004,0x000] : r8.ub[123] => 0.ub[0]
++setp rflags[0x004,0x004] : r8.ub[123] => 0.ub[1]
++setp rflags[0x004,0x000] : m8.ub[123] => 0.ub[0]
++setp rflags[0x004,0x004] : m8.ub[123] => 0.ub[1]
++sets rflags[0x080,0x000] : r8.ub[123] => 0.ub[0]
++sets rflags[0x080,0x080] : r8.ub[123] => 0.ub[1]
++sets rflags[0x080,0x000] : m8.ub[123] => 0.ub[0]
++sets rflags[0x080,0x080] : m8.ub[123] => 0.ub[1]
++setz rflags[0x040,0x000] : r8.ub[123] => 0.ub[0]
++setz rflags[0x040,0x040] : r8.ub[123] => 0.ub[1]
++setz rflags[0x040,0x000] : m8.ub[123] => 0.ub[0]
++setz rflags[0x040,0x040] : m8.ub[123] => 0.ub[1]
+ shlb r8.ub[0xca] => 0.ub[0x94]
+ shlb m8.ub[0xca] => 0.ub[0x94]
+ shlb imm8[2] r8.ub[0xca] => 1.ub[0x28]
+@@ -1202,10 +1202,10 @@ shrdq cl.ub[1] r64.uq[0xffff0000ff00f0ca] r64.uq[0xffff0000ff00f0ca] => 2.uq[0x7
+ shrdq cl.ub[1] r64.uq[0xffff0000ff00f0ca] m64.uq[0xffff0000ff00f0ca] => 2.uq[0x7fff80007f807865]
+ shrdq cl.ub[16] r64.uq[0xffff0000ff00f0ca] r64.uq[0xffff0000ff00f0ca] => 2.uq[0xf0caffff0000ff00]
+ shrdq cl.ub[16] r64.uq[0xffff0000ff00f0ca] m64.uq[0xffff0000ff00f0ca] => 2.uq[0xf0caffff0000ff00]
+-###stc eflags[0x001,0x000] : => eflags[0x001,0x001]
+-###stc eflags[0x001,0x001] : => eflags[0x001,0x001]
+-std eflags[0x400,0x000] : => eflags[0x400,0x400]
+-std eflags[0x400,0x400] : => eflags[0x400,0x400]
++###stc rflags[0x001,0x000] : => rflags[0x001,0x001]
++###stc rflags[0x001,0x001] : => rflags[0x001,0x001]
++std rflags[0x400,0x000] : => rflags[0x400,0x400]
++std rflags[0x400,0x400] : => rflags[0x400,0x400]
+ subb imm8[12] al.ub[34] => 1.ub[22]
+ subb imm8[12] bl.ub[34] => 1.ub[22]
+ subb imm8[12] m8.ub[34] => 1.ub[22]
+@@ -1233,106 +1233,106 @@ subq imm32[12345678] rbx.uq[8765432175318642] => 1.uq[8765432162972964]
+ subq r64.uq[1234567813572468] r64.uq[8765432175318642] => 1.uq[7530864361746174]
+ subq r64.uq[1234567813572468] m64.uq[8765432175318642] => 1.uq[7530864361746174]
+ subq m64.uq[1234567813572468] r64.uq[8765432175318642] => 1.uq[7530864361746174]
+-testb imm8[0x1a] al.ub[0x1a] => eflags[0x8c5,0x000]
+-testb imm8[0x5a] al.ub[0x5a] => eflags[0x8c5,0x004]
+-testb imm8[0x1a] al.ub[0xa1] => eflags[0x8c5,0x044]
+-testb imm8[0xa1] al.ub[0xa1] => eflags[0x8c5,0x080]
+-testb imm8[0xa5] al.ub[0xa5] => eflags[0x8c5,0x084]
+-testb imm8[0x1a] bl.ub[0x1a] => eflags[0x8c5,0x000]
+-testb imm8[0x5a] bl.ub[0x5a] => eflags[0x8c5,0x004]
+-testb imm8[0x1a] bl.ub[0xa1] => eflags[0x8c5,0x044]
+-testb imm8[0xa1] bl.ub[0xa1] => eflags[0x8c5,0x080]
+-testb imm8[0xa5] bl.ub[0xa5] => eflags[0x8c5,0x084]
+-testb imm8[0x1a] m8.ub[0x1a] => eflags[0x8c5,0x000]
+-testb imm8[0x5a] m8.ub[0x5a] => eflags[0x8c5,0x004]
+-testb imm8[0x1a] m8.ub[0xa1] => eflags[0x8c5,0x044]
+-testb imm8[0xa1] m8.ub[0xa1] => eflags[0x8c5,0x080]
+-testb imm8[0xa5] m8.ub[0xa5] => eflags[0x8c5,0x084]
+-testb r8.ub[0x1a] r8.ub[0x1a] => eflags[0x8c5,0x000]
+-testb r8.ub[0x5a] r8.ub[0x5a] => eflags[0x8c5,0x004]
+-testb r8.ub[0x1a] r8.ub[0xa1] => eflags[0x8c5,0x044]
+-testb r8.ub[0xa1] r8.ub[0xa1] => eflags[0x8c5,0x080]
+-testb r8.ub[0xa5] r8.ub[0xa5] => eflags[0x8c5,0x084]
+-testb r8.ub[0x1a] m8.ub[0x1a] => eflags[0x8c5,0x000]
+-testb r8.ub[0x5a] m8.ub[0x5a] => eflags[0x8c5,0x004]
+-testb r8.ub[0x1a] m8.ub[0xa1] => eflags[0x8c5,0x044]
+-testb r8.ub[0xa1] m8.ub[0xa1] => eflags[0x8c5,0x080]
+-testb r8.ub[0xa5] m8.ub[0xa5] => eflags[0x8c5,0x084]
+-testw imm16[0x1a1a] ax.uw[0x1a1a] => eflags[0x8c5,0x000]
+-testw imm16[0x5a5a] ax.uw[0x5a5a] => eflags[0x8c5,0x004]
+-testw imm16[0x1a1a] ax.uw[0xa1a1] => eflags[0x8c5,0x044]
+-testw imm16[0xa1a1] ax.uw[0xa1a1] => eflags[0x8c5,0x080]
+-testw imm16[0xa5a5] ax.uw[0xa5a5] => eflags[0x8c5,0x084]
+-testw imm16[0x1a1a] bx.uw[0x1a1a] => eflags[0x8c5,0x000]
+-testw imm16[0x5a5a] bx.uw[0x5a5a] => eflags[0x8c5,0x004]
+-testw imm16[0x1a1a] bx.uw[0xa1a1] => eflags[0x8c5,0x044]
+-testw imm16[0xa1a1] bx.uw[0xa1a1] => eflags[0x8c5,0x080]
+-testw imm16[0xa5a5] bx.uw[0xa5a5] => eflags[0x8c5,0x084]
+-testw imm16[0x1a1a] m16.uw[0x1a1a] => eflags[0x8c5,0x000]
+-testw imm16[0x5a5a] m16.uw[0x5a5a] => eflags[0x8c5,0x004]
+-testw imm16[0x1a1a] m16.uw[0xa1a1] => eflags[0x8c5,0x044]
+-testw imm16[0xa1a1] m16.uw[0xa1a1] => eflags[0x8c5,0x080]
+-testw imm16[0xa5a5] m16.uw[0xa5a5] => eflags[0x8c5,0x084]
+-testw r16.uw[0x1a1a] r16.uw[0x1a1a] => eflags[0x8c5,0x000]
+-testw r16.uw[0x5a5a] r16.uw[0x5a5a] => eflags[0x8c5,0x004]
+-testw r16.uw[0x1a1a] r16.uw[0xa1a1] => eflags[0x8c5,0x044]
+-testw r16.uw[0xa1a1] r16.uw[0xa1a1] => eflags[0x8c5,0x080]
+-testw r16.uw[0xa5a5] r16.uw[0xa5a5] => eflags[0x8c5,0x084]
+-testw r16.uw[0x1a1a] m16.uw[0x1a1a] => eflags[0x8c5,0x000]
+-testw r16.uw[0x5a5a] m16.uw[0x5a5a] => eflags[0x8c5,0x004]
+-testw r16.uw[0x1a1a] m16.uw[0xa1a1] => eflags[0x8c5,0x044]
+-testw r16.uw[0xa1a1] m16.uw[0xa1a1] => eflags[0x8c5,0x080]
+-testw r16.uw[0xa5a5] m16.uw[0xa5a5] => eflags[0x8c5,0x084]
+-testl imm32[0x1a1a1a1a] eax.ud[0x1a1a1a1a] => eflags[0x8c5,0x000]
+-testl imm32[0x5a5a5a5a] eax.ud[0x5a5a5a5a] => eflags[0x8c5,0x004]
+-testl imm32[0x1a1a1a1a] eax.ud[0xa1a1a1a1] => eflags[0x8c5,0x044]
+-testl imm32[0xa1a1a1a1] eax.ud[0xa1a1a1a1] => eflags[0x8c5,0x080]
+-testl imm32[0xa5a5a5a5] eax.ud[0xa5a5a5a5] => eflags[0x8c5,0x084]
+-testl imm32[0x1a1a1a1a] ebx.ud[0x1a1a1a1a] => eflags[0x8c5,0x000]
+-testl imm32[0x5a5a5a5a] ebx.ud[0x5a5a5a5a] => eflags[0x8c5,0x004]
+-testl imm32[0x1a1a1a1a] ebx.ud[0xa1a1a1a1] => eflags[0x8c5,0x044]
+-testl imm32[0xa1a1a1a1] ebx.ud[0xa1a1a1a1] => eflags[0x8c5,0x080]
+-testl imm32[0xa5a5a5a5] ebx.ud[0xa5a5a5a5] => eflags[0x8c5,0x084]
+-testl imm32[0x1a1a1a1a] m32.ud[0x1a1a1a1a] => eflags[0x8c5,0x000]
+-testl imm32[0x5a5a5a5a] m32.ud[0x5a5a5a5a] => eflags[0x8c5,0x004]
+-testl imm32[0x1a1a1a1a] m32.ud[0xa1a1a1a1] => eflags[0x8c5,0x044]
+-testl imm32[0xa1a1a1a1] m32.ud[0xa1a1a1a1] => eflags[0x8c5,0x080]
+-testl imm32[0xa5a5a5a5] m32.ud[0xa5a5a5a5] => eflags[0x8c5,0x084]
+-testl r32.ud[0x1a1a1a1a] r32.ud[0x1a1a1a1a] => eflags[0x8c5,0x000]
+-testl r32.ud[0x5a5a5a5a] r32.ud[0x5a5a5a5a] => eflags[0x8c5,0x004]
+-testl r32.ud[0x1a1a1a1a] r32.ud[0xa1a1a1a1] => eflags[0x8c5,0x044]
+-testl r32.ud[0xa1a1a1a1] r32.ud[0xa1a1a1a1] => eflags[0x8c5,0x080]
+-testl r32.ud[0xa5a5a5a5] r32.ud[0xa5a5a5a5] => eflags[0x8c5,0x084]
+-testl r32.ud[0x1a1a1a1a] m32.ud[0x1a1a1a1a] => eflags[0x8c5,0x000]
+-testl r32.ud[0x5a5a5a5a] m32.ud[0x5a5a5a5a] => eflags[0x8c5,0x004]
+-testl r32.ud[0x1a1a1a1a] m32.ud[0xa1a1a1a1] => eflags[0x8c5,0x044]
+-testl r32.ud[0xa1a1a1a1] m32.ud[0xa1a1a1a1] => eflags[0x8c5,0x080]
+-testl r32.ud[0xa5a5a5a5] m32.ud[0xa5a5a5a5] => eflags[0x8c5,0x084]
+-testq imm32[0x1a1a1a1a] rax.uq[0x1a1a1a1a] => eflags[0x8c5,0x000]
+-testq imm32[0x5a5a5a5a] rax.uq[0x5a5a5a5a] => eflags[0x8c5,0x004]
+-testq imm32[0x1a1a1a1a] rax.uq[0xa1a1a1a1] => eflags[0x8c5,0x044]
+-testq imm32[-1583242847] rax.uq[0xffffffffa1a1a1a1] => eflags[0x8c5,0x080]
+-testq imm32[-1515870811] rax.uq[0xffffffffa5a5a5a5] => eflags[0x8c5,0x084]
+-testq imm32[0x1a1a1a1a] rbx.uq[0x1a1a1a1a] => eflags[0x8c5,0x000]
+-testq imm32[0x5a5a5a5a] rbx.uq[0x5a5a5a5a] => eflags[0x8c5,0x004]
+-testq imm32[0x1a1a1a1a] rbx.uq[0xa1a1a1a1] => eflags[0x8c5,0x044]
+-testq imm32[-1583242847] rbx.uq[0xffffffffa1a1a1a1] => eflags[0x8c5,0x080]
+-testq imm32[-1515870811] rbx.uq[0xffffffffa5a5a5a5] => eflags[0x8c5,0x084]
+-testq imm32[0x1a1a1a1a] m64.uq[0x1a1a1a1a] => eflags[0x8c5,0x000]
+-testq imm32[0x5a5a5a5a] m64.uq[0x5a5a5a5a] => eflags[0x8c5,0x004]
+-testq imm32[0x1a1a1a1a] m64.uq[0xa1a1a1a1] => eflags[0x8c5,0x044]
+-testq imm32[-1583242847] m64.uq[0xffffffffa1a1a1a1] => eflags[0x8c5,0x080]
+-testq imm32[-1515870811] m64.uq[0xffffffffa5a5a5a5] => eflags[0x8c5,0x084]
+-testq r64.uq[0x1a1a1a1a1a1a1a1a] r64.uq[0x1a1a1a1a1a1a1a1a] => eflags[0x8c5,0x000]
+-testq r64.uq[0x5a5a5a5a5a5a5a5a] r64.uq[0x5a5a5a5a5a5a5a5a] => eflags[0x8c5,0x004]
+-testq r64.uq[0x1a1a1a1a1a1a1a1a] r64.uq[0xa1a1a1a1a1a1a1a1] => eflags[0x8c5,0x044]
+-testq r64.uq[0xa1a1a1a1a1a1a1a1] r64.uq[0xa1a1a1a1a1a1a1a1] => eflags[0x8c5,0x080]
+-testq r64.uq[0xa5a5a5a5a5a5a5a5] r64.uq[0xa5a5a5a5a5a5a5a5] => eflags[0x8c5,0x084]
+-testq r64.uq[0x1a1a1a1a1a1a1a1a] m64.uq[0x1a1a1a1a1a1a1a1a] => eflags[0x8c5,0x000]
+-testq r64.uq[0x5a5a5a5a5a5a5a5a] m64.uq[0x5a5a5a5a5a5a5a5a] => eflags[0x8c5,0x004]
+-testq r64.uq[0x1a1a1a1a1a1a1a1a] m64.uq[0xa1a1a1a1a1a1a1a1] => eflags[0x8c5,0x044]
+-testq r64.uq[0xa1a1a1a1a1a1a1a1] m64.uq[0xa1a1a1a1a1a1a1a1] => eflags[0x8c5,0x080]
+-testq r64.uq[0xa5a5a5a5a5a5a5a5] m64.uq[0xa5a5a5a5a5a5a5a5] => eflags[0x8c5,0x084]
++testb imm8[0x1a] al.ub[0x1a] => rflags[0x8c5,0x000]
++testb imm8[0x5a] al.ub[0x5a] => rflags[0x8c5,0x004]
++testb imm8[0x1a] al.ub[0xa1] => rflags[0x8c5,0x044]
++testb imm8[0xa1] al.ub[0xa1] => rflags[0x8c5,0x080]
++testb imm8[0xa5] al.ub[0xa5] => rflags[0x8c5,0x084]
++testb imm8[0x1a] bl.ub[0x1a] => rflags[0x8c5,0x000]
++testb imm8[0x5a] bl.ub[0x5a] => rflags[0x8c5,0x004]
++testb imm8[0x1a] bl.ub[0xa1] => rflags[0x8c5,0x044]
++testb imm8[0xa1] bl.ub[0xa1] => rflags[0x8c5,0x080]
++testb imm8[0xa5] bl.ub[0xa5] => rflags[0x8c5,0x084]
++testb imm8[0x1a] m8.ub[0x1a] => rflags[0x8c5,0x000]
++testb imm8[0x5a] m8.ub[0x5a] => rflags[0x8c5,0x004]
++testb imm8[0x1a] m8.ub[0xa1] => rflags[0x8c5,0x044]
++testb imm8[0xa1] m8.ub[0xa1] => rflags[0x8c5,0x080]
++testb imm8[0xa5] m8.ub[0xa5] => rflags[0x8c5,0x084]
++testb r8.ub[0x1a] r8.ub[0x1a] => rflags[0x8c5,0x000]
++testb r8.ub[0x5a] r8.ub[0x5a] => rflags[0x8c5,0x004]
++testb r8.ub[0x1a] r8.ub[0xa1] => rflags[0x8c5,0x044]
++testb r8.ub[0xa1] r8.ub[0xa1] => rflags[0x8c5,0x080]
++testb r8.ub[0xa5] r8.ub[0xa5] => rflags[0x8c5,0x084]
++testb r8.ub[0x1a] m8.ub[0x1a] => rflags[0x8c5,0x000]
++testb r8.ub[0x5a] m8.ub[0x5a] => rflags[0x8c5,0x004]
++testb r8.ub[0x1a] m8.ub[0xa1] => rflags[0x8c5,0x044]
++testb r8.ub[0xa1] m8.ub[0xa1] => rflags[0x8c5,0x080]
++testb r8.ub[0xa5] m8.ub[0xa5] => rflags[0x8c5,0x084]
++testw imm16[0x1a1a] ax.uw[0x1a1a] => rflags[0x8c5,0x000]
++testw imm16[0x5a5a] ax.uw[0x5a5a] => rflags[0x8c5,0x004]
++testw imm16[0x1a1a] ax.uw[0xa1a1] => rflags[0x8c5,0x044]
++testw imm16[0xa1a1] ax.uw[0xa1a1] => rflags[0x8c5,0x080]
++testw imm16[0xa5a5] ax.uw[0xa5a5] => rflags[0x8c5,0x084]
++testw imm16[0x1a1a] bx.uw[0x1a1a] => rflags[0x8c5,0x000]
++testw imm16[0x5a5a] bx.uw[0x5a5a] => rflags[0x8c5,0x004]
++testw imm16[0x1a1a] bx.uw[0xa1a1] => rflags[0x8c5,0x044]
++testw imm16[0xa1a1] bx.uw[0xa1a1] => rflags[0x8c5,0x080]
++testw imm16[0xa5a5] bx.uw[0xa5a5] => rflags[0x8c5,0x084]
++testw imm16[0x1a1a] m16.uw[0x1a1a] => rflags[0x8c5,0x000]
++testw imm16[0x5a5a] m16.uw[0x5a5a] => rflags[0x8c5,0x004]
++testw imm16[0x1a1a] m16.uw[0xa1a1] => rflags[0x8c5,0x044]
++testw imm16[0xa1a1] m16.uw[0xa1a1] => rflags[0x8c5,0x080]
++testw imm16[0xa5a5] m16.uw[0xa5a5] => rflags[0x8c5,0x084]
++testw r16.uw[0x1a1a] r16.uw[0x1a1a] => rflags[0x8c5,0x000]
++testw r16.uw[0x5a5a] r16.uw[0x5a5a] => rflags[0x8c5,0x004]
++testw r16.uw[0x1a1a] r16.uw[0xa1a1] => rflags[0x8c5,0x044]
++testw r16.uw[0xa1a1] r16.uw[0xa1a1] => rflags[0x8c5,0x080]
++testw r16.uw[0xa5a5] r16.uw[0xa5a5] => rflags[0x8c5,0x084]
++testw r16.uw[0x1a1a] m16.uw[0x1a1a] => rflags[0x8c5,0x000]
++testw r16.uw[0x5a5a] m16.uw[0x5a5a] => rflags[0x8c5,0x004]
++testw r16.uw[0x1a1a] m16.uw[0xa1a1] => rflags[0x8c5,0x044]
++testw r16.uw[0xa1a1] m16.uw[0xa1a1] => rflags[0x8c5,0x080]
++testw r16.uw[0xa5a5] m16.uw[0xa5a5] => rflags[0x8c5,0x084]
++testl imm32[0x1a1a1a1a] eax.ud[0x1a1a1a1a] => rflags[0x8c5,0x000]
++testl imm32[0x5a5a5a5a] eax.ud[0x5a5a5a5a] => rflags[0x8c5,0x004]
++testl imm32[0x1a1a1a1a] eax.ud[0xa1a1a1a1] => rflags[0x8c5,0x044]
++testl imm32[0xa1a1a1a1] eax.ud[0xa1a1a1a1] => rflags[0x8c5,0x080]
++testl imm32[0xa5a5a5a5] eax.ud[0xa5a5a5a5] => rflags[0x8c5,0x084]
++testl imm32[0x1a1a1a1a] ebx.ud[0x1a1a1a1a] => rflags[0x8c5,0x000]
++testl imm32[0x5a5a5a5a] ebx.ud[0x5a5a5a5a] => rflags[0x8c5,0x004]
++testl imm32[0x1a1a1a1a] ebx.ud[0xa1a1a1a1] => rflags[0x8c5,0x044]
++testl imm32[0xa1a1a1a1] ebx.ud[0xa1a1a1a1] => rflags[0x8c5,0x080]
++testl imm32[0xa5a5a5a5] ebx.ud[0xa5a5a5a5] => rflags[0x8c5,0x084]
++testl imm32[0x1a1a1a1a] m32.ud[0x1a1a1a1a] => rflags[0x8c5,0x000]
++testl imm32[0x5a5a5a5a] m32.ud[0x5a5a5a5a] => rflags[0x8c5,0x004]
++testl imm32[0x1a1a1a1a] m32.ud[0xa1a1a1a1] => rflags[0x8c5,0x044]
++testl imm32[0xa1a1a1a1] m32.ud[0xa1a1a1a1] => rflags[0x8c5,0x080]
++testl imm32[0xa5a5a5a5] m32.ud[0xa5a5a5a5] => rflags[0x8c5,0x084]
++testl r32.ud[0x1a1a1a1a] r32.ud[0x1a1a1a1a] => rflags[0x8c5,0x000]
++testl r32.ud[0x5a5a5a5a] r32.ud[0x5a5a5a5a] => rflags[0x8c5,0x004]
++testl r32.ud[0x1a1a1a1a] r32.ud[0xa1a1a1a1] => rflags[0x8c5,0x044]
++testl r32.ud[0xa1a1a1a1] r32.ud[0xa1a1a1a1] => rflags[0x8c5,0x080]
++testl r32.ud[0xa5a5a5a5] r32.ud[0xa5a5a5a5] => rflags[0x8c5,0x084]
++testl r32.ud[0x1a1a1a1a] m32.ud[0x1a1a1a1a] => rflags[0x8c5,0x000]
++testl r32.ud[0x5a5a5a5a] m32.ud[0x5a5a5a5a] => rflags[0x8c5,0x004]
++testl r32.ud[0x1a1a1a1a] m32.ud[0xa1a1a1a1] => rflags[0x8c5,0x044]
++testl r32.ud[0xa1a1a1a1] m32.ud[0xa1a1a1a1] => rflags[0x8c5,0x080]
++testl r32.ud[0xa5a5a5a5] m32.ud[0xa5a5a5a5] => rflags[0x8c5,0x084]
++testq imm32[0x1a1a1a1a] rax.uq[0x1a1a1a1a] => rflags[0x8c5,0x000]
++testq imm32[0x5a5a5a5a] rax.uq[0x5a5a5a5a] => rflags[0x8c5,0x004]
++testq imm32[0x1a1a1a1a] rax.uq[0xa1a1a1a1] => rflags[0x8c5,0x044]
++testq imm32[-1583242847] rax.uq[0xffffffffa1a1a1a1] => rflags[0x8c5,0x080]
++testq imm32[-1515870811] rax.uq[0xffffffffa5a5a5a5] => rflags[0x8c5,0x084]
++testq imm32[0x1a1a1a1a] rbx.uq[0x1a1a1a1a] => rflags[0x8c5,0x000]
++testq imm32[0x5a5a5a5a] rbx.uq[0x5a5a5a5a] => rflags[0x8c5,0x004]
++testq imm32[0x1a1a1a1a] rbx.uq[0xa1a1a1a1] => rflags[0x8c5,0x044]
++testq imm32[-1583242847] rbx.uq[0xffffffffa1a1a1a1] => rflags[0x8c5,0x080]
++testq imm32[-1515870811] rbx.uq[0xffffffffa5a5a5a5] => rflags[0x8c5,0x084]
++testq imm32[0x1a1a1a1a] m64.uq[0x1a1a1a1a] => rflags[0x8c5,0x000]
++testq imm32[0x5a5a5a5a] m64.uq[0x5a5a5a5a] => rflags[0x8c5,0x004]
++testq imm32[0x1a1a1a1a] m64.uq[0xa1a1a1a1] => rflags[0x8c5,0x044]
++testq imm32[-1583242847] m64.uq[0xffffffffa1a1a1a1] => rflags[0x8c5,0x080]
++testq imm32[-1515870811] m64.uq[0xffffffffa5a5a5a5] => rflags[0x8c5,0x084]
++testq r64.uq[0x1a1a1a1a1a1a1a1a] r64.uq[0x1a1a1a1a1a1a1a1a] => rflags[0x8c5,0x000]
++testq r64.uq[0x5a5a5a5a5a5a5a5a] r64.uq[0x5a5a5a5a5a5a5a5a] => rflags[0x8c5,0x004]
++testq r64.uq[0x1a1a1a1a1a1a1a1a] r64.uq[0xa1a1a1a1a1a1a1a1] => rflags[0x8c5,0x044]
++testq r64.uq[0xa1a1a1a1a1a1a1a1] r64.uq[0xa1a1a1a1a1a1a1a1] => rflags[0x8c5,0x080]
++testq r64.uq[0xa5a5a5a5a5a5a5a5] r64.uq[0xa5a5a5a5a5a5a5a5] => rflags[0x8c5,0x084]
++testq r64.uq[0x1a1a1a1a1a1a1a1a] m64.uq[0x1a1a1a1a1a1a1a1a] => rflags[0x8c5,0x000]
++testq r64.uq[0x5a5a5a5a5a5a5a5a] m64.uq[0x5a5a5a5a5a5a5a5a] => rflags[0x8c5,0x004]
++testq r64.uq[0x1a1a1a1a1a1a1a1a] m64.uq[0xa1a1a1a1a1a1a1a1] => rflags[0x8c5,0x044]
++testq r64.uq[0xa1a1a1a1a1a1a1a1] m64.uq[0xa1a1a1a1a1a1a1a1] => rflags[0x8c5,0x080]
++testq r64.uq[0xa5a5a5a5a5a5a5a5] m64.uq[0xa5a5a5a5a5a5a5a5] => rflags[0x8c5,0x084]
+ ###xaddb r8.ub[12] r8.ub[34] => 0.ub[34] 1.ub[46]
+ ###xaddb r8.ub[12] m8.ub[34] => 0.ub[34] 1.ub[46]
+ ###xaddw r16.uw[1234] r16.uw[5678] => 0.uw[5678] 1.uw[6912]
+diff --git a/none/tests/amd64/insn_fpu.def b/none/tests/amd64/insn_fpu.def
+index 590f584..525fd1b 100644
+--- a/none/tests/amd64/insn_fpu.def
++++ b/none/tests/amd64/insn_fpu.def
+@@ -70,30 +70,30 @@ fcomps st1.ps[8765.4321] st0.ps[1234.5678] : m32.ps[1234.5678] => st0.ps[8765.43
+ fcompl st1.pd[7654321.1234567] st0.pd[1234567.7654321] : m64.pd[1234567.7654320] => st0.pd[7654321.1234567] fpusw[0x4700,0x0000]
+ fcompl st1.pd[7654321.1234567] st0.pd[1234567.7654321] : m64.pd[1234567.7654322] => st0.pd[7654321.1234567] fpusw[0x4700,0x0100]
+ fcompl st1.pd[7654321.1234567] st0.pd[1234567.7654321] : m64.pd[1234567.7654321] => st0.pd[7654321.1234567] fpusw[0x4700,0x4000]
+-fcomi st2.ps[1234.5678] st0.ps[1234.5679] => st0.ps[1234.5678] st2.ps[1234.5679] eflags[0x45,0x00]
+-fcomi st2.ps[1234.5678] st0.ps[1234.5676] => st0.ps[1234.5678] st2.ps[1234.5676] eflags[0x45,0x01]
+-fcomi st2.ps[1234.5678] st0.ps[1234.5678] => st0.ps[1234.5678] st2.ps[1234.5678] eflags[0x45,0x40]
+-fcomi st2.pd[1234567.7654321] st0.pd[1234567.7654322] => st0.pd[1234567.7654322] st2.pd[1234567.7654321] eflags[0x45,0x00]
+-fcomi st2.pd[1234567.7654321] st0.pd[1234567.7654320] => st0.pd[1234567.7654320] st2.pd[1234567.7654321] eflags[0x45,0x01]
+-fcomi st2.pd[1234567.7654321] st0.pd[1234567.7654321] => st0.pd[1234567.7654321] st2.pd[1234567.7654321] eflags[0x45,0x40]
+-fcomip st2.ps[1234.5678] st0.ps[1234.5679] => st1.ps[1234.5679] eflags[0x45,0x00]
+-fcomip st2.ps[1234.5678] st0.ps[1234.5676] => st1.ps[1234.5676] eflags[0x45,0x01]
+-fcomip st2.ps[1234.5678] st0.ps[1234.5678] => st1.ps[1234.5678] eflags[0x45,0x40]
+-fcomip st2.pd[1234567.7654321] st0.pd[1234567.7654322] => st1.pd[1234567.7654321] eflags[0x45,0x00]
+-fcomip st2.pd[1234567.7654321] st0.pd[1234567.7654320] => st1.pd[1234567.7654321] eflags[0x45,0x01]
+-fcomip st2.pd[1234567.7654321] st0.pd[1234567.7654321] => st1.pd[1234567.7654321] eflags[0x45,0x40]
+-fucomi st2.ps[1234.5678] st0.ps[1234.5679] => st0.ps[1234.5678] st2.ps[1234.5679] eflags[0x45,0x00]
+-fucomi st2.ps[1234.5678] st0.ps[1234.5676] => st0.ps[1234.5678] st2.ps[1234.5676] eflags[0x45,0x01]
+-fucomi st2.ps[1234.5678] st0.ps[1234.5678] => st0.ps[1234.5678] st2.ps[1234.5678] eflags[0x45,0x40]
+-fucomi st2.pd[1234567.7654321] st0.pd[1234567.7654322] => st0.pd[1234567.7654322] st2.pd[1234567.7654321] eflags[0x45,0x00]
+-fucomi st2.pd[1234567.7654321] st0.pd[1234567.7654320] => st0.pd[1234567.7654320] st2.pd[1234567.7654321] eflags[0x45,0x01]
+-fucomi st2.pd[1234567.7654321] st0.pd[1234567.7654321] => st0.pd[1234567.7654321] st2.pd[1234567.7654321] eflags[0x45,0x40]
+-fucomip st2.ps[1234.5678] st0.ps[1234.5679] => st1.ps[1234.5679] eflags[0x45,0x00]
+-fucomip st2.ps[1234.5678] st0.ps[1234.5676] => st1.ps[1234.5676] eflags[0x45,0x01]
+-fucomip st2.ps[1234.5678] st0.ps[1234.5678] => st1.ps[1234.5678] eflags[0x45,0x40]
+-fucomip st2.pd[1234567.7654321] st0.pd[1234567.7654322] => st1.pd[1234567.7654321] eflags[0x45,0x00]
+-fucomip st2.pd[1234567.7654321] st0.pd[1234567.7654320] => st1.pd[1234567.7654321] eflags[0x45,0x01]
+-fucomip st2.pd[1234567.7654321] st0.pd[1234567.7654321] => st1.pd[1234567.7654321] eflags[0x45,0x40]
++fcomi st2.ps[1234.5678] st0.ps[1234.5679] => st0.ps[1234.5678] st2.ps[1234.5679] rflags[0x45,0x00]
++fcomi st2.ps[1234.5678] st0.ps[1234.5676] => st0.ps[1234.5678] st2.ps[1234.5676] rflags[0x45,0x01]
++fcomi st2.ps[1234.5678] st0.ps[1234.5678] => st0.ps[1234.5678] st2.ps[1234.5678] rflags[0x45,0x40]
++fcomi st2.pd[1234567.7654321] st0.pd[1234567.7654322] => st0.pd[1234567.7654322] st2.pd[1234567.7654321] rflags[0x45,0x00]
++fcomi st2.pd[1234567.7654321] st0.pd[1234567.7654320] => st0.pd[1234567.7654320] st2.pd[1234567.7654321] rflags[0x45,0x01]
++fcomi st2.pd[1234567.7654321] st0.pd[1234567.7654321] => st0.pd[1234567.7654321] st2.pd[1234567.7654321] rflags[0x45,0x40]
++fcomip st2.ps[1234.5678] st0.ps[1234.5679] => st1.ps[1234.5679] rflags[0x45,0x00]
++fcomip st2.ps[1234.5678] st0.ps[1234.5676] => st1.ps[1234.5676] rflags[0x45,0x01]
++fcomip st2.ps[1234.5678] st0.ps[1234.5678] => st1.ps[1234.5678] rflags[0x45,0x40]
++fcomip st2.pd[1234567.7654321] st0.pd[1234567.7654322] => st1.pd[1234567.7654321] rflags[0x45,0x00]
++fcomip st2.pd[1234567.7654321] st0.pd[1234567.7654320] => st1.pd[1234567.7654321] rflags[0x45,0x01]
++fcomip st2.pd[1234567.7654321] st0.pd[1234567.7654321] => st1.pd[1234567.7654321] rflags[0x45,0x40]
++fucomi st2.ps[1234.5678] st0.ps[1234.5679] => st0.ps[1234.5678] st2.ps[1234.5679] rflags[0x45,0x00]
++fucomi st2.ps[1234.5678] st0.ps[1234.5676] => st0.ps[1234.5678] st2.ps[1234.5676] rflags[0x45,0x01]
++fucomi st2.ps[1234.5678] st0.ps[1234.5678] => st0.ps[1234.5678] st2.ps[1234.5678] rflags[0x45,0x40]
++fucomi st2.pd[1234567.7654321] st0.pd[1234567.7654322] => st0.pd[1234567.7654322] st2.pd[1234567.7654321] rflags[0x45,0x00]
++fucomi st2.pd[1234567.7654321] st0.pd[1234567.7654320] => st0.pd[1234567.7654320] st2.pd[1234567.7654321] rflags[0x45,0x01]
++fucomi st2.pd[1234567.7654321] st0.pd[1234567.7654321] => st0.pd[1234567.7654321] st2.pd[1234567.7654321] rflags[0x45,0x40]
++fucomip st2.ps[1234.5678] st0.ps[1234.5679] => st1.ps[1234.5679] rflags[0x45,0x00]
++fucomip st2.ps[1234.5678] st0.ps[1234.5676] => st1.ps[1234.5676] rflags[0x45,0x01]
++fucomip st2.ps[1234.5678] st0.ps[1234.5678] => st1.ps[1234.5678] rflags[0x45,0x40]
++fucomip st2.pd[1234567.7654321] st0.pd[1234567.7654322] => st1.pd[1234567.7654321] rflags[0x45,0x00]
++fucomip st2.pd[1234567.7654321] st0.pd[1234567.7654320] => st1.pd[1234567.7654321] rflags[0x45,0x01]
++fucomip st2.pd[1234567.7654321] st0.pd[1234567.7654321] => st1.pd[1234567.7654321] rflags[0x45,0x40]
+ fchs st0.ps[1234.5678] : => st0.ps[-1234.5678]
+ fchs st0.ps[-1234.5678] : => st0.ps[1234.5678]
+ fchs st0.pd[12345678.87654321] : => st0.pd[-12345678.87654321]
+diff --git a/none/tests/amd64/insn_sse.def b/none/tests/amd64/insn_sse.def
+index a9e92a0..277a062 100644
+--- a/none/tests/amd64/insn_sse.def
++++ b/none/tests/amd64/insn_sse.def
+@@ -38,12 +38,12 @@ cmpordps xmm.ps[234.5678,234.5678,234.5678,234.5678] xmm.ps[234.5679,234.5677,23
+ cmpordps m128.ps[234.5678,234.5678,234.5678,234.5678] xmm.ps[234.5679,234.5677,234.5679,234.5677] => 1.ud[0xffffffff,0xffffffff,0xffffffff,0xffffffff]
+ cmpordss xmm.ps[1234.5678,0.0,0.0,0.0] xmm.ps[1234.5679,0.0,0.0,0.0] => 1.ud[0xffffffff,0,0,0]
+ cmpordss m128.ps[1234.5678,0.0,0.0,0.0] xmm.ps[1234.5676,0.0,0.0,0.0] => 1.ud[0xffffffff,0,0,0]
+-comiss xmm.ps[234.5678,0.0] xmm.ps[234.5679,0.0] => eflags[0x8d5,0x000]
+-comiss m32.ps[234.5678] xmm.ps[234.5679,0.0] => eflags[0x8d5,0x000]
+-comiss xmm.ps[234.5678,0.0] xmm.ps[234.5677,0.0] => eflags[0x8d5,0x001]
+-comiss m32.ps[234.5678] xmm.ps[234.5677,0.0] => eflags[0x8d5,0x001]
+-comiss xmm.ps[234.5678,0.0] xmm.ps[234.5678,0.0] => eflags[0x8d5,0x040]
+-comiss m32.ps[234.5678] xmm.ps[234.5678,0.0] => eflags[0x8d5,0x040]
++comiss xmm.ps[234.5678,0.0] xmm.ps[234.5679,0.0] => rflags[0x8d5,0x000]
++comiss m32.ps[234.5678] xmm.ps[234.5679,0.0] => rflags[0x8d5,0x000]
++comiss xmm.ps[234.5678,0.0] xmm.ps[234.5677,0.0] => rflags[0x8d5,0x001]
++comiss m32.ps[234.5678] xmm.ps[234.5677,0.0] => rflags[0x8d5,0x001]
++comiss xmm.ps[234.5678,0.0] xmm.ps[234.5678,0.0] => rflags[0x8d5,0x040]
++comiss m32.ps[234.5678] xmm.ps[234.5678,0.0] => rflags[0x8d5,0x040]
+ cvtpi2ps mm.sd[1234,5678] xmm.ps[1.1,2.2,3.3,4.4] => 1.ps[1234.0,5678.0,3.3,4.4]
+ cvtpi2ps m64.sd[1234,5678] xmm.ps[1.1,2.2,3.3,4.4] => 1.ps[1234.0,5678.0,3.3,4.4]
+ cvtps2pi xmm.ps[12.34,56.78,1.11,2.22] mm.sd[1,2] => 1.sd[12,57]
+@@ -140,12 +140,12 @@ subps xmm.ps[12.34,56.77,43.21,87.65] xmm.ps[44.0,33.0,22.0,11.0] => 1.ps[31.66,
+ subps m128.ps[12.34,56.77,43.21,87.65] xmm.ps[44.0,33.0,22.0,11.0] => 1.ps[31.66,-23.77,-21.21,-76.65]
+ subss xmm.ps[12.34,56.77,43.21,87.65] xmm.ps[44.0,33.0,22.0,11.0] => 1.ps[31.66,33.0,22.0,11.0]
+ subss m128.ps[12.34,56.77,43.21,87.65] xmm.ps[44.0,33.0,22.0,11.0] => 1.ps[31.66,33.0,22.0,11.0]
+-ucomiss xmm.ps[234.5678,0.0] xmm.ps[234.5679,0.0] => eflags[0x8d5,0x000]
+-ucomiss m32.ps[234.5678] xmm.ps[234.5679,0.0] => eflags[0x8d5,0x000]
+-ucomiss xmm.ps[234.5678,0.0] xmm.ps[234.5677,0.0] => eflags[0x8d5,0x001]
+-ucomiss m32.ps[234.5678] xmm.ps[234.5677,0.0] => eflags[0x8d5,0x001]
+-ucomiss xmm.ps[234.5678,0.0] xmm.ps[234.5678,0.0] => eflags[0x8d5,0x040]
+-ucomiss m32.ps[234.5678] xmm.ps[234.5678,0.0] => eflags[0x8d5,0x040]
++ucomiss xmm.ps[234.5678,0.0] xmm.ps[234.5679,0.0] => rflags[0x8d5,0x000]
++ucomiss m32.ps[234.5678] xmm.ps[234.5679,0.0] => rflags[0x8d5,0x000]
++ucomiss xmm.ps[234.5678,0.0] xmm.ps[234.5677,0.0] => rflags[0x8d5,0x001]
++ucomiss m32.ps[234.5678] xmm.ps[234.5677,0.0] => rflags[0x8d5,0x001]
++ucomiss xmm.ps[234.5678,0.0] xmm.ps[234.5678,0.0] => rflags[0x8d5,0x040]
++ucomiss m32.ps[234.5678] xmm.ps[234.5678,0.0] => rflags[0x8d5,0x040]
+ unpckhps xmm.ps[12.34,56.78,43.21,87.65] xmm.ps[11.22,33.44,55.66,77.88] => 1.ps[55.66,43.21,77.88,87.65]
+ unpckhps m128.ps[12.34,56.78,43.21,87.65] xmm.ps[11.22,33.44,55.66,77.88] => 1.ps[55.66,43.21,77.88,87.65]
+ unpcklps xmm.ps[12.34,56.78,43.21,87.65] xmm.ps[11.22,33.44,55.66,77.88] => 1.ps[11.22,12.34,33.44,56.78]
+diff --git a/none/tests/amd64/insn_sse2.def b/none/tests/amd64/insn_sse2.def
+index 3cbdd41..7e0890e 100644
+--- a/none/tests/amd64/insn_sse2.def
++++ b/none/tests/amd64/insn_sse2.def
+@@ -38,12 +38,12 @@ cmpnlesd xmm.pd[1234.5678,0.0] xmm.pd[1234.5679,0.0] => 1.uq[0xffffffffffffffff,
+ cmpnlesd m128.pd[1234.5678,0.0] xmm.pd[1234.5678,0.0] => 1.uq[0x0000000000000000,0]
+ cmpordsd xmm.pd[1234.5678,0.0] xmm.pd[1234.5679,0.0] => 1.uq[0xffffffffffffffff,0]
+ cmpordsd m128.pd[1234.5678,0.0] xmm.pd[1234.5678,0.0] => 1.uq[0xffffffffffffffff,0]
+-comisd xmm.pd[1234.5678,0.0] xmm.pd[1234.5679,0.0] => eflags[0x8d5,0x000]
+-comisd xmm.pd[1234.5678,0.0] xmm.pd[1234.5677,0.0] => eflags[0x8d5,0x001]
+-comisd xmm.pd[1234.5678,0.0] xmm.pd[1234.5678,0.0] => eflags[0x8d5,0x040]
+-comisd m64.pd[1234.5678] xmm.pd[1234.5679,0.0] => eflags[0x8d5,0x000]
+-comisd m64.pd[1234.5678] xmm.pd[1234.5677,0.0] => eflags[0x8d5,0x001]
+-comisd m64.pd[1234.5678] xmm.pd[1234.5678,0.0] => eflags[0x8d5,0x040]
++comisd xmm.pd[1234.5678,0.0] xmm.pd[1234.5679,0.0] => rflags[0x8d5,0x000]
++comisd xmm.pd[1234.5678,0.0] xmm.pd[1234.5677,0.0] => rflags[0x8d5,0x001]
++comisd xmm.pd[1234.5678,0.0] xmm.pd[1234.5678,0.0] => rflags[0x8d5,0x040]
++comisd m64.pd[1234.5678] xmm.pd[1234.5679,0.0] => rflags[0x8d5,0x000]
++comisd m64.pd[1234.5678] xmm.pd[1234.5677,0.0] => rflags[0x8d5,0x001]
++comisd m64.pd[1234.5678] xmm.pd[1234.5678,0.0] => rflags[0x8d5,0x040]
+ cvtdq2pd xmm.sd[1234,5678,0,0] xmm.pd[0.0,0.0] => 1.pd[1234.0,5678.0]
+ cvtdq2pd m128.sd[1234,5678,0,0] xmm.pd[0.0,0.0] => 1.pd[1234.0,5678.0]
+ cvtdq2ps xmm.sd[1234,5678,-1234,-5678] xmm.ps[0.0,0.0,0.0,0.0] => 1.ps[1234.0,5678.0,-1234.0,-5678.0]
+@@ -329,12 +329,12 @@ subpd xmm.pd[1234.5678,8765.4321] xmm.pd[2222.0,1111.0] => 1.pd[987.4322,-7654.4
+ subpd m128.pd[1234.5678,8765.4321] xmm.pd[2222.0,1111.0] => 1.pd[987.4322,-7654.4321]
+ subsd xmm.pd[1234.5678,8765.4321] xmm.pd[2222.0,1111.0] => 1.pd[987.4322,1111.0]
+ subsd m128.pd[1234.5678,8765.4321] xmm.pd[2222.0,1111.0] => 1.pd[987.4322,1111.0]
+-ucomisd xmm.pd[1234.5678,0.0] xmm.pd[1234.5679,0.0] => eflags[0x8d5,0x000]
+-ucomisd xmm.pd[1234.5678,0.0] xmm.pd[1234.5677,0.0] => eflags[0x8d5,0x001]
+-ucomisd xmm.pd[1234.5678,0.0] xmm.pd[1234.5678,0.0] => eflags[0x8d5,0x040]
+-ucomisd m64.pd[1234.5678] xmm.pd[1234.5679,0.0] => eflags[0x8d5,0x000]
+-ucomisd m64.pd[1234.5678] xmm.pd[1234.5677,0.0] => eflags[0x8d5,0x001]
+-ucomisd m64.pd[1234.5678] xmm.pd[1234.5678,0.0] => eflags[0x8d5,0x040]
++ucomisd xmm.pd[1234.5678,0.0] xmm.pd[1234.5679,0.0] => rflags[0x8d5,0x000]
++ucomisd xmm.pd[1234.5678,0.0] xmm.pd[1234.5677,0.0] => rflags[0x8d5,0x001]
++ucomisd xmm.pd[1234.5678,0.0] xmm.pd[1234.5678,0.0] => rflags[0x8d5,0x040]
++ucomisd m64.pd[1234.5678] xmm.pd[1234.5679,0.0] => rflags[0x8d5,0x000]
++ucomisd m64.pd[1234.5678] xmm.pd[1234.5677,0.0] => rflags[0x8d5,0x001]
++ucomisd m64.pd[1234.5678] xmm.pd[1234.5678,0.0] => rflags[0x8d5,0x040]
+ unpckhpd xmm.pd[1234.5678,8765.4321] xmm.pd[1122.3344,5566.7788] => 1.pd[5566.7788,8765.4321]
+ unpckhpd m128.pd[1234.5678,8765.4321] xmm.pd[1122.3344,5566.7788] => 1.pd[5566.7788,8765.4321]
+ unpcklpd xmm.pd[1234.5678,8765.4321] xmm.pd[1122.3344,5566.7788] => 1.pd[1122.3344,1234.5678]
Added: valgrind-3.13.0-gdb-8-testfix.patch
===================================================================
--- valgrind-3.13.0-gdb-8-testfix.patch (rev 0)
+++ valgrind-3.13.0-gdb-8-testfix.patch 2017-12-21 19:35:27 UTC (rev 313500)
@@ -0,0 +1,183 @@
+commit 21788250c945713fa25c16f2683e1f9cd0bb6ccf
+Author: philippe <philippe at a5019735-40e9-0310-863c-91ae7b9d1cf9>
+Date: Sun Jun 25 12:40:53 2017 +0000
+
+ Fix some tests failure with GDB 8.0
+
+ At the beginning of a Valgrind gdbserver test,
+ 2 messages are produced when launching the command
+ target remote | vgdb
+
+ A message output by vgdb:
+ relaying data between gdb and process <pid>
+ (this message is read by GDB from the vgdb pipe, and re-output
+ on stderr)
+ and a message produced by GDB:
+ Remote debugging using | ./vgdb
+
+ GDB 8.0 changes the order in which the above messages are output.
+ This causes 2 tests to fail, as the 'relaying' line appears
+ then in a part of the output deleted by a filter script.
+
+ To avoid this, change the filter scripts to always remove
+ this 'relaying line', which is not particularly interesting to check.
+ All the .exp files containining such a 'relaying' line are updated
+ accordingly.
+
+ This has been tested with various gdb versions (7.5, 7.7, 7.12, 8.0)
+ on amd64 and/or ppc64.
+
+ Thanks to Mark Wielaard, which helped to investigate this problem
+ by bisecting the GDB patches in GDB 8.0 causing this change of
+ behaviour.
+
+
+
+
+ git-svn-id: svn://svn.valgrind.org/valgrind/trunk@16453 a5019735-40e9-0310-863c-91ae7b9d1cf9
+
+diff --git a/gdbserver_tests/filter_gdb b/gdbserver_tests/filter_gdb
+index 7177720..ed78cfe 100755
+--- a/gdbserver_tests/filter_gdb
++++ b/gdbserver_tests/filter_gdb
+@@ -72,7 +72,7 @@ sed -e '/Remote debugging using/,/vgdb launched process attached/d'
+ -e '/^Missing separate debuginfo/d' \
+ -e '/\/_exit.c: No such file or directory/d' \
+ -e '/^Try: zypper install -C/d' \
+- -e 's/\(relaying data between gdb and process \)[0-9][0-9]*/\1..../' \
++ -e '/relaying data between gdb and process/d' \
+ -e 's/pid [0-9][0-9]*/pid ..../g' \
+ -e 's/Thread [0-9][0-9]*/Thread ..../g' \
+ -e '/\[Switching to Thread ....\]/d' \
+diff --git a/gdbserver_tests/filter_vgdb b/gdbserver_tests/filter_vgdb
+index 2442ec5..f8028a3 100755
+--- a/gdbserver_tests/filter_vgdb
++++ b/gdbserver_tests/filter_vgdb
+@@ -11,7 +11,7 @@ $dir/../tests/filter_addresses |
+ # pid
+ # gdb 7.2 sometimes tries to access address 0x0 (same as with standard gdbserver)
+ # filter a debian 6.0/ppc32 line
+-sed -e 's/\(relaying data between gdb and process \)[0-9][0-9]*/\1..../' \
++sed -e '/relaying data between gdb and process/d' \
+ -e 's/\(sending command .* to pid \)[0-9][0-9]*/\1..../' \
+ -e '/Cannot access memory at address 0x......../d' \
+ -e '/^[1-9][0-9]* \.\.\/sysdeps\/powerpc\/powerpc32\/dl-start\.S: No such file or directory\./d' |
+diff --git a/gdbserver_tests/hginfo.stderrB.exp b/gdbserver_tests/hginfo.stderrB.exp
+index df47f11..669ff92 100644
+--- a/gdbserver_tests/hginfo.stderrB.exp
++++ b/gdbserver_tests/hginfo.stderrB.exp
+@@ -1,4 +1,3 @@
+-relaying data between gdb and process ....
+ vgdb-error value changed from 0 to 999999
+ Lock ga 0x........ {
+ Address 0x........ is 0 bytes inside data symbol "mx"
+diff --git a/gdbserver_tests/mcblocklistsearch.stderrB.exp b/gdbserver_tests/mcblocklistsearch.stderrB.exp
+index 312d776..1313321 100644
+--- a/gdbserver_tests/mcblocklistsearch.stderrB.exp
++++ b/gdbserver_tests/mcblocklistsearch.stderrB.exp
+@@ -1,4 +1,3 @@
+-relaying data between gdb and process ....
+ vgdb-error value changed from 0 to 999999
+ Breakpoint 1 at 0x........: file leak-tree.c, line 42.
+ Breakpoint 2 at 0x........: file leak-tree.c, line 67.
+diff --git a/gdbserver_tests/mcbreak.stderrB.exp b/gdbserver_tests/mcbreak.stderrB.exp
+index 65281d2..0f051d1 100644
+--- a/gdbserver_tests/mcbreak.stderrB.exp
++++ b/gdbserver_tests/mcbreak.stderrB.exp
+@@ -1,4 +1,3 @@
+-relaying data between gdb and process ....
+ vgdb-error value changed from 0 to 999999
+ vgdb-error value changed from 999999 to 0
+ n_errs_found 1 n_errs_shown 1 (vgdb-error 0)
+diff --git a/gdbserver_tests/mcclean_after_fork.stderrB.exp b/gdbserver_tests/mcclean_after_fork.stderrB.exp
+index 995b42f..e812b8e 100644
+--- a/gdbserver_tests/mcclean_after_fork.stderrB.exp
++++ b/gdbserver_tests/mcclean_after_fork.stderrB.exp
+@@ -1,4 +1,3 @@
+-relaying data between gdb and process ....
+ vgdb-error value changed from 0 to 999999
+ monitor command request to kill this process
+ Remote connection closed
+diff --git a/gdbserver_tests/mcinfcallWSRU.stderrB.exp b/gdbserver_tests/mcinfcallWSRU.stderrB.exp
+index 7789123..a2f2b87 100644
+--- a/gdbserver_tests/mcinfcallWSRU.stderrB.exp
++++ b/gdbserver_tests/mcinfcallWSRU.stderrB.exp
+@@ -1,4 +1,3 @@
+-relaying data between gdb and process ....
+ vgdb-error value changed from 0 to 999999
+ Breakpoint 1 at 0x........: file sleepers.c, line 74.
+ Continuing.
+diff --git a/gdbserver_tests/mcleak.stderrB.exp b/gdbserver_tests/mcleak.stderrB.exp
+index 7782119..7ed3920 100644
+--- a/gdbserver_tests/mcleak.stderrB.exp
++++ b/gdbserver_tests/mcleak.stderrB.exp
+@@ -1,4 +1,3 @@
+-relaying data between gdb and process ....
+ vgdb-error value changed from 0 to 999999
+ 10 bytes in 1 blocks are still reachable in loss record ... of ...
+ at 0x........: malloc (vg_replace_malloc.c:...)
+diff --git a/gdbserver_tests/mcmain_pic.stderrB.exp b/gdbserver_tests/mcmain_pic.stderrB.exp
+index c90e1fa..53ec0ce 100644
+--- a/gdbserver_tests/mcmain_pic.stderrB.exp
++++ b/gdbserver_tests/mcmain_pic.stderrB.exp
+@@ -1,2 +1 @@
+-relaying data between gdb and process ....
+ vgdb-error value changed from 0 to 999999
+diff --git a/gdbserver_tests/mcvabits.stderrB.exp b/gdbserver_tests/mcvabits.stderrB.exp
+index bdabb1e..f9ced7a 100644
+--- a/gdbserver_tests/mcvabits.stderrB.exp
++++ b/gdbserver_tests/mcvabits.stderrB.exp
+@@ -1,4 +1,3 @@
+-relaying data between gdb and process ....
+ vgdb-error value changed from 0 to 999999
+ Address 0x........ len 10 addressable
+ Address 0x........ is 0 bytes inside data symbol "undefined"
+diff --git a/gdbserver_tests/mssnapshot.stderrB.exp b/gdbserver_tests/mssnapshot.stderrB.exp
+index 8bee8fc..e419ce6 100644
+--- a/gdbserver_tests/mssnapshot.stderrB.exp
++++ b/gdbserver_tests/mssnapshot.stderrB.exp
+@@ -1,4 +1,3 @@
+-relaying data between gdb and process ....
+ vgdb-error value changed from 0 to 999999
+ general valgrind monitor commands:
+ help [debug] : monitor command help. With debug: + debugging commands
+diff --git a/gdbserver_tests/nlgone_abrt.stderrB.exp b/gdbserver_tests/nlgone_abrt.stderrB.exp
+index c8b2024..e69de29 100644
+--- a/gdbserver_tests/nlgone_abrt.stderrB.exp
++++ b/gdbserver_tests/nlgone_abrt.stderrB.exp
+@@ -1 +0,0 @@
+-relaying data between gdb and process ....
+diff --git a/gdbserver_tests/nlgone_exit.stderrB.exp b/gdbserver_tests/nlgone_exit.stderrB.exp
+index c8b2024..e69de29 100644
+--- a/gdbserver_tests/nlgone_exit.stderrB.exp
++++ b/gdbserver_tests/nlgone_exit.stderrB.exp
+@@ -1 +0,0 @@
+-relaying data between gdb and process ....
+diff --git a/gdbserver_tests/nlgone_return.stderrB.exp b/gdbserver_tests/nlgone_return.stderrB.exp
+index c8b2024..e69de29 100644
+--- a/gdbserver_tests/nlgone_return.stderrB.exp
++++ b/gdbserver_tests/nlgone_return.stderrB.exp
+@@ -1 +0,0 @@
+-relaying data between gdb and process ....
+diff --git a/gdbserver_tests/nlpasssigalrm.stderrB.exp b/gdbserver_tests/nlpasssigalrm.stderrB.exp
+index c90e1fa..53ec0ce 100644
+--- a/gdbserver_tests/nlpasssigalrm.stderrB.exp
++++ b/gdbserver_tests/nlpasssigalrm.stderrB.exp
+@@ -1,2 +1 @@
+-relaying data between gdb and process ....
+ vgdb-error value changed from 0 to 999999
+diff --git a/gdbserver_tests/nlself_invalidate.stderrB.exp b/gdbserver_tests/nlself_invalidate.stderrB.exp
+index c8b2024..e69de29 100644
+--- a/gdbserver_tests/nlself_invalidate.stderrB.exp
++++ b/gdbserver_tests/nlself_invalidate.stderrB.exp
+@@ -1 +0,0 @@
+-relaying data between gdb and process ....
+diff --git a/gdbserver_tests/nlsigvgdb.stderrB.exp b/gdbserver_tests/nlsigvgdb.stderrB.exp
+index 672fea5..ed5bb61 100644
+--- a/gdbserver_tests/nlsigvgdb.stderrB.exp
++++ b/gdbserver_tests/nlsigvgdb.stderrB.exp
+@@ -1,4 +1,3 @@
+-relaying data between gdb and process ....
+ vgdb-error value changed from 0 to 999999
+ gdbserver: continuing in 5000 ms ...
+ gdbserver: continuing after wait ...
Added: valgrind-3.13.0-test-fixes.patch
===================================================================
--- valgrind-3.13.0-test-fixes.patch (rev 0)
+++ valgrind-3.13.0-test-fixes.patch 2017-12-21 19:35:27 UTC (rev 313500)
@@ -0,0 +1,29 @@
+See:
+https://bugs.gentoo.org/637488
+https://bugs.kde.org/show_bug.cgi?id=387686
+
+commit 2b5eab6a8db1b0487a3ad7fc4e7eeda6d3513626
+Author: Mark Wielaard <mark at klomp.org>
+Date: Thu Jun 29 15:26:30 2017 +0000
+
+ memcheck/tests: Use ucontext_t instead of struct ucontext
+
+ glibc 2.26 does not expose struct ucontext anymore.
+
+ Signed-off-by: Khem Raj <raj.khem at gmail.com>
+
+ git-svn-id: svn://svn.valgrind.org/valgrind/trunk@16457
+
+diff --git a/memcheck/tests/linux/stack_changes.c b/memcheck/tests/linux/stack_changes.c
+index a978fc2b0..7f97b90a5 100644
+--- a/memcheck/tests/linux/stack_changes.c
++++ b/memcheck/tests/linux/stack_changes.c
+@@ -10,7 +10,7 @@
+ // This test is checking the libc context calls (setcontext, etc.) and
+ // checks that Valgrind notices their stack changes properly.
+
+-typedef struct ucontext mycontext;
++typedef ucontext_t mycontext;
+
+ mycontext ctx1, ctx2, oldc;
+ int count;
Added: valgrind-3.7.0-respect-flags.patch
===================================================================
--- valgrind-3.7.0-respect-flags.patch (rev 0)
+++ valgrind-3.7.0-respect-flags.patch 2017-12-21 19:35:27 UTC (rev 313500)
@@ -0,0 +1,13 @@
+diff -Naur valgrind-3.7.0.orig//mpi/Makefile.am valgrind-3.7.0/mpi/Makefile.am
+--- valgrind-3.7.0.orig/mpi/Makefile.am 2011-10-26 17:24:23.000000000 -0400
++++ valgrind-3.7.0/mpi/Makefile.am 2011-11-10 16:03:14.000000000 -0500
+@@ -7,9 +7,6 @@
+ CC = $(MPI_CC)
+ DEFS =
+ DEFAULT_INCLUDES =
+-CPPFLAGS =
+-CFLAGS =
+-LDFLAGS =
+
+ EXTRA_DIST = \
+ mpiwrap_type_test.c
Added: valgrind-fix-xml-socket.patch
===================================================================
--- valgrind-fix-xml-socket.patch (rev 0)
+++ valgrind-fix-xml-socket.patch 2017-12-21 19:35:27 UTC (rev 313500)
@@ -0,0 +1,11 @@
+--- a/coregrind/m_libcprint.c
++++ b/coregrind/m_libcprint.c
+@@ -526,7 +526,7 @@
+ break;
+
+ case VgLogTo_Socket:
+- log_fd = prepare_sink_socket(VG_(clo_xml_fname_unexpanded),
++ xml_fd = prepare_sink_socket(VG_(clo_xml_fname_unexpanded),
+ &VG_(xml_output_sink), True);
+ break;
+ }
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