[arch-commits] Commit in embree/trunk (PKGBUILD fix-avx512-gcc7.patch)

[Bruno Pagani]

    Date: Friday, March 9, 2018 @ 13:55:37
  Author: archange
Revision: 305274

Add patch and compile for AVX512SKX

Added:
  embree/trunk/fix-avx512-gcc7.patch
Modified:
  embree/trunk/PKGBUILD

-----------------------+
 PKGBUILD              |   37 ++++++++++++++++++++----------------
 fix-avx512-gcc7.patch |   49 ++++++++++++++++++++++++++++++++++++++++++++++++
 2 files changed, 70 insertions(+), 16 deletions(-)

Modified: PKGBUILD
===================================================================
--- PKGBUILD	2018-03-09 13:43:18 UTC (rev 305273)
+++ PKGBUILD	2018-03-09 13:55:37 UTC (rev 305274)
@@ -4,7 +4,7 @@
 
 pkgname=embree
 pkgver=2.17.3
-pkgrel=1
+pkgrel=2
 pkgdesc="A collection of high-performance ray tracing kernels"
 arch=('x86_64')
 url="https://embree.github.io/"
@@ -13,25 +13,30 @@
 makedepends=('cmake' 'ispc' 'freeglut' 'libxmu' 'openexr')
 provides=('embree-isa')
 replaces=('embree-isa')
-source=("${pkgname}-${pkgver}.tar.gz::https://github.com/embree/embree/archive/v${pkgver}.tar.gz")
-sha256sums=('c7d7172ce6e64a7a405fba97ed9e3e92a9cdd53aba5cfc0d46d4b792e22bc0fe')
+source=("${pkgname}-${pkgver}.tar.gz::https://github.com/embree/embree/archive/v${pkgver}.tar.gz"
+        'fix-avx512-gcc7.patch')
+sha256sums=('c7d7172ce6e64a7a405fba97ed9e3e92a9cdd53aba5cfc0d46d4b792e22bc0fe'
+            '0982f55ccf3e5001a16c717b195689b291daf6769bce5b059e2499e098012117')
 
+prepare() {
+    cd ${pkgname}-${pkgver}
+    patch -p1 -i ../fix-avx512-gcc7.patch
+}
+
 build() {
-  cd ${pkgname}-${pkgver}
-
-  cmake . \
-    -DCMAKE_INSTALL_PREFIX=/usr \
-    -DCMAKE_INSTALL_LIBDIR=lib \
-    -DCMAKE_BUILD_TYPE=Release \
-    -DEMBREE_TUTORIALS=OFF \
-    -DEMBREE_MAX_ISA="AVX2"
-  # Embree detects actual ISA at runtime
-  # AVX512KNL/SKX: https://github.com/embree/embree/issues/169
-  make
+    cd ${pkgname}-${pkgver}
+    cmake . \
+      -DCMAKE_INSTALL_PREFIX=/usr \
+      -DCMAKE_INSTALL_LIBDIR=lib \
+      -DCMAKE_BUILD_TYPE=Release \
+      -DEMBREE_TUTORIALS=OFF \
+      -DEMBREE_MAX_ISA="AVX512SKX"
+    # Embree detects actual ISA at runtime
+    make
 }
 
 package() {
-  cd ${pkgname}-${pkgver}
-  make DESTDIR="${pkgdir}" install
+    cd ${pkgname}-${pkgver}
+    make DESTDIR="${pkgdir}" install
 }
 

Added: fix-avx512-gcc7.patch
===================================================================
--- fix-avx512-gcc7.patch	                        (rev 0)
+++ fix-avx512-gcc7.patch	2018-03-09 13:55:37 UTC (rev 305274)
@@ -0,0 +1,49 @@
+From 40b9aca2668f443cae6bfbfa7cc5a354f1087011 Mon Sep 17 00:00:00 2001
+From: Sven Woop <sven.woop at intel.com>
+Date: Wed, 7 Mar 2018 11:02:01 +0000
+Subject: [PATCH] AVX512 compile fix for GCC 7
+
+---
+ common/simd/vfloat16_avx512.h | 12 ++++++------
+ 1 file changed, 6 insertions(+), 6 deletions(-)
+
+diff --git a/common/simd/vfloat16_avx512.h b/common/simd/vfloat16_avx512.h
+index 9b7dccf714..306de62dfc 100644
+--- a/common/simd/vfloat16_avx512.h
++++ b/common/simd/vfloat16_avx512.h
+@@ -458,29 +458,29 @@ namespace embree
+   }
+ 
+   __forceinline vfloat16 interleave_even(const vfloat16& a, const vfloat16& b) {
+-    return _mm512_castsi512_ps(_mm512_mask_shuffle_epi32(_mm512_castps_si512(a), mm512_int2mask(0xaaaa), _mm512_castps_si512(b), 0xb1));
++    return _mm512_castsi512_ps(_mm512_mask_shuffle_epi32(_mm512_castps_si512(a), mm512_int2mask(0xaaaa), _mm512_castps_si512(b), (_MM_PERM_ENUM)0xb1));
+   }
+ 
+   __forceinline vfloat16 interleave_odd(const vfloat16& a, const vfloat16& b) {
+-    return _mm512_castsi512_ps(_mm512_mask_shuffle_epi32(_mm512_castps_si512(b), mm512_int2mask(0x5555), _mm512_castps_si512(a), 0xb1));
++    return _mm512_castsi512_ps(_mm512_mask_shuffle_epi32(_mm512_castps_si512(b), mm512_int2mask(0x5555), _mm512_castps_si512(a), (_MM_PERM_ENUM)0xb1));
+   }
+ 
+   __forceinline vfloat16 interleave2_even(const vfloat16& a, const vfloat16& b) {
+     /* mask should be 8-bit but is 16-bit to reuse for interleave_even */
+-    return _mm512_castsi512_ps(_mm512_mask_permutex_epi64(_mm512_castps_si512(a), mm512_int2mask(0xaaaa), _mm512_castps_si512(b), 0xb1));
++    return _mm512_castsi512_ps(_mm512_mask_permutex_epi64(_mm512_castps_si512(a), mm512_int2mask(0xaaaa), _mm512_castps_si512(b), (_MM_PERM_ENUM)0xb1));
+   }
+ 
+   __forceinline vfloat16 interleave2_odd(const vfloat16& a, const vfloat16& b) {
+     /* mask should be 8-bit but is 16-bit to reuse for interleave_odd */
+-    return _mm512_castsi512_ps(_mm512_mask_permutex_epi64(_mm512_castps_si512(b), mm512_int2mask(0x5555), _mm512_castps_si512(a), 0xb1));
++    return _mm512_castsi512_ps(_mm512_mask_permutex_epi64(_mm512_castps_si512(b), mm512_int2mask(0x5555), _mm512_castps_si512(a), (_MM_PERM_ENUM)0xb1));
+   }
+ 
+   __forceinline vfloat16 interleave4_even(const vfloat16& a, const vfloat16& b) {
+-    return _mm512_castsi512_ps(_mm512_mask_permutex_epi64(_mm512_castps_si512(a), mm512_int2mask(0xcc), _mm512_castps_si512(b), 0x4e));
++    return _mm512_castsi512_ps(_mm512_mask_permutex_epi64(_mm512_castps_si512(a), mm512_int2mask(0xcc), _mm512_castps_si512(b), (_MM_PERM_ENUM)0x4e));
+   }
+ 
+   __forceinline vfloat16 interleave4_odd(const vfloat16& a, const vfloat16& b) {
+-    return _mm512_castsi512_ps(_mm512_mask_permutex_epi64(_mm512_castps_si512(b), mm512_int2mask(0x33), _mm512_castps_si512(a), 0x4e));
++    return _mm512_castsi512_ps(_mm512_mask_permutex_epi64(_mm512_castps_si512(b), mm512_int2mask(0x33), _mm512_castps_si512(a), (_MM_PERM_ENUM)0x4e));
+   }
+ 
+   __forceinline vfloat16 permute(vfloat16 v, __m512i index) {