[arch-commits] Commit in zig/trunk (llvm13.patch)
Daurnimator
daurnimator at gemini.archlinux.org
Tue Dec 21 11:51:49 UTC 2021
Date: Tuesday, December 21, 2021 @ 11:51:49
Author: daurnimator
Revision: 1081461
remove unused llvm13 patch
Deleted:
zig/trunk/llvm13.patch
--------------+
llvm13.patch | 4597 ---------------------------------------------------------
1 file changed, 4597 deletions(-)
Deleted: llvm13.patch
===================================================================
--- llvm13.patch 2021-12-21 11:51:04 UTC (rev 1081460)
+++ llvm13.patch 2021-12-21 11:51:49 UTC (rev 1081461)
@@ -1,4597 +0,0 @@
-From df706e2789711485fbadb0098723a9eed23d3ce1 Mon Sep 17 00:00:00 2001
-From: Andrew Kelley <andrew at ziglang.org>
-Date: Sun, 15 Aug 2021 17:48:37 -0700
-Subject: [PATCH 1/4] cmake: update to LLVM 13 rc1
-
-More precisely, aac4fe380d16a957627af2d6e5110ee35ad7e7e7 which is the
-current tip of release/13.x.
-
-Immediately following commits are tracking the same LLVM version.
-
-(cherry picked from commit 78ff2a148a707f041ab5e5cfdbb5f854bc66270e)
----
- cmake/Findclang.cmake | 34 ++++++++++-----------
- cmake/Findlld.cmake | 20 ++++++-------
- cmake/Findllvm.cmake | 70 +++++++++++++++++++++----------------------
- 3 files changed, 62 insertions(+), 62 deletions(-)
-
-diff --git a/cmake/Findclang.cmake b/cmake/Findclang.cmake
-index 3ce52df89..82ea834df 100644
---- a/cmake/Findclang.cmake
-+++ b/cmake/Findclang.cmake
-@@ -9,27 +9,27 @@
-
- find_path(CLANG_INCLUDE_DIRS NAMES clang/Frontend/ASTUnit.h
- PATHS
-- /usr/lib/llvm/12/include
-- /usr/lib/llvm-12/include
-- /usr/lib/llvm-12.0/include
-- /usr/local/llvm120/include
-- /usr/local/llvm12/include
-+ /usr/lib/llvm/13/include
-+ /usr/lib/llvm-13/include
-+ /usr/lib/llvm-13.0/include
-+ /usr/local/llvm130/include
-+ /usr/local/llvm13/include
- /mingw64/include
- )
-
- if(ZIG_PREFER_CLANG_CPP_DYLIB)
- find_library(CLANG_LIBRARIES
- NAMES
-- clang-cpp-12.0
-- clang-cpp120
-+ clang-cpp-13.0
-+ clang-cpp130
- clang-cpp
- PATHS
- ${CLANG_LIBDIRS}
-- /usr/lib/llvm/12/lib
-- /usr/lib/llvm/12/lib64
-- /usr/lib/llvm-12/lib
-- /usr/local/llvm120/lib
-- /usr/local/llvm12/lib
-+ /usr/lib/llvm/13/lib
-+ /usr/lib/llvm/13/lib64
-+ /usr/lib/llvm-13/lib
-+ /usr/local/llvm130/lib
-+ /usr/local/llvm13/lib
- )
- endif()
-
-@@ -39,11 +39,11 @@ if(NOT CLANG_LIBRARIES)
- find_library(CLANG_${_prettylibname_}_LIB NAMES ${_libname_}
- PATHS
- ${CLANG_LIBDIRS}
-- /usr/lib/llvm/12/lib
-- /usr/lib/llvm-12/lib
-- /usr/lib/llvm-12.0/lib
-- /usr/local/llvm120/lib
-- /usr/local/llvm12/lib
-+ /usr/lib/llvm/13/lib
-+ /usr/lib/llvm-13/lib
-+ /usr/lib/llvm-13.0/lib
-+ /usr/local/llvm130/lib
-+ /usr/local/llvm13/lib
- /mingw64/lib
- /c/msys64/mingw64/lib
- c:\\msys64\\mingw64\\lib
-diff --git a/cmake/Findlld.cmake b/cmake/Findlld.cmake
-index 72724ecd1..1f3680a03 100644
---- a/cmake/Findlld.cmake
-+++ b/cmake/Findlld.cmake
-@@ -8,16 +8,16 @@
-
- find_path(LLD_INCLUDE_DIRS NAMES lld/Common/Driver.h
- PATHS
-- /usr/lib/llvm-12/include
-- /usr/local/llvm120/include
-- /usr/local/llvm12/include
-+ /usr/lib/llvm-13/include
-+ /usr/local/llvm130/include
-+ /usr/local/llvm13/include
- /mingw64/include)
-
--find_library(LLD_LIBRARY NAMES lld-12.0 lld120 lld
-+find_library(LLD_LIBRARY NAMES lld-13.0 lld130 lld
- PATHS
-- /usr/lib/llvm-12/lib
-- /usr/local/llvm120/lib
-- /usr/local/llvm12/lib
-+ /usr/lib/llvm-13/lib
-+ /usr/local/llvm130/lib
-+ /usr/local/llvm13/lib
- )
- if(EXISTS ${LLD_LIBRARY})
- set(LLD_LIBRARIES ${LLD_LIBRARY})
-@@ -27,9 +27,9 @@ else()
- find_library(LLD_${_prettylibname_}_LIB NAMES ${_libname_}
- PATHS
- ${LLD_LIBDIRS}
-- /usr/lib/llvm-12/lib
-- /usr/local/llvm120/lib
-- /usr/local/llvm12/lib
-+ /usr/lib/llvm-13/lib
-+ /usr/local/llvm130/lib
-+ /usr/local/llvm13/lib
- /mingw64/lib
- /c/msys64/mingw64/lib
- c:/msys64/mingw64/lib)
-diff --git a/cmake/Findllvm.cmake b/cmake/Findllvm.cmake
-index bfde645ca..412b528cf 100644
---- a/cmake/Findllvm.cmake
-+++ b/cmake/Findllvm.cmake
-@@ -9,37 +9,37 @@
-
- find_path(LLVM_INCLUDE_DIRS NAMES llvm/IR/IRBuilder.h
- PATHS
-- /usr/lib/llvm/12/include
-- /usr/lib/llvm-12/include
-- /usr/lib/llvm-12.0/include
-- /usr/local/llvm12/include
-- /usr/local/llvm120/include
-+ /usr/lib/llvm/13/include
-+ /usr/lib/llvm-13/include
-+ /usr/lib/llvm-13.0/include
-+ /usr/local/llvm13/include
-+ /usr/local/llvm130/include
- /mingw64/include
- )
-
- if(ZIG_PREFER_CLANG_CPP_DYLIB)
- find_library(LLVM_LIBRARIES
- NAMES
-- LLVM-12.0
-- LLVM-12
-- LLVM-120
-+ LLVM-13.0
-+ LLVM-13
-+ LLVM-130
- LLVM
- PATHS
- ${LLVM_LIBDIRS}
-- /usr/lib/llvm/12/lib
-- /usr/lib/llvm/12/lib64
-- /usr/lib/llvm-12/lib
-- /usr/local/llvm12/lib
-- /usr/local/llvm120/lib
-+ /usr/lib/llvm/13/lib
-+ /usr/lib/llvm/13/lib64
-+ /usr/lib/llvm-13/lib
-+ /usr/local/llvm13/lib
-+ /usr/local/llvm130/lib
- )
-
- find_program(LLVM_CONFIG_EXE
-- NAMES llvm-config-12 llvm-config-12.0 llvm-config120 llvm-config12 llvm-config
-+ NAMES llvm-config-13 llvm-config-13.0 llvm-config130 llvm-config13 llvm-config
- PATHS
- "/mingw64/bin"
- "/c/msys64/mingw64/bin"
- "c:/msys64/mingw64/bin"
-- "C:/Libraries/llvm-12.0.0/bin")
-+ "C:/Libraries/llvm-13.0.0/bin")
-
- if ("${LLVM_CONFIG_EXE}" STREQUAL "LLVM_CONFIG_EXE-NOTFOUND")
- message(FATAL_ERROR "unable to find llvm-config")
-@@ -54,23 +54,23 @@ if(ZIG_PREFER_CLANG_CPP_DYLIB)
- OUTPUT_VARIABLE LLVM_CONFIG_VERSION
- OUTPUT_STRIP_TRAILING_WHITESPACE)
-
-- if("${LLVM_CONFIG_VERSION}" VERSION_LESS 12)
-- message(FATAL_ERROR "expected LLVM 12.x but found ${LLVM_CONFIG_VERSION} using ${LLVM_CONFIG_EXE}")
-+ if("${LLVM_CONFIG_VERSION}" VERSION_LESS 13)
-+ message(FATAL_ERROR "expected LLVM 13.x but found ${LLVM_CONFIG_VERSION} using ${LLVM_CONFIG_EXE}")
- endif()
-- if("${LLVM_CONFIG_VERSION}" VERSION_EQUAL 13)
-- message(FATAL_ERROR "expected LLVM 12.x but found ${LLVM_CONFIG_VERSION} using ${LLVM_CONFIG_EXE}")
-+ if("${LLVM_CONFIG_VERSION}" VERSION_EQUAL 14)
-+ message(FATAL_ERROR "expected LLVM 13.x but found ${LLVM_CONFIG_VERSION} using ${LLVM_CONFIG_EXE}")
- endif()
-- if("${LLVM_CONFIG_VERSION}" VERSION_GREATER 13)
-- message(FATAL_ERROR "expected LLVM 12.x but found ${LLVM_CONFIG_VERSION} using ${LLVM_CONFIG_EXE}")
-+ if("${LLVM_CONFIG_VERSION}" VERSION_GREATER 14)
-+ message(FATAL_ERROR "expected LLVM 13.x but found ${LLVM_CONFIG_VERSION} using ${LLVM_CONFIG_EXE}")
- endif()
- elseif(ZIG_USE_LLVM_CONFIG)
- find_program(LLVM_CONFIG_EXE
-- NAMES llvm-config-12 llvm-config-12.0 llvm-config120 llvm-config12 llvm-config
-+ NAMES llvm-config-13 llvm-config-13.0 llvm-config130 llvm-config13 llvm-config
- PATHS
- "/mingw64/bin"
- "/c/msys64/mingw64/bin"
- "c:/msys64/mingw64/bin"
-- "C:/Libraries/llvm-12.0.0/bin")
-+ "C:/Libraries/llvm-13.0.0/bin")
-
- if ("${LLVM_CONFIG_EXE}" STREQUAL "LLVM_CONFIG_EXE-NOTFOUND")
- message(FATAL_ERROR "unable to find llvm-config")
-@@ -85,14 +85,14 @@ elseif(ZIG_USE_LLVM_CONFIG)
- OUTPUT_VARIABLE LLVM_CONFIG_VERSION
- OUTPUT_STRIP_TRAILING_WHITESPACE)
-
-- if("${LLVM_CONFIG_VERSION}" VERSION_LESS 12)
-- message(FATAL_ERROR "expected LLVM 12.x but found ${LLVM_CONFIG_VERSION} using ${LLVM_CONFIG_EXE}")
-+ if("${LLVM_CONFIG_VERSION}" VERSION_LESS 13)
-+ message(FATAL_ERROR "expected LLVM 13.x but found ${LLVM_CONFIG_VERSION} using ${LLVM_CONFIG_EXE}")
- endif()
-- if("${LLVM_CONFIG_VERSION}" VERSION_EQUAL 13)
-- message(FATAL_ERROR "expected LLVM 12.x but found ${LLVM_CONFIG_VERSION} using ${LLVM_CONFIG_EXE}")
-+ if("${LLVM_CONFIG_VERSION}" VERSION_EQUAL 14)
-+ message(FATAL_ERROR "expected LLVM 13.x but found ${LLVM_CONFIG_VERSION} using ${LLVM_CONFIG_EXE}")
- endif()
-- if("${LLVM_CONFIG_VERSION}" VERSION_GREATER 13)
-- message(FATAL_ERROR "expected LLVM 12.x but found ${LLVM_CONFIG_VERSION} using ${LLVM_CONFIG_EXE}")
-+ if("${LLVM_CONFIG_VERSION}" VERSION_GREATER 14)
-+ message(FATAL_ERROR "expected LLVM 13.x but found ${LLVM_CONFIG_VERSION} using ${LLVM_CONFIG_EXE}")
- endif()
-
- execute_process(
-@@ -166,7 +166,7 @@ elseif(ZIG_USE_LLVM_CONFIG)
- set(LLVM_LIBRARIES ${LLVM_LIBRARIES} ${LLVM_SYSTEM_LIBS})
-
- if(NOT LLVM_LIBRARIES)
-- find_library(LLVM_LIBRARIES NAMES LLVM LLVM-12 LLVM-12.0)
-+ find_library(LLVM_LIBRARIES NAMES LLVM LLVM-13 LLVM-13.0)
- endif()
-
- link_directories("${CMAKE_PREFIX_PATH}/lib")
-@@ -180,11 +180,11 @@ else()
- find_library(LLVM_${_prettylibname_}_LIB NAMES ${_libname_}
- PATHS
- ${LLVM_LIBDIRS}
-- /usr/lib/llvm/12/lib
-- /usr/lib/llvm-12/lib
-- /usr/lib/llvm-12.0/lib
-- /usr/local/llvm120/lib
-- /usr/local/llvm12/lib
-+ /usr/lib/llvm/13/lib
-+ /usr/lib/llvm-13/lib
-+ /usr/lib/llvm-13.0/lib
-+ /usr/local/llvm130/lib
-+ /usr/local/llvm13/lib
- /mingw64/lib
- /c/msys64/mingw64/lib
- c:\\msys64\\mingw64\\lib)
-
-From 93cce825f5230c099044aaa3b19e2eb0c0282c3c Mon Sep 17 00:00:00 2001
-From: Andrew Kelley <andrew at ziglang.org>
-Date: Sun, 15 Aug 2021 18:06:29 -0700
-Subject: [PATCH 2/4] update clang tools to 13 rc1
-
-(cherry picked from commit d6467dcf71c40d4f09993f8c449b33adeca55ce5)
----
- src/zig_clang_cc1_main.cpp | 15 +-
- src/zig_clang_cc1as_main.cpp | 61 ++++----
- src/zig_clang_driver.cpp | 106 +++++++-------
- src/zig_llvm-ar.cpp | 275 +----------------------------------
- 4 files changed, 105 insertions(+), 352 deletions(-)
-
-diff --git a/src/zig_clang_cc1_main.cpp b/src/zig_clang_cc1_main.cpp
-index 091886001..396d6ff52 100644
---- a/src/zig_clang_cc1_main.cpp
-+++ b/src/zig_clang_cc1_main.cpp
-@@ -203,6 +203,12 @@ int cc1_main(ArrayRef<const char *> Argv, const char *Argv0, void *MainAddr) {
- IntrusiveRefCntPtr<DiagnosticOptions> DiagOpts = new DiagnosticOptions();
- TextDiagnosticBuffer *DiagsBuffer = new TextDiagnosticBuffer;
- DiagnosticsEngine Diags(DiagID, &*DiagOpts, DiagsBuffer);
-+
-+ // Setup round-trip remarks for the DiagnosticsEngine used in CreateFromArgs.
-+ if (find(Argv, StringRef("-Rround-trip-cc1-args")) != Argv.end())
-+ Diags.setSeverity(diag::remark_cc1_round_trip_generated,
-+ diag::Severity::Remark, {});
-+
- bool Success = CompilerInvocation::CreateFromArgs(Clang->getInvocation(),
- Argv, Diags, Argv0);
-
-@@ -248,12 +254,9 @@ int cc1_main(ArrayRef<const char *> Argv, const char *Argv0, void *MainAddr) {
- if (llvm::timeTraceProfilerEnabled()) {
- SmallString<128> Path(Clang->getFrontendOpts().OutputFile);
- llvm::sys::path::replace_extension(Path, "json");
-- if (auto profilerOutput =
-- Clang->createOutputFile(Path.str(),
-- /*Binary=*/false,
-- /*RemoveFileOnSignal=*/false,
-- /*useTemporary=*/false)) {
--
-+ if (auto profilerOutput = Clang->createOutputFile(
-+ Path.str(), /*Binary=*/false, /*RemoveFileOnSignal=*/false,
-+ /*useTemporary=*/false)) {
- llvm::timeTraceProfilerWrite(*profilerOutput);
- // FIXME(ibiryukov): make profilerOutput flush in destructor instead.
- profilerOutput->flush();
-diff --git a/src/zig_clang_cc1as_main.cpp b/src/zig_clang_cc1as_main.cpp
-index de71026fb..086ce0ea7 100644
---- a/src/zig_clang_cc1as_main.cpp
-+++ b/src/zig_clang_cc1as_main.cpp
-@@ -91,6 +91,7 @@ struct AssemblerInvocation {
- unsigned SaveTemporaryLabels : 1;
- unsigned GenDwarfForAssembly : 1;
- unsigned RelaxELFRelocations : 1;
-+ unsigned Dwarf64 : 1;
- unsigned DwarfVersion;
- std::string DwarfDebugFlags;
- std::string DwarfDebugProducer;
-@@ -160,6 +161,7 @@ public:
- FatalWarnings = 0;
- NoWarn = 0;
- IncrementalLinkerCompatible = 0;
-+ Dwarf64 = 0;
- DwarfVersion = 0;
- EmbedBitcode = 0;
- }
-@@ -231,13 +233,16 @@ bool AssemblerInvocation::CreateFromArgs(AssemblerInvocation &Opts,
- }
-
- Opts.RelaxELFRelocations = Args.hasArg(OPT_mrelax_relocations);
-+ if (auto *DwarfFormatArg = Args.getLastArg(OPT_gdwarf64, OPT_gdwarf32))
-+ Opts.Dwarf64 = DwarfFormatArg->getOption().matches(OPT_gdwarf64);
- Opts.DwarfVersion = getLastArgIntValue(Args, OPT_dwarf_version_EQ, 2, Diags);
- Opts.DwarfDebugFlags =
- std::string(Args.getLastArgValue(OPT_dwarf_debug_flags));
- Opts.DwarfDebugProducer =
- std::string(Args.getLastArgValue(OPT_dwarf_debug_producer));
-- Opts.DebugCompilationDir =
-- std::string(Args.getLastArgValue(OPT_fdebug_compilation_dir));
-+ if (const Arg *A = Args.getLastArg(options::OPT_ffile_compilation_dir_EQ,
-+ options::OPT_fdebug_compilation_dir_EQ))
-+ Opts.DebugCompilationDir = A->getValue();
- Opts.MainFileName = std::string(Args.getLastArgValue(OPT_main_file_name));
-
- for (const auto &Arg : Args.getAllArgValues(OPT_fdebug_prefix_map_EQ)) {
-@@ -319,7 +324,7 @@ getOutputStream(StringRef Path, DiagnosticsEngine &Diags, bool Binary) {
-
- std::error_code EC;
- auto Out = std::make_unique<raw_fd_ostream>(
-- Path, EC, (Binary ? sys::fs::OF_None : sys::fs::OF_Text));
-+ Path, EC, (Binary ? sys::fs::OF_None : sys::fs::OF_TextWithCRLF));
- if (EC) {
- Diags.Report(diag::err_fe_unable_to_open_output) << Path << EC.message();
- return nullptr;
-@@ -328,8 +333,8 @@ getOutputStream(StringRef Path, DiagnosticsEngine &Diags, bool Binary) {
- return Out;
- }
-
--static bool ExecuteAssembler(AssemblerInvocation &Opts,
-- DiagnosticsEngine &Diags) {
-+static bool ExecuteAssemblerImpl(AssemblerInvocation &Opts,
-+ DiagnosticsEngine &Diags) {
- // Get the target specific parser.
- std::string Error;
- const Target *TheTarget = TargetRegistry::lookupTarget(Opts.Triple, Error);
-@@ -337,7 +342,7 @@ static bool ExecuteAssembler(AssemblerInvocation &Opts,
- return Diags.Report(diag::err_target_unknown_triple) << Opts.Triple;
-
- ErrorOr<std::unique_ptr<MemoryBuffer>> Buffer =
-- MemoryBuffer::getFileOrSTDIN(Opts.InputFile);
-+ MemoryBuffer::getFileOrSTDIN(Opts.InputFile, /*IsText=*/true);
-
- if (std::error_code EC = Buffer.getError()) {
- Error = EC.message();
-@@ -378,11 +383,15 @@ static bool ExecuteAssembler(AssemblerInvocation &Opts,
- if (!Opts.SplitDwarfOutput.empty())
- DwoOS = getOutputStream(Opts.SplitDwarfOutput, Diags, IsBinary);
-
-- // FIXME: This is not pretty. MCContext has a ptr to MCObjectFileInfo and
-- // MCObjectFileInfo needs a MCContext reference in order to initialize itself.
-- std::unique_ptr<MCObjectFileInfo> MOFI(new MCObjectFileInfo());
-+ // Build up the feature string from the target feature list.
-+ std::string FS = llvm::join(Opts.Features, ",");
-
-- MCContext Ctx(MAI.get(), MRI.get(), MOFI.get(), &SrcMgr, &MCOptions);
-+ std::unique_ptr<MCSubtargetInfo> STI(
-+ TheTarget->createMCSubtargetInfo(Opts.Triple, Opts.CPU, FS));
-+ assert(STI && "Unable to create subtarget info!");
-+
-+ MCContext Ctx(Triple(Opts.Triple), MAI.get(), MRI.get(), STI.get(), &SrcMgr,
-+ &MCOptions);
-
- bool PIC = false;
- if (Opts.RelocationModel == "static") {
-@@ -395,7 +404,12 @@ static bool ExecuteAssembler(AssemblerInvocation &Opts,
- PIC = false;
- }
-
-- MOFI->InitMCObjectFileInfo(Triple(Opts.Triple), PIC, Ctx);
-+ // FIXME: This is not pretty. MCContext has a ptr to MCObjectFileInfo and
-+ // MCObjectFileInfo needs a MCContext reference in order to initialize itself.
-+ std::unique_ptr<MCObjectFileInfo> MOFI(
-+ TheTarget->createMCObjectFileInfo(Ctx, PIC));
-+ Ctx.setObjectFileInfo(MOFI.get());
-+
- if (Opts.SaveTemporaryLabels)
- Ctx.setAllowTemporaryLabels(false);
- if (Opts.GenDwarfForAssembly)
-@@ -417,23 +431,17 @@ static bool ExecuteAssembler(AssemblerInvocation &Opts,
- Ctx.addDebugPrefixMapEntry(KV.first, KV.second);
- if (!Opts.MainFileName.empty())
- Ctx.setMainFileName(StringRef(Opts.MainFileName));
-+ Ctx.setDwarfFormat(Opts.Dwarf64 ? dwarf::DWARF64 : dwarf::DWARF32);
- Ctx.setDwarfVersion(Opts.DwarfVersion);
- if (Opts.GenDwarfForAssembly)
- Ctx.setGenDwarfRootFile(Opts.InputFile,
- SrcMgr.getMemoryBuffer(BufferIndex)->getBuffer());
-
-- // Build up the feature string from the target feature list.
-- std::string FS = llvm::join(Opts.Features, ",");
--
- std::unique_ptr<MCStreamer> Str;
-
- std::unique_ptr<MCInstrInfo> MCII(TheTarget->createMCInstrInfo());
- assert(MCII && "Unable to create instruction info!");
-
-- std::unique_ptr<MCSubtargetInfo> STI(
-- TheTarget->createMCSubtargetInfo(Opts.Triple, Opts.CPU, FS));
-- assert(STI && "Unable to create subtarget info!");
--
- raw_pwrite_stream *Out = FDOS.get();
- std::unique_ptr<buffer_ostream> BOS;
-
-@@ -487,8 +495,7 @@ static bool ExecuteAssembler(AssemblerInvocation &Opts,
-
- // When -fembed-bitcode is passed to clang_as, a 1-byte marker
- // is emitted in __LLVM,__asm section if the object file is MachO format.
-- if (Opts.EmbedBitcode && Ctx.getObjectFileInfo()->getObjectFileType() ==
-- MCObjectFileInfo::IsMachO) {
-+ if (Opts.EmbedBitcode && Ctx.getObjectFileType() == MCContext::IsMachO) {
- MCSection *AsmLabel = Ctx.getMachOSection(
- "__LLVM", "__asm", MachO::S_REGULAR, 4, SectionKind::getReadOnly());
- Str.get()->SwitchSection(AsmLabel);
-@@ -525,12 +532,12 @@ static bool ExecuteAssembler(AssemblerInvocation &Opts,
- Failed = Parser->Run(Opts.NoInitialTextSection);
- }
-
-- // Parser has a reference to the output stream (Str), so close Parser first.
-- Parser.reset();
-- Str.reset();
-- // Close the output stream early.
-- BOS.reset();
-- FDOS.reset();
-+ return Failed;
-+}
-+
-+static bool ExecuteAssembler(AssemblerInvocation &Opts,
-+ DiagnosticsEngine &Diags) {
-+ bool Failed = ExecuteAssemblerImpl(Opts, Diags);
-
- // Delete output file if there were errors.
- if (Failed) {
-@@ -578,7 +585,7 @@ int cc1as_main(ArrayRef<const char *> Argv, const char *Argv0, void *MainAddr) {
- return 1;
-
- if (Asm.ShowHelp) {
-- getDriverOptTable().PrintHelp(
-+ getDriverOptTable().printHelp(
- llvm::outs(), "clang -cc1as [options] file...",
- "Clang Integrated Assembler",
- /*Include=*/driver::options::CC1AsOption, /*Exclude=*/0,
-diff --git a/src/zig_clang_driver.cpp b/src/zig_clang_driver.cpp
-index e358fea83..3c38250df 100644
---- a/src/zig_clang_driver.cpp
-+++ b/src/zig_clang_driver.cpp
-@@ -242,20 +242,28 @@ static void getCLEnvVarOptions(std::string &EnvValue, llvm::StringSaver &Saver,
- }
-
- static void SetBackdoorDriverOutputsFromEnvVars(Driver &TheDriver) {
-- // Handle CC_PRINT_OPTIONS and CC_PRINT_OPTIONS_FILE.
-- TheDriver.CCPrintOptions = !!::getenv("CC_PRINT_OPTIONS");
-- if (TheDriver.CCPrintOptions)
-- TheDriver.CCPrintOptionsFilename = ::getenv("CC_PRINT_OPTIONS_FILE");
--
-- // Handle CC_PRINT_HEADERS and CC_PRINT_HEADERS_FILE.
-- TheDriver.CCPrintHeaders = !!::getenv("CC_PRINT_HEADERS");
-- if (TheDriver.CCPrintHeaders)
-- TheDriver.CCPrintHeadersFilename = ::getenv("CC_PRINT_HEADERS_FILE");
--
-- // Handle CC_LOG_DIAGNOSTICS and CC_LOG_DIAGNOSTICS_FILE.
-- TheDriver.CCLogDiagnostics = !!::getenv("CC_LOG_DIAGNOSTICS");
-- if (TheDriver.CCLogDiagnostics)
-- TheDriver.CCLogDiagnosticsFilename = ::getenv("CC_LOG_DIAGNOSTICS_FILE");
-+ auto CheckEnvVar = [](const char *EnvOptSet, const char *EnvOptFile,
-+ std::string &OptFile) {
-+ bool OptSet = !!::getenv(EnvOptSet);
-+ if (OptSet) {
-+ if (const char *Var = ::getenv(EnvOptFile))
-+ OptFile = Var;
-+ }
-+ return OptSet;
-+ };
-+
-+ TheDriver.CCPrintOptions =
-+ CheckEnvVar("CC_PRINT_OPTIONS", "CC_PRINT_OPTIONS_FILE",
-+ TheDriver.CCPrintOptionsFilename);
-+ TheDriver.CCPrintHeaders =
-+ CheckEnvVar("CC_PRINT_HEADERS", "CC_PRINT_HEADERS_FILE",
-+ TheDriver.CCPrintHeadersFilename);
-+ TheDriver.CCLogDiagnostics =
-+ CheckEnvVar("CC_LOG_DIAGNOSTICS", "CC_LOG_DIAGNOSTICS_FILE",
-+ TheDriver.CCLogDiagnosticsFilename);
-+ TheDriver.CCPrintProcessStats =
-+ CheckEnvVar("CC_PRINT_PROC_STAT", "CC_PRINT_PROC_STAT_FILE",
-+ TheDriver.CCPrintStatReportFilename);
- }
-
- static void FixupDiagPrefixExeName(TextDiagnosticPrinter *DiagClient,
-@@ -263,7 +271,7 @@ static void FixupDiagPrefixExeName(TextDiagnosticPrinter *DiagClient,
- // If the clang binary happens to be named cl.exe for compatibility reasons,
- // use clang-cl.exe as the prefix to avoid confusion between clang and MSVC.
- StringRef ExeBasename(llvm::sys::path::stem(Path));
-- if (ExeBasename.equals_lower("cl"))
-+ if (ExeBasename.equals_insensitive("cl"))
- ExeBasename = "clang-cl";
- DiagClient->setPrefix(std::string(ExeBasename));
- }
-@@ -335,56 +343,49 @@ static int ExecuteCC1Tool(SmallVectorImpl<const char *> &ArgV) {
- return 1;
- }
-
--extern "C" int ZigClang_main(int argc_, const char **argv_);
--int ZigClang_main(int argc_, const char **argv_) {
-+extern "C" int ZigClang_main(int Argc, const char **Argv);
-+int ZigClang_main(int Argc, const char **Argv) {
- noteBottomOfStack();
--
-- // ZIG MOD: On windows, InitLLVM calls GetCommandLineW(),
-+ // ZIG PATCH: On Windows, InitLLVM calls GetCommandLineW(),
- // and overwrites the args. We don't want it to do that,
- // and we also don't need the signal handlers it installs
- // (we have our own already), so we just use llvm_shutdown_obj
- // instead.
-- // llvm::InitLLVM X(argc_, argv_);
-+ // llvm::InitLLVM X(Argc, Argv);
- llvm::llvm_shutdown_obj X;
-
- llvm::setBugReportMsg("PLEASE submit a bug report to " BUG_REPORT_URL
- " and include the crash backtrace, preprocessed "
- "source, and associated run script.\n");
-- size_t argv_offset = (strcmp(argv_[1], "-cc1") == 0 || strcmp(argv_[1], "-cc1as") == 0) ? 0 : 1;
-- SmallVector<const char *, 256> argv(argv_ + argv_offset, argv_ + argc_);
-+ size_t argv_offset = (strcmp(Argv[1], "-cc1") == 0 || strcmp(Argv[1], "-cc1as") == 0) ? 0 : 1;
-+ SmallVector<const char *, 256> Args(Argv + argv_offset, Argv + Argc);
-
- if (llvm::sys::Process::FixupStandardFileDescriptors())
- return 1;
-
- llvm::InitializeAllTargets();
-- auto TargetAndMode = ToolChain::getTargetAndModeFromProgramName(argv[0]);
-
- llvm::BumpPtrAllocator A;
- llvm::StringSaver Saver(A);
-
- // Parse response files using the GNU syntax, unless we're in CL mode. There
-- // are two ways to put clang in CL compatibility mode: argv[0] is either
-+ // are two ways to put clang in CL compatibility mode: Args[0] is either
- // clang-cl or cl, or --driver-mode=cl is on the command line. The normal
- // command line parsing can't happen until after response file parsing, so we
- // have to manually search for a --driver-mode=cl argument the hard way.
- // Finally, our -cc1 tools don't care which tokenization mode we use because
- // response files written by clang will tokenize the same way in either mode.
-- bool ClangCLMode = false;
-- if (StringRef(TargetAndMode.DriverMode).equals("--driver-mode=cl") ||
-- llvm::find_if(argv, [](const char *F) {
-- return F && strcmp(F, "--driver-mode=cl") == 0;
-- }) != argv.end()) {
-- ClangCLMode = true;
-- }
-+ bool ClangCLMode =
-+ IsClangCL(getDriverMode(Args[0], llvm::makeArrayRef(Args).slice(1)));
- enum { Default, POSIX, Windows } RSPQuoting = Default;
-- for (const char *F : argv) {
-+ for (const char *F : Args) {
- if (strcmp(F, "--rsp-quoting=posix") == 0)
- RSPQuoting = POSIX;
- else if (strcmp(F, "--rsp-quoting=windows") == 0)
- RSPQuoting = Windows;
- }
-
-- // Determines whether we want nullptr markers in argv to indicate response
-+ // Determines whether we want nullptr markers in Args to indicate response
- // files end-of-lines. We only use this for the /LINK driver argument with
- // clang-cl.exe on Windows.
- bool MarkEOLs = ClangCLMode;
-@@ -395,31 +396,31 @@ int ZigClang_main(int argc_, const char **argv_) {
- else
- Tokenizer = &llvm::cl::TokenizeGNUCommandLine;
-
-- if (MarkEOLs && argv.size() > 1 && StringRef(argv[1]).startswith("-cc1"))
-+ if (MarkEOLs && Args.size() > 1 && StringRef(Args[1]).startswith("-cc1"))
- MarkEOLs = false;
-- llvm::cl::ExpandResponseFiles(Saver, Tokenizer, argv, MarkEOLs);
-+ llvm::cl::ExpandResponseFiles(Saver, Tokenizer, Args, MarkEOLs);
-
- // Handle -cc1 integrated tools, even if -cc1 was expanded from a response
- // file.
-- auto FirstArg = std::find_if(argv.begin() + 1, argv.end(),
-+ auto FirstArg = std::find_if(Args.begin() + 1, Args.end(),
- [](const char *A) { return A != nullptr; });
-- if (FirstArg != argv.end() && StringRef(*FirstArg).startswith("-cc1")) {
-+ if (FirstArg != Args.end() && StringRef(*FirstArg).startswith("-cc1")) {
- // If -cc1 came from a response file, remove the EOL sentinels.
- if (MarkEOLs) {
-- auto newEnd = std::remove(argv.begin(), argv.end(), nullptr);
-- argv.resize(newEnd - argv.begin());
-+ auto newEnd = std::remove(Args.begin(), Args.end(), nullptr);
-+ Args.resize(newEnd - Args.begin());
- }
-- return ExecuteCC1Tool(argv);
-+ return ExecuteCC1Tool(Args);
- }
-
- // Handle options that need handling before the real command line parsing in
- // Driver::BuildCompilation()
- bool CanonicalPrefixes = true;
-- for (int i = 1, size = argv.size(); i < size; ++i) {
-+ for (int i = 1, size = Args.size(); i < size; ++i) {
- // Skip end-of-line response file markers
-- if (argv[i] == nullptr)
-+ if (Args[i] == nullptr)
- continue;
-- if (StringRef(argv[i]) == "-no-canonical-prefixes") {
-+ if (StringRef(Args[i]) == "-no-canonical-prefixes") {
- CanonicalPrefixes = false;
- break;
- }
-@@ -435,7 +436,7 @@ int ZigClang_main(int argc_, const char **argv_) {
- getCLEnvVarOptions(OptCL.getValue(), Saver, PrependedOpts);
-
- // Insert right after the program name to prepend to the argument list.
-- argv.insert(argv.begin() + 1, PrependedOpts.begin(), PrependedOpts.end());
-+ Args.insert(Args.begin() + 1, PrependedOpts.begin(), PrependedOpts.end());
- }
- // Arguments in "_CL_" are appended.
- llvm::Optional<std::string> Opt_CL_ = llvm::sys::Process::GetEnv("_CL_");
-@@ -444,7 +445,7 @@ int ZigClang_main(int argc_, const char **argv_) {
- getCLEnvVarOptions(Opt_CL_.getValue(), Saver, AppendedOpts);
-
- // Insert at the end of the argument list to append.
-- argv.append(AppendedOpts.begin(), AppendedOpts.end());
-+ Args.append(AppendedOpts.begin(), AppendedOpts.end());
- }
- }
-
-@@ -453,12 +454,12 @@ int ZigClang_main(int argc_, const char **argv_) {
- // scenes.
- if (const char *OverrideStr = ::getenv("CCC_OVERRIDE_OPTIONS")) {
- // FIXME: Driver shouldn't take extra initial argument.
-- ApplyQAOverride(argv, OverrideStr, SavedStrings);
-+ ApplyQAOverride(Args, OverrideStr, SavedStrings);
- }
-
-- // Pass local param `argv_[0]` as fallback.
-+ // Pass local param `Argv[0]` as fallback.
- // See https://github.com/ziglang/zig/pull/3292 .
-- std::string Path = GetExecutablePath(argv_[0], CanonicalPrefixes);
-+ std::string Path = GetExecutablePath(Argv[0], CanonicalPrefixes);
-
- // Whether the cc1 tool should be called inside the current process, or if we
- // should spawn a new clang subprocess (old behavior).
-@@ -467,7 +468,7 @@ int ZigClang_main(int argc_, const char **argv_) {
- bool UseNewCC1Process;
-
- IntrusiveRefCntPtr<DiagnosticOptions> DiagOpts =
-- CreateAndPopulateDiagOpts(argv, UseNewCC1Process);
-+ CreateAndPopulateDiagOpts(Args, UseNewCC1Process);
-
- TextDiagnosticPrinter *DiagClient
- = new TextDiagnosticPrinter(llvm::errs(), &*DiagOpts);
-@@ -488,10 +489,11 @@ int ZigClang_main(int argc_, const char **argv_) {
- ProcessWarningOptions(Diags, *DiagOpts, /*ReportDiags=*/false);
-
- Driver TheDriver(Path, llvm::sys::getDefaultTargetTriple(), Diags);
-- SetInstallDir(argv, TheDriver, CanonicalPrefixes);
-+ SetInstallDir(Args, TheDriver, CanonicalPrefixes);
-+ auto TargetAndMode = ToolChain::getTargetAndModeFromProgramName(Args[0]);
- TheDriver.setTargetAndMode(TargetAndMode);
-
-- insertTargetAndModeArgs(TargetAndMode, argv, SavedStrings);
-+ insertTargetAndModeArgs(TargetAndMode, Args, SavedStrings);
-
- SetBackdoorDriverOutputsFromEnvVars(TheDriver);
-
-@@ -501,7 +503,7 @@ int ZigClang_main(int argc_, const char **argv_) {
- llvm::CrashRecoveryContext::Enable();
- }
-
-- std::unique_ptr<Compilation> C(TheDriver.BuildCompilation(argv));
-+ std::unique_ptr<Compilation> C(TheDriver.BuildCompilation(Args));
- int Res = 1;
- bool IsCrash = false;
- if (C && !C->containsError()) {
-diff --git a/src/zig_llvm-ar.cpp b/src/zig_llvm-ar.cpp
-index e4c376adb..b48cd811d 100644
---- a/src/zig_llvm-ar.cpp
-+++ b/src/zig_llvm-ar.cpp
-@@ -1,263 +1,3 @@
--// In this file is copy+pasted WindowsSupport.h from LLVM 12.0.1-rc1.
--// This is so that we can patch it. The upstream sources are incorrectly
--// including "llvm/Config/config.h" which is a private header and thus not
--// available in the include files distributed with LLVM.
--// The patch here changes it to include "llvm/Config/config.h" instead.
--// Patch submitted upstream: https://reviews.llvm.org/D103370
--#if !defined(_WIN32)
--#define LLVM_SUPPORT_WINDOWSSUPPORT_H
--#endif
--
--//===- WindowsSupport.h - Common Windows Include File -----------*- C++ -*-===//
--//
--// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
--// See https://llvm.org/LICENSE.txt for license information.
--// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
--//
--//===----------------------------------------------------------------------===//
--//
--// This file defines things specific to Windows implementations. In addition to
--// providing some helpers for working with win32 APIs, this header wraps
--// <windows.h> with some portability macros. Always include WindowsSupport.h
--// instead of including <windows.h> directly.
--//
--//===----------------------------------------------------------------------===//
--
--//===----------------------------------------------------------------------===//
--//=== WARNING: Implementation here must contain only generic Win32 code that
--//=== is guaranteed to work on *all* Win32 variants.
--//===----------------------------------------------------------------------===//
--
--#ifndef LLVM_SUPPORT_WINDOWSSUPPORT_H
--#define LLVM_SUPPORT_WINDOWSSUPPORT_H
--
--// mingw-w64 tends to define it as 0x0502 in its headers.
--#undef _WIN32_WINNT
--#undef _WIN32_IE
--
--// Require at least Windows 7 API.
--#define _WIN32_WINNT 0x0601
--#define _WIN32_IE 0x0800 // MinGW at it again. FIXME: verify if still needed.
--#define WIN32_LEAN_AND_MEAN
--#ifndef NOMINMAX
--#define NOMINMAX
--#endif
--
--#include "llvm/ADT/SmallVector.h"
--#include "llvm/ADT/StringExtras.h"
--#include "llvm/ADT/StringRef.h"
--#include "llvm/ADT/Twine.h"
--#include "llvm/Config/llvm-config.h" // Get build system configuration settings
--#include "llvm/Support/Allocator.h"
--#include "llvm/Support/Chrono.h"
--#include "llvm/Support/Compiler.h"
--#include "llvm/Support/ErrorHandling.h"
--#include "llvm/Support/VersionTuple.h"
--#include <cassert>
--#include <string>
--#include <system_error>
--#include <windows.h>
--
--// Must be included after windows.h
--#include <wincrypt.h>
--
--namespace llvm {
--
--/// Determines if the program is running on Windows 8 or newer. This
--/// reimplements one of the helpers in the Windows 8.1 SDK, which are intended
--/// to supercede raw calls to GetVersionEx. Old SDKs, Cygwin, and MinGW don't
--/// yet have VersionHelpers.h, so we have our own helper.
--bool RunningWindows8OrGreater();
--
--/// Returns the Windows version as Major.Minor.0.BuildNumber. Uses
--/// RtlGetVersion or GetVersionEx under the hood depending on what is available.
--/// GetVersionEx is deprecated, but this API exposes the build number which can
--/// be useful for working around certain kernel bugs.
--llvm::VersionTuple GetWindowsOSVersion();
--
--bool MakeErrMsg(std::string *ErrMsg, const std::string &prefix);
--
--// Include GetLastError() in a fatal error message.
--LLVM_ATTRIBUTE_NORETURN inline void ReportLastErrorFatal(const char *Msg) {
-- std::string ErrMsg;
-- MakeErrMsg(&ErrMsg, Msg);
-- llvm::report_fatal_error(ErrMsg);
--}
--
--template <typename HandleTraits>
--class ScopedHandle {
-- typedef typename HandleTraits::handle_type handle_type;
-- handle_type Handle;
--
-- ScopedHandle(const ScopedHandle &other) = delete;
-- void operator=(const ScopedHandle &other) = delete;
--public:
-- ScopedHandle()
-- : Handle(HandleTraits::GetInvalid()) {}
--
-- explicit ScopedHandle(handle_type h)
-- : Handle(h) {}
--
-- ~ScopedHandle() {
-- if (HandleTraits::IsValid(Handle))
-- HandleTraits::Close(Handle);
-- }
--
-- handle_type take() {
-- handle_type t = Handle;
-- Handle = HandleTraits::GetInvalid();
-- return t;
-- }
--
-- ScopedHandle &operator=(handle_type h) {
-- if (HandleTraits::IsValid(Handle))
-- HandleTraits::Close(Handle);
-- Handle = h;
-- return *this;
-- }
--
-- // True if Handle is valid.
-- explicit operator bool() const {
-- return HandleTraits::IsValid(Handle) ? true : false;
-- }
--
-- operator handle_type() const {
-- return Handle;
-- }
--};
--
--struct CommonHandleTraits {
-- typedef HANDLE handle_type;
--
-- static handle_type GetInvalid() {
-- return INVALID_HANDLE_VALUE;
-- }
--
-- static void Close(handle_type h) {
-- ::CloseHandle(h);
-- }
--
-- static bool IsValid(handle_type h) {
-- return h != GetInvalid();
-- }
--};
--
--struct JobHandleTraits : CommonHandleTraits {
-- static handle_type GetInvalid() {
-- return NULL;
-- }
--};
--
--struct CryptContextTraits : CommonHandleTraits {
-- typedef HCRYPTPROV handle_type;
--
-- static handle_type GetInvalid() {
-- return 0;
-- }
--
-- static void Close(handle_type h) {
-- ::CryptReleaseContext(h, 0);
-- }
--
-- static bool IsValid(handle_type h) {
-- return h != GetInvalid();
-- }
--};
--
--struct RegTraits : CommonHandleTraits {
-- typedef HKEY handle_type;
--
-- static handle_type GetInvalid() {
-- return NULL;
-- }
--
-- static void Close(handle_type h) {
-- ::RegCloseKey(h);
-- }
--
-- static bool IsValid(handle_type h) {
-- return h != GetInvalid();
-- }
--};
--
--struct FindHandleTraits : CommonHandleTraits {
-- static void Close(handle_type h) {
-- ::FindClose(h);
-- }
--};
--
--struct FileHandleTraits : CommonHandleTraits {};
--
--typedef ScopedHandle<CommonHandleTraits> ScopedCommonHandle;
--typedef ScopedHandle<FileHandleTraits> ScopedFileHandle;
--typedef ScopedHandle<CryptContextTraits> ScopedCryptContext;
--typedef ScopedHandle<RegTraits> ScopedRegHandle;
--typedef ScopedHandle<FindHandleTraits> ScopedFindHandle;
--typedef ScopedHandle<JobHandleTraits> ScopedJobHandle;
--
--template <class T>
--class SmallVectorImpl;
--
--template <class T>
--typename SmallVectorImpl<T>::const_pointer
--c_str(SmallVectorImpl<T> &str) {
-- str.push_back(0);
-- str.pop_back();
-- return str.data();
--}
--
--namespace sys {
--
--inline std::chrono::nanoseconds toDuration(FILETIME Time) {
-- ULARGE_INTEGER TimeInteger;
-- TimeInteger.LowPart = Time.dwLowDateTime;
-- TimeInteger.HighPart = Time.dwHighDateTime;
--
-- // FILETIME's are # of 100 nanosecond ticks (1/10th of a microsecond)
-- return std::chrono::nanoseconds(100 * TimeInteger.QuadPart);
--}
--
--inline TimePoint<> toTimePoint(FILETIME Time) {
-- ULARGE_INTEGER TimeInteger;
-- TimeInteger.LowPart = Time.dwLowDateTime;
-- TimeInteger.HighPart = Time.dwHighDateTime;
--
-- // Adjust for different epoch
-- TimeInteger.QuadPart -= 11644473600ll * 10000000;
--
-- // FILETIME's are # of 100 nanosecond ticks (1/10th of a microsecond)
-- return TimePoint<>(std::chrono::nanoseconds(100 * TimeInteger.QuadPart));
--}
--
--inline FILETIME toFILETIME(TimePoint<> TP) {
-- ULARGE_INTEGER TimeInteger;
-- TimeInteger.QuadPart = TP.time_since_epoch().count() / 100;
-- TimeInteger.QuadPart += 11644473600ll * 10000000;
--
-- FILETIME Time;
-- Time.dwLowDateTime = TimeInteger.LowPart;
-- Time.dwHighDateTime = TimeInteger.HighPart;
-- return Time;
--}
--
--namespace windows {
--// Returns command line arguments. Unlike arguments given to main(),
--// this function guarantees that the returned arguments are encoded in
--// UTF-8 regardless of the current code page setting.
--std::error_code GetCommandLineArguments(SmallVectorImpl<const char *> &Args,
-- BumpPtrAllocator &Alloc);
--
--/// Convert UTF-8 path to a suitable UTF-16 path for use with the Win32 Unicode
--/// File API.
--std::error_code widenPath(const Twine &Path8, SmallVectorImpl<wchar_t> &Path16,
-- size_t MaxPathLen = MAX_PATH);
--
--} // end namespace windows
--} // end namespace sys
--} // end namespace llvm.
--
--#endif
--
- //===-- llvm-ar.cpp - LLVM archive librarian utility ----------------------===//
- //
- // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
-@@ -386,9 +126,9 @@ MODIFIERS:
- )";
-
- static void printHelpMessage() {
-- if (Stem.contains_lower("ranlib"))
-+ if (Stem.contains_insensitive("ranlib"))
- outs() << RanlibHelp;
-- else if (Stem.contains_lower("ar"))
-+ else if (Stem.contains_insensitive("ar"))
- outs() << ArHelp;
- }
-
-@@ -530,7 +270,8 @@ static void getArchive() {
- }
-
- static object::Archive &readLibrary(const Twine &Library) {
-- auto BufOrErr = MemoryBuffer::getFile(Library, -1, false);
-+ auto BufOrErr = MemoryBuffer::getFile(Library, /*IsText=*/false,
-+ /*RequiresNullTerminator=*/false);
- failIfError(BufOrErr.getError(), "could not open library " + Library);
- ArchiveBuffers.push_back(std::move(*BufOrErr));
- auto LibOrErr =
-@@ -1255,8 +996,8 @@ static void performOperation(ArchiveOperation Operation,
- static int performOperation(ArchiveOperation Operation,
- std::vector<NewArchiveMember> *NewMembers) {
- // Create or open the archive object.
-- ErrorOr<std::unique_ptr<MemoryBuffer>> Buf =
-- MemoryBuffer::getFile(ArchiveName, -1, false);
-+ ErrorOr<std::unique_ptr<MemoryBuffer>> Buf = MemoryBuffer::getFile(
-+ ArchiveName, /*IsText=*/false, /*RequiresNullTerminator=*/false);
- std::error_code EC = Buf.getError();
- if (EC && EC != errc::no_such_file_or_directory)
- fail("unable to open '" + ArchiveName + "': " + EC.message());
-@@ -1522,7 +1263,7 @@ static int ranlib_main(int argc, char **argv) {
-
- extern "C" int ZigLlvmAr_main(int argc, char **argv);
- int ZigLlvmAr_main(int argc, char **argv) {
-- // ZIG MOD: On windows, InitLLVM calls GetCommandLineW(),
-+ // ZIG PATCH: On Windows, InitLLVM calls GetCommandLineW(),
- // and overwrites the args. We don't want it to do that,
- // and we also don't need the signal handlers it installs
- // (we have our own already), so we just use llvm_shutdown_obj
-@@ -1543,7 +1284,7 @@ int ZigLlvmAr_main(int argc, char **argv) {
- // Lib.exe -> lib (see D44808, MSBuild runs Lib.exe)
- // dlltool.exe -> dlltool
- // arm-pokymllib32-linux-gnueabi-llvm-ar-10 -> ar
-- auto I = Stem.rfind_lower(Tool);
-+ auto I = Stem.rfind_insensitive(Tool);
- return I != StringRef::npos &&
- (I + Tool.size() == Stem.size() || !isAlnum(Stem[I + Tool.size()]));
- };
-
-From 194f37b7540429d79da6ac4bc398a97cde1c8f39 Mon Sep 17 00:00:00 2001
-From: Andrew Kelley <andrew at ziglang.org>
-Date: Sun, 15 Aug 2021 23:09:55 -0700
-Subject: [PATCH 3/4] update target CPU features with LLVM 13 rc1 data
-
-(cherry picked from commit 7adf15682ca263c7d4e0e5306517f22272310294)
----
- lib/std/target.zig | 1 +
- lib/std/target/aarch64.zig | 126 +++++++++++++---
- lib/std/target/amdgpu.zig | 263 ++++++++++++++++++++++++++++++++--
- lib/std/target/arc.zig | 39 +++++
- lib/std/target/arm.zig | 20 +--
- lib/std/target/hexagon.zig | 35 +++++
- lib/std/target/nvptx.zig | 26 ++++
- lib/std/target/powerpc.zig | 35 ++++-
- lib/std/target/riscv.zig | 2 +-
- lib/std/target/systemz.zig | 76 ++++++++++
- lib/std/target/wasm.zig | 8 --
- lib/std/target/x86.zig | 167 ++++++++++++++++-----
- tools/update_cpu_features.zig | 2 -
- 13 files changed, 720 insertions(+), 80 deletions(-)
- create mode 100644 lib/std/target/arc.zig
-
-diff --git a/lib/std/target.zig b/lib/std/target.zig
-index 3fd5cd5f9..8da8499a5 100644
---- a/lib/std/target.zig
-+++ b/lib/std/target.zig
-@@ -420,6 +420,7 @@ pub const Target = struct {
- };
-
- pub const aarch64 = @import("target/aarch64.zig");
-+ pub const arc = @import("target/arc.zig");
- pub const amdgpu = @import("target/amdgpu.zig");
- pub const arm = @import("target/arm.zig");
- pub const avr = @import("target/avr.zig");
-diff --git a/lib/std/target/aarch64.zig b/lib/std/target/aarch64.zig
-index a331d8a87..bbd6140a6 100644
---- a/lib/std/target/aarch64.zig
-+++ b/lib/std/target/aarch64.zig
-@@ -65,6 +65,7 @@ pub const Feature = enum {
- fuse_csel,
- fuse_literals,
- harden_sls_blr,
-+ harden_sls_nocomdat,
- harden_sls_retbr,
- hcx,
- i8mm,
-@@ -81,6 +82,7 @@ pub const Feature = enum {
- neoverse_n2,
- neoverse_v1,
- no_neg_immediates,
-+ no_zcz_fp,
- nv,
- outline_atomics,
- pan,
-@@ -120,6 +122,7 @@ pub const Feature = enum {
- reserve_x6,
- reserve_x7,
- reserve_x9,
-+ rme,
- sb,
- sel2,
- sha2,
-@@ -128,6 +131,9 @@ pub const Feature = enum {
- slow_paired_128,
- slow_strqro_store,
- sm4,
-+ sme,
-+ sme_f64,
-+ sme_i64,
- spe,
- spe_eef,
- specrestrict,
-@@ -148,7 +154,6 @@ pub const Feature = enum {
- tracev8_4,
- trbe,
- uaops,
-- use_aa,
- use_experimental_zeroing_pseudos,
- use_postra_scheduler,
- use_reciprocal_square_root,
-@@ -166,7 +171,6 @@ pub const Feature = enum {
- xs,
- zcm,
- zcz,
-- zcz_fp,
- zcz_fp_workaround,
- zcz_gp,
- };
-@@ -591,6 +595,11 @@ pub const all_features = blk: {
- .description = "Harden against straight line speculation across BLR instructions",
- .dependencies = featureSet(&[_]Feature{}),
- };
-+ result[@enumToInt(Feature.harden_sls_nocomdat)] = .{
-+ .llvm_name = "harden-sls-nocomdat",
-+ .description = "Generate thunk code for SLS mitigation in the normal text section",
-+ .dependencies = featureSet(&[_]Feature{}),
-+ };
- result[@enumToInt(Feature.harden_sls_retbr)] = .{
- .llvm_name = "harden-sls-retbr",
- .description = "Harden against straight line speculation across RET and BR instructions",
-@@ -657,8 +666,10 @@ pub const all_features = blk: {
- .crypto,
- .dotprod,
- .fullfp16,
-+ .fuse_aes,
- .rcpc,
- .ssbs,
-+ .use_postra_scheduler,
- .v8_2a,
- }),
- };
-@@ -669,9 +680,11 @@ pub const all_features = blk: {
- .crypto,
- .dotprod,
- .fullfp16,
-+ .fuse_aes,
- .rcpc,
- .spe,
- .ssbs,
-+ .use_postra_scheduler,
- .v8_2a,
- }),
- };
-@@ -680,10 +693,13 @@ pub const all_features = blk: {
- .description = "Neoverse N2 ARM processors",
- .dependencies = featureSet(&[_]Feature{
- .bf16,
-+ .crypto,
- .ete,
-+ .fuse_aes,
- .i8mm,
- .mte,
- .sve2_bitperm,
-+ .use_postra_scheduler,
- .v8_5a,
- }),
- };
-@@ -711,6 +727,11 @@ pub const all_features = blk: {
- .description = "Convert immediates and instructions to their negated or complemented equivalent when the immediate does not fit in the encoding.",
- .dependencies = featureSet(&[_]Feature{}),
- };
-+ result[@enumToInt(Feature.no_zcz_fp)] = .{
-+ .llvm_name = "no-zcz-fp",
-+ .description = "Has no zero-cycle zeroing instructions for FP registers",
-+ .dependencies = featureSet(&[_]Feature{}),
-+ };
- result[@enumToInt(Feature.nv)] = .{
- .llvm_name = "nv",
- .description = "Enable v8.4-A Nested Virtualization Enchancement",
-@@ -910,6 +931,11 @@ pub const all_features = blk: {
- .description = "Reserve X9, making it unavailable as a GPR",
- .dependencies = featureSet(&[_]Feature{}),
- };
-+ result[@enumToInt(Feature.rme)] = .{
-+ .llvm_name = "rme",
-+ .description = "Enable Realm Management Extension",
-+ .dependencies = featureSet(&[_]Feature{}),
-+ };
- result[@enumToInt(Feature.sb)] = .{
- .llvm_name = "sb",
- .description = "Enable v8.5 Speculation Barrier",
-@@ -956,6 +982,28 @@ pub const all_features = blk: {
- .neon,
- }),
- };
-+ result[@enumToInt(Feature.sme)] = .{
-+ .llvm_name = "sme",
-+ .description = "Enable Scalable Matrix Extension (SME)",
-+ .dependencies = featureSet(&[_]Feature{
-+ .bf16,
-+ .sve2,
-+ }),
-+ };
-+ result[@enumToInt(Feature.sme_f64)] = .{
-+ .llvm_name = "sme-f64",
-+ .description = "Enable Scalable Matrix Extension (SME) F64F64 instructions",
-+ .dependencies = featureSet(&[_]Feature{
-+ .sme,
-+ }),
-+ };
-+ result[@enumToInt(Feature.sme_i64)] = .{
-+ .llvm_name = "sme-i64",
-+ .description = "Enable Scalable Matrix Extension (SME) I16I64 instructions",
-+ .dependencies = featureSet(&[_]Feature{
-+ .sme,
-+ }),
-+ };
- result[@enumToInt(Feature.spe)] = .{
- .llvm_name = "spe",
- .description = "Enable Statistical Profiling extension",
-@@ -1071,11 +1119,6 @@ pub const all_features = blk: {
- .description = "Enable v8.2 UAO PState",
- .dependencies = featureSet(&[_]Feature{}),
- };
-- result[@enumToInt(Feature.use_aa)] = .{
-- .llvm_name = "use-aa",
-- .description = "Use alias analysis during codegen",
-- .dependencies = featureSet(&[_]Feature{}),
-- };
- result[@enumToInt(Feature.use_experimental_zeroing_pseudos)] = .{
- .llvm_name = "use-experimental-zeroing-pseudos",
- .description = "Hint to the compiler that the MOVPRFX instruction is merged with destructive operations",
-@@ -1248,15 +1291,9 @@ pub const all_features = blk: {
- .llvm_name = "zcz",
- .description = "Has zero-cycle zeroing instructions",
- .dependencies = featureSet(&[_]Feature{
-- .zcz_fp,
- .zcz_gp,
- }),
- };
-- result[@enumToInt(Feature.zcz_fp)] = .{
-- .llvm_name = "zcz-fp",
-- .description = "Has zero-cycle zeroing instructions for FP registers",
-- .dependencies = featureSet(&[_]Feature{}),
-- };
- result[@enumToInt(Feature.zcz_fp_workaround)] = .{
- .llvm_name = "zcz-fp-workaround",
- .description = "The zero-cycle floating-point zeroing instruction has a bug",
-@@ -1400,7 +1437,62 @@ pub const cpu = struct {
- .name = "apple_latest",
- .llvm_name = "apple-latest",
- .features = featureSet(&[_]Feature{
-- .apple_a13,
-+ .aggressive_fma,
-+ .alternate_sextload_cvt_f32_pattern,
-+ .altnzcv,
-+ .arith_bcc_fusion,
-+ .arith_cbz_fusion,
-+ .ccdp,
-+ .crypto,
-+ .disable_latency_sched_heuristic,
-+ .fp16fml,
-+ .fptoint,
-+ .fuse_address,
-+ .fuse_aes,
-+ .fuse_arith_logic,
-+ .fuse_crypto_eor,
-+ .fuse_csel,
-+ .fuse_literals,
-+ .perfmon,
-+ .predres,
-+ .sb,
-+ .sha3,
-+ .specrestrict,
-+ .ssbs,
-+ .v8_4a,
-+ .zcm,
-+ .zcz,
-+ }),
-+ };
-+ pub const apple_m1 = CpuModel{
-+ .name = "apple_m1",
-+ .llvm_name = "apple-m1",
-+ .features = featureSet(&[_]Feature{
-+ .aggressive_fma,
-+ .alternate_sextload_cvt_f32_pattern,
-+ .altnzcv,
-+ .arith_bcc_fusion,
-+ .arith_cbz_fusion,
-+ .ccdp,
-+ .crypto,
-+ .disable_latency_sched_heuristic,
-+ .fp16fml,
-+ .fptoint,
-+ .fuse_address,
-+ .fuse_aes,
-+ .fuse_arith_logic,
-+ .fuse_crypto_eor,
-+ .fuse_csel,
-+ .fuse_literals,
-+ .perfmon,
-+ .predres,
-+ .sb,
-+ .sha3,
-+ .specrestrict,
-+ .ssbs,
-+ .v8_4a,
-+ .zcm,
-+ .zcz,
- }),
- };
- pub const apple_s4 = CpuModel{
-@@ -1456,7 +1548,6 @@ pub const cpu = struct {
- .custom_cheap_as_move,
- .fuse_aes,
- .perfmon,
-- .use_aa,
- .use_postra_scheduler,
- .v8a,
- }),
-@@ -1471,6 +1562,7 @@ pub const cpu = struct {
- .fuse_aes,
- .perfmon,
- .rcpc,
-+ .use_postra_scheduler,
- .v8_2a,
- }),
- };
-@@ -1646,7 +1738,6 @@ pub const cpu = struct {
- .use_postra_scheduler,
- .use_reciprocal_square_root,
- .v8a,
-- .zcz_fp,
- }),
- };
- pub const exynos_m2 = CpuModel{
-@@ -1663,7 +1754,6 @@ pub const cpu = struct {
- .slow_paired_128,
- .use_postra_scheduler,
- .v8a,
-- .zcz_fp,
- }),
- };
- pub const exynos_m3 = CpuModel{
-@@ -1683,7 +1773,6 @@ pub const cpu = struct {
- .predictable_select_expensive,
- .use_postra_scheduler,
- .v8a,
-- .zcz_fp,
- }),
- };
- pub const exynos_m4 = CpuModel{
-@@ -1821,7 +1910,6 @@ pub const cpu = struct {
- .perfmon,
- .predictable_select_expensive,
- .strict_align,
-- .use_aa,
- .use_postra_scheduler,
- .v8_3a,
- }),
-diff --git a/lib/std/target/amdgpu.zig b/lib/std/target/amdgpu.zig
-index 6e36a34a5..ed6139193 100644
---- a/lib/std/target/amdgpu.zig
-+++ b/lib/std/target/amdgpu.zig
-@@ -9,6 +9,7 @@ pub const Feature = enum {
- a16,
- add_no_carry_insts,
- aperture_regs,
-+ architected_flat_scratch,
- atomic_fadd_insts,
- auto_waitcnt_before_barrier,
- ci_insts,
-@@ -20,11 +21,14 @@ pub const Feature = enum {
- dot4_insts,
- dot5_insts,
- dot6_insts,
-+ dot7_insts,
- dpp,
- dpp8,
-+ dpp_64bit,
- ds_src2_insts,
- enable_ds128,
- enable_prt_strict_null,
-+ extended_image_insts,
- fast_denormal_f32,
- fast_fmaf,
- flat_address_space,
-@@ -36,16 +40,19 @@ pub const Feature = enum {
- fma_mix_insts,
- fmaf,
- fp64,
-+ full_rate_64_ops,
- g16,
- gcn3_encoding,
- get_wave_id_inst,
- gfx10,
- gfx10_3_insts,
-+ gfx10_a_encoding,
- gfx10_b_encoding,
- gfx10_insts,
- gfx7_gfx8_gfx9_insts,
- gfx8_insts,
- gfx9,
-+ gfx90a_insts,
- gfx9_insts,
- half_rate_64_ops,
- image_gather4_d16_bug,
-@@ -70,11 +77,18 @@ pub const Feature = enum {
- mfma_inline_literal_bug,
- mimg_r128,
- movrel,
-+ negative_scratch_offset_bug,
-+ negative_unaligned_scratch_offset_bug,
- no_data_dep_hazard,
- no_sdst_cmpx,
-+ nsa_clause_bug,
- nsa_encoding,
-+ nsa_max_size_13,
-+ nsa_max_size_5,
- nsa_to_vmem_bug,
- offset_3f_bug,
-+ packed_fp32_ops,
-+ packed_tid,
- pk_fmac_f16_inst,
- promote_alloca,
- r128_a16,
-@@ -92,11 +106,13 @@ pub const Feature = enum {
- sdwa_sdst,
- sea_islands,
- sgpr_init_bug,
-+ shader_cycles_register,
- si_scheduler,
- smem_to_vector_write_hazard,
- southern_islands,
- sramecc,
- sramecc_support,
-+ tgsplit,
- trap_handler,
- trig_reduced_range,
- unaligned_access_mode,
-@@ -146,6 +162,11 @@ pub const all_features = blk: {
- .description = "Has Memory Aperture Base and Size Registers",
- .dependencies = featureSet(&[_]Feature{}),
- };
-+ result[@enumToInt(Feature.architected_flat_scratch)] = .{
-+ .llvm_name = "architected-flat-scratch",
-+ .description = "Flat Scratch register is a readonly SPI initialized architected register",
-+ .dependencies = featureSet(&[_]Feature{}),
-+ };
- result[@enumToInt(Feature.atomic_fadd_insts)] = .{
- .llvm_name = "atomic-fadd-insts",
- .description = "Has buffer_atomic_add_f32, buffer_atomic_pk_add_f16, global_atomic_add_f32, global_atomic_pk_add_f16 instructions",
-@@ -180,7 +201,7 @@ pub const all_features = blk: {
- };
- result[@enumToInt(Feature.dot2_insts)] = .{
- .llvm_name = "dot2-insts",
-- .description = "Has v_dot2_f32_f16, v_dot2_i32_i16, v_dot2_u32_u16, v_dot4_u32_u8, v_dot8_u32_u4 instructions",
-+ .description = "Has v_dot2_i32_i16, v_dot2_u32_u16 instructions",
- .dependencies = featureSet(&[_]Feature{}),
- };
- result[@enumToInt(Feature.dot3_insts)] = .{
-@@ -203,6 +224,11 @@ pub const all_features = blk: {
- .description = "Has v_dot4c_i32_i8 instruction",
- .dependencies = featureSet(&[_]Feature{}),
- };
-+ result[@enumToInt(Feature.dot7_insts)] = .{
-+ .llvm_name = "dot7-insts",
-+ .description = "Has v_dot2_f32_f16, v_dot4_u32_u8, v_dot8_u32_u4 instructions",
-+ .dependencies = featureSet(&[_]Feature{}),
-+ };
- result[@enumToInt(Feature.dpp)] = .{
- .llvm_name = "dpp",
- .description = "Support DPP (Data Parallel Primitives) extension",
-@@ -213,6 +239,11 @@ pub const all_features = blk: {
- .description = "Support DPP8 (Data Parallel Primitives) extension",
- .dependencies = featureSet(&[_]Feature{}),
- };
-+ result[@enumToInt(Feature.dpp_64bit)] = .{
-+ .llvm_name = "dpp-64bit",
-+ .description = "Support DPP (Data Parallel Primitives) extension",
-+ .dependencies = featureSet(&[_]Feature{}),
-+ };
- result[@enumToInt(Feature.ds_src2_insts)] = .{
- .llvm_name = "ds-src2-insts",
- .description = "Has ds_*_src2 instructions",
-@@ -228,6 +259,11 @@ pub const all_features = blk: {
- .description = "Enable zeroing of result registers for sparse texture fetches",
- .dependencies = featureSet(&[_]Feature{}),
- };
-+ result[@enumToInt(Feature.extended_image_insts)] = .{
-+ .llvm_name = "extended-image-insts",
-+ .description = "Support mips != 0, lod != 0, gather4, and get_lod",
-+ .dependencies = featureSet(&[_]Feature{}),
-+ };
- result[@enumToInt(Feature.fast_denormal_f32)] = .{
- .llvm_name = "fast-denormal-f32",
- .description = "Enabling denormals does not cause f32 instructions to run at f64 rates",
-@@ -265,7 +301,7 @@ pub const all_features = blk: {
- };
- result[@enumToInt(Feature.flat_segment_offset_bug)] = .{
- .llvm_name = "flat-segment-offset-bug",
-- .description = "GFX10 bug, inst_offset ignored in flat segment",
-+ .description = "GFX10 bug where inst_offset is ignored when flat instructions access global memory",
- .dependencies = featureSet(&[_]Feature{}),
- };
- result[@enumToInt(Feature.fma_mix_insts)] = .{
-@@ -283,6 +319,11 @@ pub const all_features = blk: {
- .description = "Enable double precision operations",
- .dependencies = featureSet(&[_]Feature{}),
- };
-+ result[@enumToInt(Feature.full_rate_64_ops)] = .{
-+ .llvm_name = "full-rate-64-ops",
-+ .description = "Most fp64 instructions are full rate",
-+ .dependencies = featureSet(&[_]Feature{}),
-+ };
- result[@enumToInt(Feature.g16)] = .{
- .llvm_name = "g16",
- .description = "Support G16 for 16-bit gradient image operands",
-@@ -309,6 +350,7 @@ pub const all_features = blk: {
- .ci_insts,
- .dpp,
- .dpp8,
-+ .extended_image_insts,
- .fast_denormal_f32,
- .fast_fmaf,
- .flat_address_space,
-@@ -331,6 +373,7 @@ pub const all_features = blk: {
- .pk_fmac_f16_inst,
- .register_banking,
- .s_memrealtime,
-+ .s_memtime_inst,
- .sdwa,
- .sdwa_omod,
- .sdwa_scalar,
-@@ -347,6 +390,11 @@ pub const all_features = blk: {
- .description = "Additional instructions for GFX10.3",
- .dependencies = featureSet(&[_]Feature{}),
- };
-+ result[@enumToInt(Feature.gfx10_a_encoding)] = .{
-+ .llvm_name = "gfx10_a-encoding",
-+ .description = "Has BVH ray tracing instructions",
-+ .dependencies = featureSet(&[_]Feature{}),
-+ };
- result[@enumToInt(Feature.gfx10_b_encoding)] = .{
- .llvm_name = "gfx10_b-encoding",
- .description = "Encoding format GFX10_B",
-@@ -376,7 +424,6 @@ pub const all_features = blk: {
- .aperture_regs,
- .ci_insts,
- .dpp,
-- .ds_src2_insts,
- .fast_denormal_f32,
- .fast_fmaf,
- .flat_address_space,
-@@ -391,7 +438,7 @@ pub const all_features = blk: {
- .int_clamp_insts,
- .inv_2pi_inline_imm,
- .localmemorysize65536,
-- .mad_mac_f32_insts,
-+ .negative_scratch_offset_bug,
- .r128_a16,
- .s_memrealtime,
- .s_memtime_inst,
-@@ -410,6 +457,11 @@ pub const all_features = blk: {
- .xnack_support,
- }),
- };
-+ result[@enumToInt(Feature.gfx90a_insts)] = .{
-+ .llvm_name = "gfx90a-insts",
-+ .description = "Additional instructions for GFX90A+",
-+ .dependencies = featureSet(&[_]Feature{}),
-+ };
- result[@enumToInt(Feature.gfx9_insts)] = .{
- .llvm_name = "gfx9-insts",
- .description = "Additional instructions for GFX9+",
-@@ -530,6 +582,16 @@ pub const all_features = blk: {
- .description = "Has v_movrel*_b32 instructions",
- .dependencies = featureSet(&[_]Feature{}),
- };
-+ result[@enumToInt(Feature.negative_scratch_offset_bug)] = .{
-+ .llvm_name = "negative-scratch-offset-bug",
-+ .description = "Negative immediate offsets in scratch instructions with an SGPR offset page fault on GFX9",
-+ .dependencies = featureSet(&[_]Feature{}),
-+ };
-+ result[@enumToInt(Feature.negative_unaligned_scratch_offset_bug)] = .{
-+ .llvm_name = "negative-unaligned-scratch-offset-bug",
-+ .description = "Scratch instructions with a VGPR offset and a negative immediate offset that is not a multiple of 4 read wrong memory on GFX10",
-+ .dependencies = featureSet(&[_]Feature{}),
-+ };
- result[@enumToInt(Feature.no_data_dep_hazard)] = .{
- .llvm_name = "no-data-dep-hazard",
- .description = "Does not need SW waitstates",
-@@ -540,11 +602,26 @@ pub const all_features = blk: {
- .description = "V_CMPX does not write VCC/SGPR in addition to EXEC",
- .dependencies = featureSet(&[_]Feature{}),
- };
-+ result[@enumToInt(Feature.nsa_clause_bug)] = .{
-+ .llvm_name = "nsa-clause-bug",
-+ .description = "MIMG-NSA in a hard clause has unpredictable results on GFX10.1",
-+ .dependencies = featureSet(&[_]Feature{}),
-+ };
- result[@enumToInt(Feature.nsa_encoding)] = .{
- .llvm_name = "nsa-encoding",
- .description = "Support NSA encoding for image instructions",
- .dependencies = featureSet(&[_]Feature{}),
- };
-+ result[@enumToInt(Feature.nsa_max_size_13)] = .{
-+ .llvm_name = "nsa-max-size-13",
-+ .description = "The maximum non-sequential address size in VGPRs.",
-+ .dependencies = featureSet(&[_]Feature{}),
-+ };
-+ result[@enumToInt(Feature.nsa_max_size_5)] = .{
-+ .llvm_name = "nsa-max-size-5",
-+ .description = "The maximum non-sequential address size in VGPRs.",
-+ .dependencies = featureSet(&[_]Feature{}),
-+ };
- result[@enumToInt(Feature.nsa_to_vmem_bug)] = .{
- .llvm_name = "nsa-to-vmem-bug",
- .description = "MIMG-NSA followed by VMEM fail if EXEC_LO or EXEC_HI equals zero",
-@@ -555,6 +632,16 @@ pub const all_features = blk: {
- .description = "Branch offset of 3f hardware bug",
- .dependencies = featureSet(&[_]Feature{}),
- };
-+ result[@enumToInt(Feature.packed_fp32_ops)] = .{
-+ .llvm_name = "packed-fp32-ops",
-+ .description = "Support packed fp32 instructions",
-+ .dependencies = featureSet(&[_]Feature{}),
-+ };
-+ result[@enumToInt(Feature.packed_tid)] = .{
-+ .llvm_name = "packed-tid",
-+ .description = "Workitem IDs are packed into v0 at kernel launch",
-+ .dependencies = featureSet(&[_]Feature{}),
-+ };
- result[@enumToInt(Feature.pk_fmac_f16_inst)] = .{
- .llvm_name = "pk-fmac-f16-inst",
- .description = "Has v_pk_fmac_f16 instruction",
-@@ -636,6 +723,7 @@ pub const all_features = blk: {
- .dependencies = featureSet(&[_]Feature{
- .ci_insts,
- .ds_src2_insts,
-+ .extended_image_insts,
- .flat_address_space,
- .fp64,
- .gfx7_gfx8_gfx9_insts,
-@@ -654,6 +742,11 @@ pub const all_features = blk: {
- .description = "VI SGPR initialization bug requiring a fixed SGPR allocation size",
- .dependencies = featureSet(&[_]Feature{}),
- };
-+ result[@enumToInt(Feature.shader_cycles_register)] = .{
-+ .llvm_name = "shader-cycles-register",
-+ .description = "Has SHADER_CYCLES hardware register",
-+ .dependencies = featureSet(&[_]Feature{}),
-+ };
- result[@enumToInt(Feature.si_scheduler)] = .{
- .llvm_name = "si-scheduler",
- .description = "Enable SI Machine Scheduler",
-@@ -669,6 +762,7 @@ pub const all_features = blk: {
- .description = "SOUTHERN_ISLANDS GPU generation",
- .dependencies = featureSet(&[_]Feature{
- .ds_src2_insts,
-+ .extended_image_insts,
- .fp64,
- .ldsbankcount32,
- .localmemorysize32768,
-@@ -690,6 +784,11 @@ pub const all_features = blk: {
- .description = "Hardware supports SRAMECC",
- .dependencies = featureSet(&[_]Feature{}),
- };
-+ result[@enumToInt(Feature.tgsplit)] = .{
-+ .llvm_name = "tgsplit",
-+ .description = "Enable threadgroup split execution",
-+ .dependencies = featureSet(&[_]Feature{}),
-+ };
- result[@enumToInt(Feature.trap_handler)] = .{
- .llvm_name = "trap-handler",
- .description = "Trap handler support",
-@@ -758,6 +857,7 @@ pub const all_features = blk: {
- .ci_insts,
- .dpp,
- .ds_src2_insts,
-+ .extended_image_insts,
- .fast_denormal_f32,
- .flat_address_space,
- .fp64,
-@@ -889,10 +989,12 @@ pub const cpu = struct {
- .lds_misaligned_bug,
- .ldsbankcount32,
- .mad_mac_f32_insts,
-+ .negative_unaligned_scratch_offset_bug,
-+ .nsa_clause_bug,
- .nsa_encoding,
-+ .nsa_max_size_5,
- .nsa_to_vmem_bug,
- .offset_3f_bug,
-- .s_memtime_inst,
- .scalar_atomics,
- .scalar_flat_scratch_insts,
- .scalar_stores,
-@@ -913,6 +1015,7 @@ pub const cpu = struct {
- .dot2_insts,
- .dot5_insts,
- .dot6_insts,
-+ .dot7_insts,
- .ds_src2_insts,
- .flat_segment_offset_bug,
- .get_wave_id_inst,
-@@ -922,10 +1025,12 @@ pub const cpu = struct {
- .lds_misaligned_bug,
- .ldsbankcount32,
- .mad_mac_f32_insts,
-+ .negative_unaligned_scratch_offset_bug,
-+ .nsa_clause_bug,
- .nsa_encoding,
-+ .nsa_max_size_5,
- .nsa_to_vmem_bug,
- .offset_3f_bug,
-- .s_memtime_inst,
- .scalar_atomics,
- .scalar_flat_scratch_insts,
- .scalar_stores,
-@@ -946,6 +1051,7 @@ pub const cpu = struct {
- .dot2_insts,
- .dot5_insts,
- .dot6_insts,
-+ .dot7_insts,
- .ds_src2_insts,
- .flat_segment_offset_bug,
- .get_wave_id_inst,
-@@ -955,10 +1061,44 @@ pub const cpu = struct {
- .lds_misaligned_bug,
- .ldsbankcount32,
- .mad_mac_f32_insts,
-+ .negative_unaligned_scratch_offset_bug,
-+ .nsa_clause_bug,
- .nsa_encoding,
-+ .nsa_max_size_5,
-+ .nsa_to_vmem_bug,
-+ .offset_3f_bug,
-+ .scalar_atomics,
-+ .scalar_flat_scratch_insts,
-+ .scalar_stores,
-+ .smem_to_vector_write_hazard,
-+ .vcmpx_exec_war_hazard,
-+ .vcmpx_permlane_hazard,
-+ .vmem_to_scalar_write_hazard,
-+ .wavefrontsize32,
-+ .xnack_support,
-+ }),
-+ };
-+ pub const gfx1013 = CpuModel{
-+ .name = "gfx1013",
-+ .llvm_name = "gfx1013",
-+ .features = featureSet(&[_]Feature{
-+ .dl_insts,
-+ .ds_src2_insts,
-+ .flat_segment_offset_bug,
-+ .get_wave_id_inst,
-+ .gfx10,
-+ .gfx10_a_encoding,
-+ .inst_fwd_prefetch_bug,
-+ .lds_branch_vmem_war_hazard,
-+ .lds_misaligned_bug,
-+ .ldsbankcount32,
-+ .mad_mac_f32_insts,
-+ .negative_unaligned_scratch_offset_bug,
-+ .nsa_clause_bug,
-+ .nsa_encoding,
-+ .nsa_max_size_5,
- .nsa_to_vmem_bug,
- .offset_3f_bug,
-- .s_memtime_inst,
- .scalar_atomics,
- .scalar_flat_scratch_insts,
- .scalar_stores,
-@@ -979,11 +1119,15 @@ pub const cpu = struct {
- .dot2_insts,
- .dot5_insts,
- .dot6_insts,
-+ .dot7_insts,
- .gfx10,
- .gfx10_3_insts,
-+ .gfx10_a_encoding,
- .gfx10_b_encoding,
- .ldsbankcount32,
- .nsa_encoding,
-+ .nsa_max_size_13,
-+ .shader_cycles_register,
- .wavefrontsize32,
- }),
- };
-@@ -996,11 +1140,15 @@ pub const cpu = struct {
- .dot2_insts,
- .dot5_insts,
- .dot6_insts,
-+ .dot7_insts,
- .gfx10,
- .gfx10_3_insts,
-+ .gfx10_a_encoding,
- .gfx10_b_encoding,
- .ldsbankcount32,
- .nsa_encoding,
-+ .nsa_max_size_13,
-+ .shader_cycles_register,
- .wavefrontsize32,
- }),
- };
-@@ -1013,11 +1161,15 @@ pub const cpu = struct {
- .dot2_insts,
- .dot5_insts,
- .dot6_insts,
-+ .dot7_insts,
- .gfx10,
- .gfx10_3_insts,
-+ .gfx10_a_encoding,
- .gfx10_b_encoding,
- .ldsbankcount32,
- .nsa_encoding,
-+ .nsa_max_size_13,
-+ .shader_cycles_register,
- .wavefrontsize32,
- }),
- };
-@@ -1030,11 +1182,57 @@ pub const cpu = struct {
- .dot2_insts,
- .dot5_insts,
- .dot6_insts,
-+ .dot7_insts,
-+ .gfx10,
-+ .gfx10_3_insts,
-+ .gfx10_a_encoding,
-+ .gfx10_b_encoding,
-+ .ldsbankcount32,
-+ .nsa_encoding,
-+ .nsa_max_size_13,
-+ .shader_cycles_register,
-+ .wavefrontsize32,
-+ }),
-+ };
-+ pub const gfx1034 = CpuModel{
-+ .name = "gfx1034",
-+ .llvm_name = "gfx1034",
-+ .features = featureSet(&[_]Feature{
-+ .dl_insts,
-+ .dot1_insts,
-+ .dot2_insts,
-+ .dot5_insts,
-+ .dot6_insts,
-+ .dot7_insts,
- .gfx10,
- .gfx10_3_insts,
-+ .gfx10_a_encoding,
- .gfx10_b_encoding,
- .ldsbankcount32,
- .nsa_encoding,
-+ .nsa_max_size_13,
-+ .shader_cycles_register,
-+ .wavefrontsize32,
-+ }),
-+ };
-+ pub const gfx1035 = CpuModel{
-+ .name = "gfx1035",
-+ .llvm_name = "gfx1035",
-+ .features = featureSet(&[_]Feature{
-+ .dl_insts,
-+ .dot1_insts,
-+ .dot2_insts,
-+ .dot5_insts,
-+ .dot6_insts,
-+ .dot7_insts,
-+ .gfx10,
-+ .gfx10_3_insts,
-+ .gfx10_a_encoding,
-+ .gfx10_b_encoding,
-+ .ldsbankcount32,
-+ .nsa_encoding,
-+ .nsa_max_size_13,
-+ .shader_cycles_register,
- .wavefrontsize32,
- }),
- };
-@@ -1168,9 +1366,12 @@ pub const cpu = struct {
- .name = "gfx900",
- .llvm_name = "gfx900",
- .features = featureSet(&[_]Feature{
-+ .ds_src2_insts,
-+ .extended_image_insts,
- .gfx9,
- .image_gather4_d16_bug,
- .ldsbankcount32,
-+ .mad_mac_f32_insts,
- .mad_mix_insts,
- }),
- };
-@@ -1178,9 +1379,12 @@ pub const cpu = struct {
- .name = "gfx902",
- .llvm_name = "gfx902",
- .features = featureSet(&[_]Feature{
-+ .ds_src2_insts,
-+ .extended_image_insts,
- .gfx9,
- .image_gather4_d16_bug,
- .ldsbankcount32,
-+ .mad_mac_f32_insts,
- .mad_mix_insts,
- }),
- };
-@@ -1188,10 +1392,13 @@ pub const cpu = struct {
- .name = "gfx904",
- .llvm_name = "gfx904",
- .features = featureSet(&[_]Feature{
-+ .ds_src2_insts,
-+ .extended_image_insts,
- .fma_mix_insts,
- .gfx9,
- .image_gather4_d16_bug,
- .ldsbankcount32,
-+ .mad_mac_f32_insts,
- }),
- };
- pub const gfx906 = CpuModel{
-@@ -1201,11 +1408,15 @@ pub const cpu = struct {
- .dl_insts,
- .dot1_insts,
- .dot2_insts,
-+ .dot7_insts,
-+ .ds_src2_insts,
-+ .extended_image_insts,
- .fma_mix_insts,
- .gfx9,
- .half_rate_64_ops,
- .image_gather4_d16_bug,
- .ldsbankcount32,
-+ .mad_mac_f32_insts,
- .sramecc_support,
- }),
- };
-@@ -1221,11 +1432,15 @@ pub const cpu = struct {
- .dot4_insts,
- .dot5_insts,
- .dot6_insts,
-+ .dot7_insts,
-+ .ds_src2_insts,
-+ .extended_image_insts,
- .fma_mix_insts,
- .gfx9,
- .half_rate_64_ops,
- .image_gather4_d16_bug,
- .ldsbankcount32,
-+ .mad_mac_f32_insts,
- .mai_insts,
- .mfma_inline_literal_bug,
- .pk_fmac_f16_inst,
-@@ -1236,21 +1451,53 @@ pub const cpu = struct {
- .name = "gfx909",
- .llvm_name = "gfx909",
- .features = featureSet(&[_]Feature{
-+ .ds_src2_insts,
-+ .extended_image_insts,
- .gfx9,
- .image_gather4_d16_bug,
- .ldsbankcount32,
-+ .mad_mac_f32_insts,
- .mad_mix_insts,
- }),
- };
-+ pub const gfx90a = CpuModel{
-+ .name = "gfx90a",
-+ .llvm_name = "gfx90a",
-+ .features = featureSet(&[_]Feature{
-+ .atomic_fadd_insts,
-+ .dl_insts,
-+ .dot1_insts,
-+ .dot2_insts,
-+ .dot3_insts,
-+ .dot4_insts,
-+ .dot5_insts,
-+ .dot6_insts,
-+ .dot7_insts,
-+ .dpp_64bit,
-+ .fma_mix_insts,
-+ .full_rate_64_ops,
-+ .gfx9,
-+ .gfx90a_insts,
-+ .ldsbankcount32,
-+ .mad_mac_f32_insts,
-+ .mai_insts,
-+ .packed_fp32_ops,
-+ .packed_tid,
-+ .pk_fmac_f16_inst,
-+ .sramecc_support,
-+ }),
-+ };
- pub const gfx90c = CpuModel{
- .name = "gfx90c",
- .llvm_name = "gfx90c",
- .features = featureSet(&[_]Feature{
-+ .ds_src2_insts,
-+ .extended_image_insts,
- .gfx9,
- .image_gather4_d16_bug,
- .ldsbankcount32,
-+ .mad_mac_f32_insts,
- .mad_mix_insts,
-- .xnack,
- }),
- };
- pub const hainan = CpuModel{
-diff --git a/lib/std/target/arc.zig b/lib/std/target/arc.zig
-new file mode 100644
-index 000000000..822104b46
---- /dev/null
-+++ b/lib/std/target/arc.zig
-@@ -0,0 +1,39 @@
-+//! This file is auto-generated by tools/update_cpu_features.zig.
-+
-+const std = @import("../std.zig");
-+const CpuFeature = std.Target.Cpu.Feature;
-+const CpuModel = std.Target.Cpu.Model;
-+
-+pub const Feature = enum {
-+ norm,
-+};
-+
-+pub const featureSet = CpuFeature.feature_set_fns(Feature).featureSet;
-+pub const featureSetHas = CpuFeature.feature_set_fns(Feature).featureSetHas;
-+pub const featureSetHasAny = CpuFeature.feature_set_fns(Feature).featureSetHasAny;
-+pub const featureSetHasAll = CpuFeature.feature_set_fns(Feature).featureSetHasAll;
-+
-+pub const all_features = blk: {
-+ const len = @typeInfo(Feature).Enum.fields.len;
-+ std.debug.assert(len <= CpuFeature.Set.needed_bit_count);
-+ var result: [len]CpuFeature = undefined;
-+ result[@enumToInt(Feature.norm)] = .{
-+ .llvm_name = "norm",
-+ .description = "Enable support for norm instruction.",
-+ .dependencies = featureSet(&[_]Feature{}),
-+ };
-+ const ti = @typeInfo(Feature);
-+ for (result) |*elem, i| {
-+ elem.index = i;
-+ elem.name = ti.Enum.fields[i].name;
-+ }
-+ break :blk result;
-+};
-+
-+pub const cpu = struct {
-+ pub const generic = CpuModel{
-+ .name = "generic",
-+ .llvm_name = "generic",
-+ .features = featureSet(&[_]Feature{}),
-+ };
-+};
-diff --git a/lib/std/target/arm.zig b/lib/std/target/arm.zig
-index ecd08f286..839b73088 100644
---- a/lib/std/target/arm.zig
-+++ b/lib/std/target/arm.zig
-@@ -51,6 +51,7 @@ pub const Feature = enum {
- fuse_aes,
- fuse_literals,
- harden_sls_blr,
-+ harden_sls_nocomdat,
- harden_sls_retbr,
- has_v4t,
- has_v5t,
-@@ -484,6 +485,11 @@ pub const all_features = blk: {
- .description = "Harden against straight line speculation across indirect calls",
- .dependencies = featureSet(&[_]Feature{}),
- };
-+ result[@enumToInt(Feature.harden_sls_nocomdat)] = .{
-+ .llvm_name = "harden-sls-nocomdat",
-+ .description = "Generate thunk code for SLS mitigation in the normal text section",
-+ .dependencies = featureSet(&[_]Feature{}),
-+ };
- result[@enumToInt(Feature.harden_sls_retbr)] = .{
- .llvm_name = "harden-sls-retbr",
- .description = "Harden against straight line speculation across RETurn and BranchRegister instructions",
-@@ -1242,7 +1248,7 @@ pub const all_features = blk: {
- };
- result[@enumToInt(Feature.v8_7a)] = .{
- .llvm_name = "armv8.7-a",
-- .description = "ARMv86a architecture",
-+ .description = "ARMv87a architecture",
- .dependencies = featureSet(&[_]Feature{
- .aclass,
- .crc,
-@@ -1514,13 +1520,6 @@ pub const cpu = struct {
- .vfp2,
- }),
- };
-- pub const arm1176j_s = CpuModel{
-- .name = "arm1176j_s",
-- .llvm_name = "arm1176j-s",
-- .features = featureSet(&[_]Feature{
-- .v6kz,
-- }),
-- };
- pub const arm1176jz_s = CpuModel{
- .name = "arm1176jz_s",
- .llvm_name = "arm1176jz-s",
-@@ -1886,6 +1885,7 @@ pub const cpu = struct {
- .name = "cortex_m0",
- .llvm_name = "cortex-m0",
- .features = featureSet(&[_]Feature{
-+ .no_branch_predictor,
- .v6m,
- }),
- };
-@@ -1893,6 +1893,7 @@ pub const cpu = struct {
- .name = "cortex_m0plus",
- .llvm_name = "cortex-m0plus",
- .features = featureSet(&[_]Feature{
-+ .no_branch_predictor,
- .v6m,
- }),
- };
-@@ -1900,6 +1901,7 @@ pub const cpu = struct {
- .name = "cortex_m1",
- .llvm_name = "cortex-m1",
- .features = featureSet(&[_]Feature{
-+ .no_branch_predictor,
- .v6m,
- }),
- };
-@@ -1907,6 +1909,7 @@ pub const cpu = struct {
- .name = "cortex_m23",
- .llvm_name = "cortex-m23",
- .features = featureSet(&[_]Feature{
-+ .no_branch_predictor,
- .no_movt,
- .v8m,
- }),
-@@ -2222,6 +2225,7 @@ pub const cpu = struct {
- .name = "sc000",
- .llvm_name = "sc000",
- .features = featureSet(&[_]Feature{
-+ .no_branch_predictor,
- .v6m,
- }),
- };
-diff --git a/lib/std/target/hexagon.zig b/lib/std/target/hexagon.zig
-index aa8d8f6ef..c6dc7d4e6 100644
---- a/lib/std/target/hexagon.zig
-+++ b/lib/std/target/hexagon.zig
-@@ -16,6 +16,7 @@ pub const Feature = enum {
- hvxv65,
- hvxv66,
- hvxv67,
-+ hvxv68,
- long_calls,
- mem_noshuf,
- memops,
-@@ -35,6 +36,7 @@ pub const Feature = enum {
- v65,
- v66,
- v67,
-+ v68,
- zreg,
- };
-
-@@ -114,6 +116,13 @@ pub const all_features = blk: {
- .hvxv66,
- }),
- };
-+ result[@enumToInt(Feature.hvxv68)] = .{
-+ .llvm_name = "hvxv68",
-+ .description = "Hexagon HVX instructions",
-+ .dependencies = featureSet(&[_]Feature{
-+ .hvxv67,
-+ }),
-+ };
- result[@enumToInt(Feature.long_calls)] = .{
- .llvm_name = "long-calls",
- .description = "Use constant-extended calls",
-@@ -213,6 +222,11 @@ pub const all_features = blk: {
- .description = "Enable Hexagon V67 architecture",
- .dependencies = featureSet(&[_]Feature{}),
- };
-+ result[@enumToInt(Feature.v68)] = .{
-+ .llvm_name = "v68",
-+ .description = "Enable Hexagon V68 architecture",
-+ .dependencies = featureSet(&[_]Feature{}),
-+ };
- result[@enumToInt(Feature.zreg)] = .{
- .llvm_name = "zreg",
- .description = "Hexagon ZReg extension instructions",
-@@ -382,4 +396,25 @@ pub const cpu = struct {
- .v67,
- }),
- };
-+ pub const hexagonv68 = CpuModel{
-+ .name = "hexagonv68",
-+ .llvm_name = "hexagonv68",
-+ .features = featureSet(&[_]Feature{
-+ .compound,
-+ .duplex,
-+ .mem_noshuf,
-+ .memops,
-+ .nvj,
-+ .nvs,
-+ .small_data,
-+ .v5,
-+ .v55,
-+ .v60,
-+ .v62,
-+ .v65,
-+ .v66,
-+ .v67,
-+ .v68,
-+ }),
-+ };
- };
-diff --git a/lib/std/target/nvptx.zig b/lib/std/target/nvptx.zig
-index 6b9b9bf77..92efed69c 100644
---- a/lib/std/target/nvptx.zig
-+++ b/lib/std/target/nvptx.zig
-@@ -17,6 +17,8 @@ pub const Feature = enum {
- ptx64,
- ptx65,
- ptx70,
-+ ptx71,
-+ ptx72,
- sm_20,
- sm_21,
- sm_30,
-@@ -33,6 +35,7 @@ pub const Feature = enum {
- sm_72,
- sm_75,
- sm_80,
-+ sm_86,
- };
-
- pub usingnamespace CpuFeature.feature_set_fns(Feature);
-@@ -101,6 +104,16 @@ pub const all_features = blk: {
- .description = "Use PTX version 7.0",
- .dependencies = featureSet(&[_]Feature{}),
- };
-+ result[@enumToInt(Feature.ptx71)] = .{
-+ .llvm_name = "ptx71",
-+ .description = "Use PTX version 7.1",
-+ .dependencies = featureSet(&[_]Feature{}),
-+ };
-+ result[@enumToInt(Feature.ptx72)] = .{
-+ .llvm_name = "ptx72",
-+ .description = "Use PTX version 7.2",
-+ .dependencies = featureSet(&[_]Feature{}),
-+ };
- result[@enumToInt(Feature.sm_20)] = .{
- .llvm_name = "sm_20",
- .description = "Target SM 2.0",
-@@ -181,6 +194,11 @@ pub const all_features = blk: {
- .description = "Target SM 8.0",
- .dependencies = featureSet(&[_]Feature{}),
- };
-+ result[@enumToInt(Feature.sm_86)] = .{
-+ .llvm_name = "sm_86",
-+ .description = "Target SM 8.6",
-+ .dependencies = featureSet(&[_]Feature{}),
-+ };
- const ti = @typeInfo(Feature);
- for (result) |*elem, i| {
- elem.index = i;
-@@ -314,4 +332,12 @@ pub const cpu = struct {
- .sm_80,
- }),
- };
-+ pub const sm_86 = CpuModel{
-+ .name = "sm_86",
-+ .llvm_name = "sm_86",
-+ .features = featureSet(&[_]Feature{
-+ .ptx71,
-+ .sm_86,
-+ }),
-+ };
- };
-diff --git a/lib/std/target/powerpc.zig b/lib/std/target/powerpc.zig
-index db4d5dccd..3f76d5877 100644
---- a/lib/std/target/powerpc.zig
-+++ b/lib/std/target/powerpc.zig
-@@ -37,6 +37,7 @@ pub const Feature = enum {
- htm,
- icbt,
- invariant_function_descriptors,
-+ isa_v207_instructions,
- isa_v30_instructions,
- isa_v31_instructions,
- isel,
-@@ -62,7 +63,10 @@ pub const Feature = enum {
- ppc_prera_sched,
- predictable_select_expensive,
- prefix_instrs,
-+ privileged,
-+ quadword_atomics,
- recipprec,
-+ rop_protect,
- secure_plt,
- slow_popcntd,
- spe,
-@@ -274,10 +278,17 @@ pub const all_features = blk: {
- .description = "Assume function descriptors are invariant",
- .dependencies = featureSet(&[_]Feature{}),
- };
-+ result[@enumToInt(Feature.isa_v207_instructions)] = .{
-+ .llvm_name = "isa-v207-instructions",
-+ .description = "Enable instructions in ISA 2.07.",
-+ .dependencies = featureSet(&[_]Feature{}),
-+ };
- result[@enumToInt(Feature.isa_v30_instructions)] = .{
- .llvm_name = "isa-v30-instructions",
- .description = "Enable instructions in ISA 3.0.",
-- .dependencies = featureSet(&[_]Feature{}),
-+ .dependencies = featureSet(&[_]Feature{
-+ .isa_v207_instructions,
-+ }),
- };
- result[@enumToInt(Feature.isa_v31_instructions)] = .{
- .llvm_name = "isa-v31-instructions",
-@@ -430,11 +441,26 @@ pub const all_features = blk: {
- .power9_altivec,
- }),
- };
-+ result[@enumToInt(Feature.privileged)] = .{
-+ .llvm_name = "privileged",
-+ .description = "Add privileged instructions",
-+ .dependencies = featureSet(&[_]Feature{}),
-+ };
-+ result[@enumToInt(Feature.quadword_atomics)] = .{
-+ .llvm_name = "quadword-atomics",
-+ .description = "Enable lqarx and stqcx.",
-+ .dependencies = featureSet(&[_]Feature{}),
-+ };
- result[@enumToInt(Feature.recipprec)] = .{
- .llvm_name = "recipprec",
- .description = "Assume higher precision reciprocal estimates",
- .dependencies = featureSet(&[_]Feature{}),
- };
-+ result[@enumToInt(Feature.rop_protect)] = .{
-+ .llvm_name = "rop-protect",
-+ .description = "Add ROP protect",
-+ .dependencies = featureSet(&[_]Feature{}),
-+ };
- result[@enumToInt(Feature.secure_plt)] = .{
- .llvm_name = "secure-plt",
- .description = "Enable secure plt mode",
-@@ -693,6 +719,7 @@ pub const cpu = struct {
- .ppc_postra_sched,
- .ppc_prera_sched,
- .predictable_select_expensive,
-+ .quadword_atomics,
- .recipprec,
- .stfiwx,
- .two_const_nr,
-@@ -787,6 +814,7 @@ pub const cpu = struct {
- .fuse_addis_load,
- .htm,
- .icbt,
-+ .isa_v207_instructions,
- .isel,
- .ldbrx,
- .lfiwax,
-@@ -795,6 +823,7 @@ pub const cpu = struct {
- .popcntd,
- .power8_vector,
- .predictable_select_expensive,
-+ .quadword_atomics,
- .recipprec,
- .stfiwx,
- .two_const_nr,
-@@ -834,6 +863,7 @@ pub const cpu = struct {
- .ppc_postra_sched,
- .ppc_prera_sched,
- .predictable_select_expensive,
-+ .quadword_atomics,
- .recipprec,
- .stfiwx,
- .two_const_nr,
-@@ -986,6 +1016,7 @@ pub const cpu = struct {
- .fuse_addis_load,
- .htm,
- .icbt,
-+ .isa_v207_instructions,
- .isel,
- .ldbrx,
- .lfiwax,
-@@ -994,6 +1025,7 @@ pub const cpu = struct {
- .popcntd,
- .power8_vector,
- .predictable_select_expensive,
-+ .quadword_atomics,
- .recipprec,
- .stfiwx,
- .two_const_nr,
-@@ -1030,6 +1062,7 @@ pub const cpu = struct {
- .ppc_postra_sched,
- .ppc_prera_sched,
- .predictable_select_expensive,
-+ .quadword_atomics,
- .recipprec,
- .stfiwx,
- .two_const_nr,
-diff --git a/lib/std/target/riscv.zig b/lib/std/target/riscv.zig
-index 5b19a936c..7869adfa6 100644
---- a/lib/std/target/riscv.zig
-+++ b/lib/std/target/riscv.zig
-@@ -182,7 +182,7 @@ pub const all_features = blk: {
- };
- result[@enumToInt(Feature.experimental_zvamo)] = .{
- .llvm_name = "experimental-zvamo",
-- .description = "'Zvamo'(Vector AMO Operations)",
-+ .description = "'Zvamo' (Vector AMO Operations)",
- .dependencies = featureSet(&[_]Feature{
- .experimental_v,
- }),
-diff --git a/lib/std/target/systemz.zig b/lib/std/target/systemz.zig
-index 65c53984e..c15390648 100644
---- a/lib/std/target/systemz.zig
-+++ b/lib/std/target/systemz.zig
-@@ -5,6 +5,7 @@ const CpuFeature = std.Target.Cpu.Feature;
- const CpuModel = std.Target.Cpu.Model;
-
- pub const Feature = enum {
-+ bear_enhancement,
- deflate_conversion,
- dfp_packed_conversion,
- dfp_zoned_conversion,
-@@ -31,8 +32,11 @@ pub const Feature = enum {
- miscellaneous_extensions,
- miscellaneous_extensions_2,
- miscellaneous_extensions_3,
-+ nnp_assist,
- population_count,
-+ processor_activity_instrumentation,
- processor_assist,
-+ reset_dat_protection,
- reset_reference_bits_multiple,
- soft_float,
- transactional_execution,
-@@ -41,6 +45,7 @@ pub const Feature = enum {
- vector_enhancements_2,
- vector_packed_decimal,
- vector_packed_decimal_enhancement,
-+ vector_packed_decimal_enhancement_2,
- };
-
- pub usingnamespace CpuFeature.feature_set_fns(Feature);
-@@ -49,6 +54,11 @@ pub const all_features = blk: {
- const len = @typeInfo(Feature).Enum.fields.len;
- std.debug.assert(len <= CpuFeature.Set.needed_bit_count);
- var result: [len]CpuFeature = undefined;
-+ result[@enumToInt(Feature.bear_enhancement)] = .{
-+ .llvm_name = "bear-enhancement",
-+ .description = "Assume that the BEAR-enhancement facility is installed",
-+ .dependencies = featureSet(&[_]Feature{}),
-+ };
- result[@enumToInt(Feature.deflate_conversion)] = .{
- .llvm_name = "deflate-conversion",
- .description = "Assume that the deflate-conversion facility is installed",
-@@ -179,16 +189,31 @@ pub const all_features = blk: {
- .description = "Assume that the miscellaneous-extensions facility 3 is installed",
- .dependencies = featureSet(&[_]Feature{}),
- };
-+ result[@enumToInt(Feature.nnp_assist)] = .{
-+ .llvm_name = "nnp-assist",
-+ .description = "Assume that the NNP-assist facility is installed",
-+ .dependencies = featureSet(&[_]Feature{}),
-+ };
- result[@enumToInt(Feature.population_count)] = .{
- .llvm_name = "population-count",
- .description = "Assume that the population-count facility is installed",
- .dependencies = featureSet(&[_]Feature{}),
- };
-+ result[@enumToInt(Feature.processor_activity_instrumentation)] = .{
-+ .llvm_name = "processor-activity-instrumentation",
-+ .description = "Assume that the processor-activity-instrumentation facility is installed",
-+ .dependencies = featureSet(&[_]Feature{}),
-+ };
- result[@enumToInt(Feature.processor_assist)] = .{
- .llvm_name = "processor-assist",
- .description = "Assume that the processor-assist facility is installed",
- .dependencies = featureSet(&[_]Feature{}),
- };
-+ result[@enumToInt(Feature.reset_dat_protection)] = .{
-+ .llvm_name = "reset-dat-protection",
-+ .description = "Assume that the reset-DAT-protection facility is installed",
-+ .dependencies = featureSet(&[_]Feature{}),
-+ };
- result[@enumToInt(Feature.reset_reference_bits_multiple)] = .{
- .llvm_name = "reset-reference-bits-multiple",
- .description = "Assume that the reset-reference-bits-multiple facility is installed",
-@@ -229,6 +254,11 @@ pub const all_features = blk: {
- .description = "Assume that the vector packed decimal enhancement facility is installed",
- .dependencies = featureSet(&[_]Feature{}),
- };
-+ result[@enumToInt(Feature.vector_packed_decimal_enhancement_2)] = .{
-+ .llvm_name = "vector-packed-decimal-enhancement-2",
-+ .description = "Assume that the vector packed decimal enhancement facility 2 is installed",
-+ .dependencies = featureSet(&[_]Feature{}),
-+ };
- const ti = @typeInfo(Feature);
- for (result) |*elem, i| {
- elem.index = i;
-@@ -365,6 +395,52 @@ pub const cpu = struct {
- .vector_packed_decimal_enhancement,
- }),
- };
-+ pub const arch14 = CpuModel{
-+ .name = "arch14",
-+ .llvm_name = "arch14",
-+ .features = featureSet(&[_]Feature{
-+ .bear_enhancement,
-+ .deflate_conversion,
-+ .dfp_packed_conversion,
-+ .dfp_zoned_conversion,
-+ .distinct_ops,
-+ .enhanced_dat_2,
-+ .enhanced_sort,
-+ .execution_hint,
-+ .fast_serialization,
-+ .fp_extension,
-+ .guarded_storage,
-+ .high_word,
-+ .insert_reference_bits_multiple,
-+ .interlocked_access1,
-+ .load_and_trap,
-+ .load_and_zero_rightmost_byte,
-+ .load_store_on_cond,
-+ .load_store_on_cond_2,
-+ .message_security_assist_extension3,
-+ .message_security_assist_extension4,
-+ .message_security_assist_extension5,
-+ .message_security_assist_extension7,
-+ .message_security_assist_extension8,
-+ .message_security_assist_extension9,
-+ .miscellaneous_extensions,
-+ .miscellaneous_extensions_2,
-+ .miscellaneous_extensions_3,
-+ .nnp_assist,
-+ .population_count,
-+ .processor_activity_instrumentation,
-+ .processor_assist,
-+ .reset_dat_protection,
-+ .reset_reference_bits_multiple,
-+ .transactional_execution,
-+ .vector,
-+ .vector_enhancements_1,
-+ .vector_enhancements_2,
-+ .vector_packed_decimal,
-+ .vector_packed_decimal_enhancement,
-+ .vector_packed_decimal_enhancement_2,
-+ }),
-+ };
- pub const arch8 = CpuModel{
- .name = "arch8",
- .llvm_name = "arch8",
-diff --git a/lib/std/target/wasm.zig b/lib/std/target/wasm.zig
-index 4714125f3..ad02d1030 100644
---- a/lib/std/target/wasm.zig
-+++ b/lib/std/target/wasm.zig
-@@ -15,7 +15,6 @@ pub const Feature = enum {
- sign_ext,
- simd128,
- tail_call,
-- unimplemented_simd128,
- };
-
- pub usingnamespace CpuFeature.feature_set_fns(Feature);
-@@ -74,13 +73,6 @@ pub const all_features = blk: {
- .description = "Enable tail call instructions",
- .dependencies = featureSet(&[_]Feature{}),
- };
-- result[@enumToInt(Feature.unimplemented_simd128)] = .{
-- .llvm_name = "unimplemented-simd128",
-- .description = "Enable 128-bit SIMD not yet implemented in engines",
-- .dependencies = featureSet(&[_]Feature{
-- .simd128,
-- }),
-- };
- const ti = @typeInfo(Feature);
- for (result) |*elem, i| {
- elem.index = i;
-diff --git a/lib/std/target/x86.zig b/lib/std/target/x86.zig
-index 0ca087ab0..1898b2ac3 100644
---- a/lib/std/target/x86.zig
-+++ b/lib/std/target/x86.zig
-@@ -55,10 +55,12 @@ pub const Feature = enum {
- fast_gather,
- fast_hops,
- fast_lzcnt,
-+ fast_movbe,
- fast_scalar_fsqrt,
- fast_scalar_shift_masks,
- fast_shld_rotate,
-- fast_variable_shuffle,
-+ fast_variable_crosslane_shuffle,
-+ fast_variable_perlane_shuffle,
- fast_vector_fsqrt,
- fast_vector_shift_masks,
- fma,
-@@ -455,6 +457,11 @@ pub const all_features = blk: {
- .description = "LZCNT instructions are as fast as most simple integer ops",
- .dependencies = featureSet(&[_]Feature{}),
- };
-+ result[@enumToInt(Feature.fast_movbe)] = .{
-+ .llvm_name = "fast-movbe",
-+ .description = "Prefer a movbe over a single-use load + bswap / single-use bswap + store",
-+ .dependencies = featureSet(&[_]Feature{}),
-+ };
- result[@enumToInt(Feature.fast_scalar_fsqrt)] = .{
- .llvm_name = "fast-scalar-fsqrt",
- .description = "Scalar SQRT is fast (disable Newton-Raphson)",
-@@ -470,9 +477,14 @@ pub const all_features = blk: {
- .description = "SHLD can be used as a faster rotate",
- .dependencies = featureSet(&[_]Feature{}),
- };
-- result[@enumToInt(Feature.fast_variable_shuffle)] = .{
-- .llvm_name = "fast-variable-shuffle",
-- .description = "Shuffles with variable masks are fast",
-+ result[@enumToInt(Feature.fast_variable_crosslane_shuffle)] = .{
-+ .llvm_name = "fast-variable-crosslane-shuffle",
-+ .description = "Cross-lane shuffles with variable masks are fast",
-+ .dependencies = featureSet(&[_]Feature{}),
-+ };
-+ result[@enumToInt(Feature.fast_variable_perlane_shuffle)] = .{
-+ .llvm_name = "fast-variable-perlane-shuffle",
-+ .description = "Per-lane shuffles with variable masks are fast",
- .dependencies = featureSet(&[_]Feature{}),
- };
- result[@enumToInt(Feature.fast_vector_fsqrt)] = .{
-@@ -1007,26 +1019,27 @@ pub const cpu = struct {
- .features = featureSet(&[_]Feature{
- .@"64bit",
- .adx,
-- .aes,
- .avxvnni,
- .bmi,
- .bmi2,
- .cldemote,
- .clflushopt,
-+ .clwb,
- .cmov,
- .cx16,
-- .ermsb,
- .f16c,
- .false_deps_popcnt,
- .fast_15bytenop,
- .fast_gather,
- .fast_scalar_fsqrt,
- .fast_shld_rotate,
-- .fast_variable_shuffle,
-+ .fast_variable_crosslane_shuffle,
-+ .fast_variable_perlane_shuffle,
- .fast_vector_fsqrt,
- .fma,
- .fsgsbase,
- .fxsr,
-+ .gfni,
- .hreset,
- .idivq_to_divl,
- .invpcid,
-@@ -1034,19 +1047,27 @@ pub const cpu = struct {
- .macrofusion,
- .mmx,
- .movbe,
-+ .movdir64b,
-+ .movdiri,
- .nopl,
-- .pclmul,
-+ .pconfig,
-+ .pku,
- .popcnt,
- .prfchw,
- .ptwrite,
-+ .rdpid,
- .rdrnd,
- .rdseed,
- .sahf,
- .serialize,
-- .sgx,
-+ .sha,
-+ .shstk,
- .slow_3ops_lea,
-+ .vaes,
-+ .vpclmulqdq,
- .vzeroupper,
- .waitpkg,
-+ .widekl,
- .x87,
- .xsavec,
- .xsaveopt,
-@@ -1289,6 +1310,7 @@ pub const cpu = struct {
- .f16c,
- .fast_11bytenop,
- .fast_bextr,
-+ .fast_movbe,
- .fast_scalar_shift_masks,
- .fma,
- .fxsr,
-@@ -1321,6 +1343,7 @@ pub const cpu = struct {
- .f16c,
- .fast_11bytenop,
- .fast_bextr,
-+ .fast_movbe,
- .fast_scalar_shift_masks,
- .fma,
- .fsgsbase,
-@@ -1356,6 +1379,7 @@ pub const cpu = struct {
- .f16c,
- .fast_11bytenop,
- .fast_bextr,
-+ .fast_movbe,
- .fast_scalar_shift_masks,
- .fma,
- .fsgsbase,
-@@ -1421,7 +1445,8 @@ pub const cpu = struct {
- .fast_15bytenop,
- .fast_scalar_fsqrt,
- .fast_shld_rotate,
-- .fast_variable_shuffle,
-+ .fast_variable_crosslane_shuffle,
-+ .fast_variable_perlane_shuffle,
- .fma,
- .fsgsbase,
- .fxsr,
-@@ -1482,6 +1507,7 @@ pub const cpu = struct {
- .fast_bextr,
- .fast_hops,
- .fast_lzcnt,
-+ .fast_movbe,
- .fast_scalar_shift_masks,
- .fast_vector_shift_masks,
- .fxsr,
-@@ -1545,7 +1571,8 @@ pub const cpu = struct {
- .fast_gather,
- .fast_scalar_fsqrt,
- .fast_shld_rotate,
-- .fast_variable_shuffle,
-+ .fast_variable_crosslane_shuffle,
-+ .fast_variable_perlane_shuffle,
- .fast_vector_fsqrt,
- .fsgsbase,
- .fxsr,
-@@ -1564,7 +1591,6 @@ pub const cpu = struct {
- .rdrnd,
- .rdseed,
- .sahf,
-- .sgx,
- .sha,
- .slow_3ops_lea,
- .vzeroupper,
-@@ -1598,7 +1624,8 @@ pub const cpu = struct {
- .fast_gather,
- .fast_scalar_fsqrt,
- .fast_shld_rotate,
-- .fast_variable_shuffle,
-+ .fast_variable_crosslane_shuffle,
-+ .fast_variable_perlane_shuffle,
- .fast_vector_fsqrt,
- .fsgsbase,
- .fxsr,
-@@ -1649,7 +1676,8 @@ pub const cpu = struct {
- .fast_gather,
- .fast_scalar_fsqrt,
- .fast_shld_rotate,
-- .fast_variable_shuffle,
-+ .fast_variable_crosslane_shuffle,
-+ .fast_variable_perlane_shuffle,
- .fast_vector_fsqrt,
- .fsgsbase,
- .fxsr,
-@@ -1711,7 +1739,8 @@ pub const cpu = struct {
- .fast_15bytenop,
- .fast_scalar_fsqrt,
- .fast_shld_rotate,
-- .fast_variable_shuffle,
-+ .fast_variable_crosslane_shuffle,
-+ .fast_variable_perlane_shuffle,
- .fma,
- .fsgsbase,
- .fxsr,
-@@ -1841,6 +1870,7 @@ pub const cpu = struct {
- .cmov,
- .cx16,
- .false_deps_popcnt,
-+ .fast_movbe,
- .fsgsbase,
- .fxsr,
- .mmx,
-@@ -1874,6 +1904,7 @@ pub const cpu = struct {
- .clflushopt,
- .cmov,
- .cx16,
-+ .fast_movbe,
- .fsgsbase,
- .fxsr,
- .mmx,
-@@ -1887,7 +1918,6 @@ pub const cpu = struct {
- .rdrnd,
- .rdseed,
- .sahf,
-- .sgx,
- .sha,
- .slow_incdec,
- .slow_lea,
-@@ -1918,7 +1948,8 @@ pub const cpu = struct {
- .fast_15bytenop,
- .fast_scalar_fsqrt,
- .fast_shld_rotate,
-- .fast_variable_shuffle,
-+ .fast_variable_crosslane_shuffle,
-+ .fast_variable_perlane_shuffle,
- .fma,
- .fsgsbase,
- .fxsr,
-@@ -1957,7 +1988,6 @@ pub const cpu = struct {
- .bmi,
- .bmi2,
- .clflushopt,
-- .clwb,
- .cmov,
- .cx16,
- .ermsb,
-@@ -1965,7 +1995,8 @@ pub const cpu = struct {
- .fast_gather,
- .fast_scalar_fsqrt,
- .fast_shld_rotate,
-- .fast_variable_shuffle,
-+ .fast_variable_crosslane_shuffle,
-+ .fast_variable_perlane_shuffle,
- .fast_vector_fsqrt,
- .fsgsbase,
- .fsrm,
-@@ -1986,7 +2017,6 @@ pub const cpu = struct {
- .rdrnd,
- .rdseed,
- .sahf,
-- .sgx,
- .sha,
- .slow_3ops_lea,
- .vaes,
-@@ -2024,7 +2054,8 @@ pub const cpu = struct {
- .fast_gather,
- .fast_scalar_fsqrt,
- .fast_shld_rotate,
-- .fast_variable_shuffle,
-+ .fast_variable_crosslane_shuffle,
-+ .fast_variable_perlane_shuffle,
- .fast_vector_fsqrt,
- .fsgsbase,
- .fsrm,
-@@ -2046,7 +2077,6 @@ pub const cpu = struct {
- .rdrnd,
- .rdseed,
- .sahf,
-- .sgx,
- .sha,
- .slow_3ops_lea,
- .vaes,
-@@ -2172,6 +2202,7 @@ pub const cpu = struct {
- .cmov,
- .cx16,
- .fast_gather,
-+ .fast_movbe,
- .fsgsbase,
- .fxsr,
- .idivq_to_divl,
-@@ -2211,6 +2242,7 @@ pub const cpu = struct {
- .cmov,
- .cx16,
- .fast_gather,
-+ .fast_movbe,
- .fsgsbase,
- .fxsr,
- .idivq_to_divl,
-@@ -2469,6 +2501,64 @@ pub const cpu = struct {
- .x87,
- }),
- };
-+ pub const rocketlake = CpuModel{
-+ .name = "rocketlake",
-+ .llvm_name = "rocketlake",
-+ .features = featureSet(&[_]Feature{
-+ .@"64bit",
-+ .adx,
-+ .avx512bitalg,
-+ .avx512cd,
-+ .avx512dq,
-+ .avx512ifma,
-+ .avx512vbmi,
-+ .avx512vbmi2,
-+ .avx512vl,
-+ .avx512vnni,
-+ .avx512vpopcntdq,
-+ .bmi,
-+ .bmi2,
-+ .clflushopt,
-+ .cmov,
-+ .cx16,
-+ .ermsb,
-+ .fast_15bytenop,
-+ .fast_gather,
-+ .fast_scalar_fsqrt,
-+ .fast_shld_rotate,
-+ .fast_variable_crosslane_shuffle,
-+ .fast_variable_perlane_shuffle,
-+ .fast_vector_fsqrt,
-+ .fsgsbase,
-+ .fsrm,
-+ .fxsr,
-+ .gfni,
-+ .idivq_to_divl,
-+ .invpcid,
-+ .lzcnt,
-+ .macrofusion,
-+ .mmx,
-+ .movbe,
-+ .nopl,
-+ .pku,
-+ .popcnt,
-+ .prefer_256_bit,
-+ .prfchw,
-+ .rdpid,
-+ .rdrnd,
-+ .rdseed,
-+ .sahf,
-+ .sha,
-+ .slow_3ops_lea,
-+ .vaes,
-+ .vpclmulqdq,
-+ .vzeroupper,
-+ .x87,
-+ .xsavec,
-+ .xsaveopt,
-+ .xsaves,
-+ }),
-+ };
- pub const sandybridge = CpuModel{
- .name = "sandybridge",
- .llvm_name = "sandybridge",
-@@ -2529,7 +2619,8 @@ pub const cpu = struct {
- .fast_gather,
- .fast_scalar_fsqrt,
- .fast_shld_rotate,
-- .fast_variable_shuffle,
-+ .fast_variable_crosslane_shuffle,
-+ .fast_variable_perlane_shuffle,
- .fast_vector_fsqrt,
- .fsgsbase,
- .fsrm,
-@@ -2555,7 +2646,6 @@ pub const cpu = struct {
- .rdseed,
- .sahf,
- .serialize,
-- .sgx,
- .sha,
- .shstk,
- .slow_3ops_lea,
-@@ -2581,6 +2671,7 @@ pub const cpu = struct {
- .cx16,
- .false_deps_popcnt,
- .fast_7bytenop,
-+ .fast_movbe,
- .fxsr,
- .idivq_to_divl,
- .mmx,
-@@ -2623,7 +2714,8 @@ pub const cpu = struct {
- .fast_gather,
- .fast_scalar_fsqrt,
- .fast_shld_rotate,
-- .fast_variable_shuffle,
-+ .fast_variable_crosslane_shuffle,
-+ .fast_variable_perlane_shuffle,
- .fast_vector_fsqrt,
- .fsgsbase,
- .fxsr,
-@@ -2670,7 +2762,8 @@ pub const cpu = struct {
- .fast_gather,
- .fast_scalar_fsqrt,
- .fast_shld_rotate,
-- .fast_variable_shuffle,
-+ .fast_variable_crosslane_shuffle,
-+ .fast_variable_perlane_shuffle,
- .fast_vector_fsqrt,
- .fma,
- .fsgsbase,
-@@ -2688,7 +2781,6 @@ pub const cpu = struct {
- .rdrnd,
- .rdseed,
- .sahf,
-- .sgx,
- .slow_3ops_lea,
- .vzeroupper,
- .x87,
-@@ -2720,7 +2812,8 @@ pub const cpu = struct {
- .fast_gather,
- .fast_scalar_fsqrt,
- .fast_shld_rotate,
-- .fast_variable_shuffle,
-+ .fast_variable_crosslane_shuffle,
-+ .fast_variable_perlane_shuffle,
- .fast_vector_fsqrt,
- .fsgsbase,
- .fxsr,
-@@ -2756,6 +2849,7 @@ pub const cpu = struct {
- .cx16,
- .false_deps_popcnt,
- .fast_7bytenop,
-+ .fast_movbe,
- .fxsr,
- .idivq_to_divl,
- .mmx,
-@@ -2802,7 +2896,8 @@ pub const cpu = struct {
- .fast_gather,
- .fast_scalar_fsqrt,
- .fast_shld_rotate,
-- .fast_variable_shuffle,
-+ .fast_variable_crosslane_shuffle,
-+ .fast_variable_perlane_shuffle,
- .fast_vector_fsqrt,
- .fsgsbase,
- .fsrm,
-@@ -2825,7 +2920,6 @@ pub const cpu = struct {
- .rdrnd,
- .rdseed,
- .sahf,
-- .sgx,
- .sha,
- .shstk,
- .slow_3ops_lea,
-@@ -2848,6 +2942,7 @@ pub const cpu = struct {
- .clwb,
- .cmov,
- .cx16,
-+ .fast_movbe,
- .fsgsbase,
- .fxsr,
- .gfni,
-@@ -2862,7 +2957,6 @@ pub const cpu = struct {
- .rdrnd,
- .rdseed,
- .sahf,
-- .sgx,
- .sha,
- .slow_incdec,
- .slow_lea,
-@@ -2975,7 +3069,8 @@ pub const cpu = struct {
- .fast_15bytenop,
- .fast_scalar_fsqrt,
- .fast_shld_rotate,
-- .fast_variable_shuffle,
-+ .fast_variable_crosslane_shuffle,
-+ .fast_variable_perlane_shuffle,
- .fma,
- .fxsr,
- .idivq_to_divl,
-@@ -3010,7 +3105,8 @@ pub const cpu = struct {
- .fast_gather,
- .fast_scalar_fsqrt,
- .fast_shld_rotate,
-- .fast_variable_shuffle,
-+ .fast_variable_crosslane_shuffle,
-+ .fast_variable_perlane_shuffle,
- .fast_vector_fsqrt,
- .fxsr,
- .idivq_to_divl,
-@@ -3062,6 +3158,7 @@ pub const cpu = struct {
- .fast_15bytenop,
- .fast_bextr,
- .fast_lzcnt,
-+ .fast_movbe,
- .fast_scalar_shift_masks,
- .fma,
- .fsgsbase,
-@@ -3107,6 +3204,7 @@ pub const cpu = struct {
- .fast_15bytenop,
- .fast_bextr,
- .fast_lzcnt,
-+ .fast_movbe,
- .fast_scalar_shift_masks,
- .fma,
- .fsgsbase,
-@@ -3153,13 +3251,16 @@ pub const cpu = struct {
- .fast_15bytenop,
- .fast_bextr,
- .fast_lzcnt,
-+ .fast_movbe,
- .fast_scalar_shift_masks,
-+ .fast_variable_perlane_shuffle,
- .fma,
- .fsgsbase,
- .fsrm,
- .fxsr,
- .invpcid,
- .lzcnt,
-+ .macrofusion,
- .mmx,
- .movbe,
- .mwaitx,
-diff --git a/tools/update_cpu_features.zig b/tools/update_cpu_features.zig
-index 7fab1e98b..037f88203 100644
---- a/tools/update_cpu_features.zig
-+++ b/tools/update_cpu_features.zig
-@@ -219,7 +219,6 @@ const llvm_targets = [_]LlvmTarget{
- "use_postra_scheduler",
- "use_reciprocal_square_root",
- "v8a",
-- "zcz_fp",
- },
- },
- .{
-@@ -236,7 +235,6 @@ const llvm_targets = [_]LlvmTarget{
- "slow_paired_128",
- "use_postra_scheduler",
- "v8a",
-- "zcz_fp",
- },
- },
- .{
-
-From 91be14d8373777250e762c33e3ee1cf6814ba2f9 Mon Sep 17 00:00:00 2001
-From: Andrew Kelley <andrew at ziglang.org>
-Date: Mon, 16 Aug 2021 01:11:10 -0700
-Subject: [PATCH 4/4] update src/ to LLVM 13 rc1 API
-
-(cherry picked from commit 2f599b655b81004f101773b3b35dc112c0d84b72)
----
- lib/std/target.zig | 7 +
- src/clang.zig | 79 +++++-
- src/codegen/llvm.zig | 2 +
- src/codegen/llvm/bindings.zig | 1 +
- src/stage1/codegen.cpp | 39 +--
- src/stage1/target.cpp | 8 +-
- src/target.zig | 4 +
- src/zig_clang.cpp | 514 ++++++++++++++++++++++------------
- src/zig_clang.h | 79 +++++-
- src/zig_llvm.cpp | 77 +----
- src/zig_llvm.h | 28 +-
- 11 files changed, 538 insertions(+), 300 deletions(-)
-
-diff --git a/lib/std/target.zig b/lib/std/target.zig
-index 8da8499a5..620f75061 100644
---- a/lib/std/target.zig
-+++ b/lib/std/target.zig
-@@ -454,6 +454,7 @@ pub const Target = struct {
- musl,
- musleabi,
- musleabihf,
-+ muslx32,
- msvc,
- itanium,
- cygnus,
-@@ -719,6 +720,7 @@ pub const Target = struct {
- bpfeb,
- csky,
- hexagon,
-+ m68k,
- mips,
- mipsel,
- mips64,
-@@ -854,6 +856,7 @@ pub const Target = struct {
- .arm => ._ARM,
- .armeb => ._ARM,
- .hexagon => ._HEXAGON,
-+ .m68k => ._68K,
- .le32 => ._NONE,
- .mips => ._MIPS,
- .mipsel => ._MIPS_RS3_LE,
-@@ -914,6 +917,7 @@ pub const Target = struct {
- .arm => .ARM,
- .armeb => .Unknown,
- .hexagon => .Unknown,
-+ .m68k => .Unknown,
- .le32 => .Unknown,
- .mips => .Unknown,
- .mipsel => .Unknown,
-@@ -1017,6 +1021,7 @@ pub const Target = struct {
- .armeb,
- .aarch64_be,
- .bpfeb,
-+ .m68k,
- .mips,
- .mips64,
- .powerpc,
-@@ -1043,6 +1048,7 @@ pub const Target = struct {
- .armeb,
- .csky,
- .hexagon,
-+ .m68k,
- .le32,
- .mips,
- .mipsel,
-@@ -1555,6 +1561,7 @@ pub const Target = struct {
- .arc,
- .csky,
- .hexagon,
-+ .m68k,
- .msp430,
- .r600,
- .amdgcn,
-diff --git a/src/clang.zig b/src/clang.zig
-index d91ee91e7..0f0c9307d 100644
---- a/src/clang.zig
-+++ b/src/clang.zig
-@@ -1149,13 +1149,16 @@ const StmtClass = extern enum {
- IndirectGotoStmtClass,
- MSDependentExistsStmtClass,
- NullStmtClass,
-+ OMPCanonicalLoopClass,
- OMPAtomicDirectiveClass,
- OMPBarrierDirectiveClass,
- OMPCancelDirectiveClass,
- OMPCancellationPointDirectiveClass,
- OMPCriticalDirectiveClass,
- OMPDepobjDirectiveClass,
-+ OMPDispatchDirectiveClass,
- OMPFlushDirectiveClass,
-+ OMPInteropDirectiveClass,
- OMPDistributeDirectiveClass,
- OMPDistributeParallelForDirectiveClass,
- OMPDistributeParallelForSimdDirectiveClass,
-@@ -1181,6 +1184,9 @@ const StmtClass = extern enum {
- OMPTeamsDistributeParallelForDirectiveClass,
- OMPTeamsDistributeParallelForSimdDirectiveClass,
- OMPTeamsDistributeSimdDirectiveClass,
-+ OMPTileDirectiveClass,
-+ OMPUnrollDirectiveClass,
-+ OMPMaskedDirectiveClass,
- OMPMasterDirectiveClass,
- OMPOrderedDirectiveClass,
- OMPParallelDirectiveClass,
-@@ -1329,6 +1335,7 @@ const StmtClass = extern enum {
- PseudoObjectExprClass,
- RecoveryExprClass,
- RequiresExprClass,
-+ SYCLUniqueStableNameExprClass,
- ShuffleVectorExprClass,
- SizeOfPackExprClass,
- SourceLocExprClass,
-@@ -1371,6 +1378,7 @@ pub const CK = extern enum {
- PointerToIntegral,
- PointerToBoolean,
- ToVoid,
-+ MatrixCast,
- VectorSplat,
- IntegralCast,
- IntegralToBoolean,
-@@ -1426,6 +1434,8 @@ pub const DeclKind = extern enum {
- Import,
- LifetimeExtendedTemporary,
- LinkageSpec,
-+ Using,
-+ UsingEnum,
- Label,
- Namespace,
- NamespaceAlias,
-@@ -1454,7 +1464,7 @@ pub const DeclKind = extern enum {
- TypeAlias,
- Typedef,
- UnresolvedUsingTypename,
-- Using,
-+ UnresolvedUsingIfExists,
- UsingDirective,
- UsingPack,
- UsingShadow,
-@@ -1596,6 +1606,72 @@ pub const BuiltinTypeKind = extern enum {
- SveBool,
- VectorQuad,
- VectorPair,
-+ RvvInt8mf8,
-+ RvvInt8mf4,
-+ RvvInt8mf2,
-+ RvvInt8m1,
-+ RvvInt8m2,
-+ RvvInt8m4,
-+ RvvInt8m8,
-+ RvvUint8mf8,
-+ RvvUint8mf4,
-+ RvvUint8mf2,
-+ RvvUint8m1,
-+ RvvUint8m2,
-+ RvvUint8m4,
-+ RvvUint8m8,
-+ RvvInt16mf4,
-+ RvvInt16mf2,
-+ RvvInt16m1,
-+ RvvInt16m2,
-+ RvvInt16m4,
-+ RvvInt16m8,
-+ RvvUint16mf4,
-+ RvvUint16mf2,
-+ RvvUint16m1,
-+ RvvUint16m2,
-+ RvvUint16m4,
-+ RvvUint16m8,
-+ RvvInt32mf2,
-+ RvvInt32m1,
-+ RvvInt32m2,
-+ RvvInt32m4,
-+ RvvInt32m8,
-+ RvvUint32mf2,
-+ RvvUint32m1,
-+ RvvUint32m2,
-+ RvvUint32m4,
-+ RvvUint32m8,
-+ RvvInt64m1,
-+ RvvInt64m2,
-+ RvvInt64m4,
-+ RvvInt64m8,
-+ RvvUint64m1,
-+ RvvUint64m2,
-+ RvvUint64m4,
-+ RvvUint64m8,
-+ RvvFloat16mf4,
-+ RvvFloat16mf2,
-+ RvvFloat16m1,
-+ RvvFloat16m2,
-+ RvvFloat16m4,
-+ RvvFloat16m8,
-+ RvvFloat32mf2,
-+ RvvFloat32m1,
-+ RvvFloat32m2,
-+ RvvFloat32m4,
-+ RvvFloat32m8,
-+ RvvFloat64m1,
-+ RvvFloat64m2,
-+ RvvFloat64m4,
-+ RvvFloat64m8,
-+ RvvBool1,
-+ RvvBool2,
-+ RvvBool4,
-+ RvvBool8,
-+ RvvBool16,
-+ RvvBool32,
-+ RvvBool64,
- Void,
- Bool,
- Char_U,
-@@ -1686,6 +1762,7 @@ pub const CallingConv = extern enum {
- SpirFunction,
- OpenCLKernel,
- Swift,
-+ SwiftAsync,
- PreserveMost,
- PreserveAll,
- AArch64VectorCall,
-diff --git a/src/codegen/llvm.zig b/src/codegen/llvm.zig
-index 4e4621ca2..0775d017d 100644
---- a/src/codegen/llvm.zig
-+++ b/src/codegen/llvm.zig
-@@ -30,6 +30,7 @@ pub fn targetTriple(allocator: *Allocator, target: std.Target) ![:0]u8 {
- .bpfeb => "bpfeb",
- .csky => "csky",
- .hexagon => "hexagon",
-+ .m68k => "m68k",
- .mips => "mips",
- .mipsel => "mipsel",
- .mips64 => "mips64",
-@@ -136,6 +137,7 @@ pub fn targetTriple(allocator: *Allocator, target: std.Target) ![:0]u8 {
- .musl => "musl",
- .musleabi => "musleabi",
- .musleabihf => "musleabihf",
-+ .muslx32 => "muslx32",
- .msvc => "msvc",
- .itanium => "itanium",
- .cygnus => "cygnus",
-diff --git a/src/codegen/llvm/bindings.zig b/src/codegen/llvm/bindings.zig
-index 63ac7e86a..87c3443ae 100644
---- a/src/codegen/llvm/bindings.zig
-+++ b/src/codegen/llvm/bindings.zig
-@@ -580,6 +580,7 @@ pub const ArchType = extern enum(c_int) {
- bpfeb,
- csky,
- hexagon,
-+ m68k,
- mips,
- mipsel,
- mips64,
-diff --git a/src/stage1/codegen.cpp b/src/stage1/codegen.cpp
-index 97e9bcf47..ae04903e3 100644
---- a/src/stage1/codegen.cpp
-+++ b/src/stage1/codegen.cpp
-@@ -3860,7 +3860,7 @@ static LLVMValueRef gen_valgrind_client_request(CodeGen *g, LLVMValueRef default
- input_and_output_count, false);
- LLVMValueRef asm_fn = LLVMGetInlineAsm(function_type, buf_ptr(asm_template), buf_len(asm_template),
- buf_ptr(asm_constraints), buf_len(asm_constraints), asm_has_side_effects, asm_is_alignstack,
-- LLVMInlineAsmDialectATT);
-+ LLVMInlineAsmDialectATT, false);
- return LLVMBuildCall(g->builder, asm_fn, param_values, input_and_output_count, "");
- }
- }
-@@ -4965,7 +4965,7 @@ static LLVMValueRef ir_render_asm_gen(CodeGen *g, Stage1Air *executable, IrInstG
-
- bool is_volatile = instruction->has_side_effects || (asm_expr->output_list.length == 0);
- LLVMValueRef asm_fn = LLVMGetInlineAsm(function_type, buf_ptr(&llvm_template), buf_len(&llvm_template),
-- buf_ptr(&constraint_buf), buf_len(&constraint_buf), is_volatile, false, LLVMInlineAsmDialectATT);
-+ buf_ptr(&constraint_buf), buf_len(&constraint_buf), is_volatile, false, LLVMInlineAsmDialectATT, false);
-
- LLVMValueRef built_call = LLVMBuildCall(g->builder, asm_fn, param_values, (unsigned)input_and_output_count, "");
- heap::c_allocator.deallocate(param_values, input_and_output_count);
-@@ -5499,21 +5499,21 @@ static LLVMAtomicOrdering to_LLVMAtomicOrdering(AtomicOrder atomic_order) {
- zig_unreachable();
- }
-
--static enum ZigLLVM_AtomicRMWBinOp to_ZigLLVMAtomicRMWBinOp(AtomicRmwOp op, bool is_signed, bool is_float) {
-+static LLVMAtomicRMWBinOp to_LLVMAtomicRMWBinOp(AtomicRmwOp op, bool is_signed, bool is_float) {
- switch (op) {
-- case AtomicRmwOp_xchg: return ZigLLVMAtomicRMWBinOpXchg;
-+ case AtomicRmwOp_xchg: return LLVMAtomicRMWBinOpXchg;
- case AtomicRmwOp_add:
-- return is_float ? ZigLLVMAtomicRMWBinOpFAdd : ZigLLVMAtomicRMWBinOpAdd;
-+ return is_float ? LLVMAtomicRMWBinOpFAdd : LLVMAtomicRMWBinOpAdd;
- case AtomicRmwOp_sub:
-- return is_float ? ZigLLVMAtomicRMWBinOpFSub : ZigLLVMAtomicRMWBinOpSub;
-- case AtomicRmwOp_and: return ZigLLVMAtomicRMWBinOpAnd;
-- case AtomicRmwOp_nand: return ZigLLVMAtomicRMWBinOpNand;
-- case AtomicRmwOp_or: return ZigLLVMAtomicRMWBinOpOr;
-- case AtomicRmwOp_xor: return ZigLLVMAtomicRMWBinOpXor;
-+ return is_float ? LLVMAtomicRMWBinOpFSub : LLVMAtomicRMWBinOpSub;
-+ case AtomicRmwOp_and: return LLVMAtomicRMWBinOpAnd;
-+ case AtomicRmwOp_nand: return LLVMAtomicRMWBinOpNand;
-+ case AtomicRmwOp_or: return LLVMAtomicRMWBinOpOr;
-+ case AtomicRmwOp_xor: return LLVMAtomicRMWBinOpXor;
- case AtomicRmwOp_max:
-- return is_signed ? ZigLLVMAtomicRMWBinOpMax : ZigLLVMAtomicRMWBinOpUMax;
-+ return is_signed ? LLVMAtomicRMWBinOpMax : LLVMAtomicRMWBinOpUMax;
- case AtomicRmwOp_min:
-- return is_signed ? ZigLLVMAtomicRMWBinOpMin : ZigLLVMAtomicRMWBinOpUMin;
-+ return is_signed ? LLVMAtomicRMWBinOpMin : LLVMAtomicRMWBinOpUMin;
- }
- zig_unreachable();
- }
-@@ -5572,8 +5572,9 @@ static LLVMValueRef ir_render_cmpxchg(CodeGen *g, Stage1Air *executable, IrInstG
- LLVMAtomicOrdering success_order = to_LLVMAtomicOrdering(instruction->success_order);
- LLVMAtomicOrdering failure_order = to_LLVMAtomicOrdering(instruction->failure_order);
-
-- LLVMValueRef result_val = ZigLLVMBuildCmpXchg(g->builder, ptr_val, cmp_val, new_val,
-- success_order, failure_order, instruction->is_weak);
-+ LLVMValueRef result_val = LLVMBuildAtomicCmpXchg(g->builder, ptr_val, cmp_val, new_val,
-+ success_order, failure_order, g->is_single_threaded);
-+ LLVMSetWeak(result_val, instruction->is_weak);
-
- ZigType *optional_type = instruction->base.value->type;
- assert(optional_type->id == ZigTypeIdOptional);
-@@ -6339,13 +6340,13 @@ static LLVMValueRef ir_render_atomic_rmw(CodeGen *g, Stage1Air *executable,
- } else {
- is_signed = false;
- }
-- enum ZigLLVM_AtomicRMWBinOp op = to_ZigLLVMAtomicRMWBinOp(instruction->op, is_signed, is_float);
-+ LLVMAtomicRMWBinOp op = to_LLVMAtomicRMWBinOp(instruction->op, is_signed, is_float);
- LLVMAtomicOrdering ordering = to_LLVMAtomicOrdering(instruction->ordering);
- LLVMValueRef ptr = ir_llvm_value(g, instruction->ptr);
- LLVMValueRef operand = ir_llvm_value(g, instruction->operand);
-
- LLVMTypeRef actual_abi_type = get_atomic_abi_type(g, instruction->ptr,
-- op == ZigLLVMAtomicRMWBinOpXchg);
-+ op == LLVMAtomicRMWBinOpXchg);
- if (actual_abi_type != nullptr) {
- // operand needs widening and truncating or bitcasting.
- LLVMValueRef casted_ptr = LLVMBuildBitCast(g->builder, ptr,
-@@ -6358,7 +6359,7 @@ static LLVMValueRef ir_render_atomic_rmw(CodeGen *g, Stage1Air *executable,
- } else {
- casted_operand = LLVMBuildZExt(g->builder, operand, actual_abi_type, "");
- }
-- LLVMValueRef uncasted_result = ZigLLVMBuildAtomicRMW(g->builder, op, casted_ptr, casted_operand, ordering,
-+ LLVMValueRef uncasted_result = LLVMBuildAtomicRMW(g->builder, op, casted_ptr, casted_operand, ordering,
- g->is_single_threaded);
- if (is_float) {
- return LLVMBuildBitCast(g->builder, uncasted_result, get_llvm_type(g, operand_type), "");
-@@ -6368,14 +6369,14 @@ static LLVMValueRef ir_render_atomic_rmw(CodeGen *g, Stage1Air *executable,
- }
-
- if (get_codegen_ptr_type_bail(g, operand_type) == nullptr) {
-- return ZigLLVMBuildAtomicRMW(g->builder, op, ptr, operand, ordering, g->is_single_threaded);
-+ return LLVMBuildAtomicRMW(g->builder, op, ptr, operand, ordering, g->is_single_threaded);
- }
-
- // it's a pointer but we need to treat it as an int
- LLVMValueRef casted_ptr = LLVMBuildBitCast(g->builder, ptr,
- LLVMPointerType(g->builtin_types.entry_usize->llvm_type, 0), "");
- LLVMValueRef casted_operand = LLVMBuildPtrToInt(g->builder, operand, g->builtin_types.entry_usize->llvm_type, "");
-- LLVMValueRef uncasted_result = ZigLLVMBuildAtomicRMW(g->builder, op, casted_ptr, casted_operand, ordering,
-+ LLVMValueRef uncasted_result = LLVMBuildAtomicRMW(g->builder, op, casted_ptr, casted_operand, ordering,
- g->is_single_threaded);
- return LLVMBuildIntToPtr(g->builder, uncasted_result, get_llvm_type(g, operand_type), "");
- }
-diff --git a/src/stage1/target.cpp b/src/stage1/target.cpp
-index 6bf45ea5e..5c8cd85e0 100644
---- a/src/stage1/target.cpp
-+++ b/src/stage1/target.cpp
-@@ -25,6 +25,7 @@ static const ZigLLVM_ArchType arch_list[] = {
- ZigLLVM_bpfeb, // eBPF or extended BPF or 64-bit BPF (big endian)
- ZigLLVM_csky, // CSKY: csky
- ZigLLVM_hexagon, // Hexagon: hexagon
-+ ZigLLVM_m68k, // M68k: Motorola 680x0 family
- ZigLLVM_mips, // MIPS: mips, mipsallegrex, mipsr6
- ZigLLVM_mipsel, // MIPSEL: mipsel, mipsallegrexe, mipsr6el
- ZigLLVM_mips64, // MIPS64: mips64, mips64r6, mipsn32, mipsn32r6
-@@ -146,6 +147,7 @@ static const ZigLLVM_EnvironmentType abi_list[] = {
- ZigLLVM_Musl,
- ZigLLVM_MuslEABI,
- ZigLLVM_MuslEABIHF,
-+ ZigLLVM_MuslX32,
-
- ZigLLVM_MSVC,
- ZigLLVM_Itanium,
-@@ -493,6 +495,7 @@ uint32_t target_arch_pointer_bit_width(ZigLLVM_ArchType arch) {
- case ZigLLVM_arm:
- case ZigLLVM_armeb:
- case ZigLLVM_hexagon:
-+ case ZigLLVM_m68k:
- case ZigLLVM_le32:
- case ZigLLVM_mips:
- case ZigLLVM_mipsel:
-@@ -560,6 +563,7 @@ uint32_t target_arch_largest_atomic_bits(ZigLLVM_ArchType arch) {
- case ZigLLVM_arm:
- case ZigLLVM_armeb:
- case ZigLLVM_hexagon:
-+ case ZigLLVM_m68k:
- case ZigLLVM_le32:
- case ZigLLVM_mips:
- case ZigLLVM_mipsel:
-@@ -793,6 +797,8 @@ const char *arch_stack_pointer_register_name(ZigLLVM_ArchType arch) {
- case ZigLLVM_aarch64_32:
- case ZigLLVM_riscv32:
- case ZigLLVM_riscv64:
-+ case ZigLLVM_m68k:
-+ case ZigLLVM_mips:
- case ZigLLVM_mipsel:
- case ZigLLVM_ppc:
- case ZigLLVM_ppcle:
-@@ -819,7 +825,6 @@ const char *arch_stack_pointer_register_name(ZigLLVM_ArchType arch) {
- case ZigLLVM_kalimba:
- case ZigLLVM_le32:
- case ZigLLVM_le64:
-- case ZigLLVM_mips:
- case ZigLLVM_mips64:
- case ZigLLVM_mips64el:
- case ZigLLVM_msp430:
-@@ -868,6 +873,7 @@ bool target_is_arm(const ZigTarget *target) {
- case ZigLLVM_bpfel:
- case ZigLLVM_csky:
- case ZigLLVM_hexagon:
-+ case ZigLLVM_m68k:
- case ZigLLVM_lanai:
- case ZigLLVM_hsail:
- case ZigLLVM_hsail64:
-diff --git a/src/target.zig b/src/target.zig
-index c73fe0a45..3f7a6ab1a 100644
---- a/src/target.zig
-+++ b/src/target.zig
-@@ -34,6 +34,8 @@ pub const available_libcs = [_]ArchOsAbi{
- .{ .arch = .i386, .os = .linux, .abi = .gnu },
- .{ .arch = .i386, .os = .linux, .abi = .musl },
- .{ .arch = .i386, .os = .windows, .abi = .gnu },
-+ .{ .arch = .m68k, .os = .linux, .abi = .gnu },
-+ .{ .arch = .m68k, .os = .linux, .abi = .musl },
- .{ .arch = .mips64el, .os = .linux, .abi = .gnuabi64 },
- .{ .arch = .mips64el, .os = .linux, .abi = .gnuabin32 },
- .{ .arch = .mips64el, .os = .linux, .abi = .musl },
-@@ -83,6 +85,7 @@ pub fn libCGenericName(target: std.Target) [:0]const u8 {
- .musl,
- .musleabi,
- .musleabihf,
-+ .muslx32,
- .none,
- => return "musl",
- .code16,
-@@ -228,6 +231,7 @@ pub fn archToLLVM(arch_tag: std.Target.Cpu.Arch) llvm.ArchType {
- .bpfeb => .bpfeb,
- .csky => .csky,
- .hexagon => .hexagon,
-+ .m68k => .m68k,
- .mips => .mips,
- .mipsel => .mipsel,
- .mips64 => .mips64,
-diff --git a/src/zig_clang.cpp b/src/zig_clang.cpp
-index 60cc4ec14..5dd09437c 100644
---- a/src/zig_clang.cpp
-+++ b/src/zig_clang.cpp
-@@ -163,6 +163,10 @@ void ZigClang_detect_enum_CK(clang::CastKind x) {
- case clang::CK_DerivedToBase:
- case clang::CK_DerivedToBaseMemberPointer:
- case clang::CK_Dynamic:
-+ case clang::CK_FixedPointCast:
-+ case clang::CK_FixedPointToBoolean:
-+ case clang::CK_FixedPointToFloating:
-+ case clang::CK_FixedPointToIntegral:
- case clang::CK_FloatingCast:
- case clang::CK_FloatingComplexCast:
- case clang::CK_FloatingComplexToBoolean:
-@@ -170,6 +174,7 @@ void ZigClang_detect_enum_CK(clang::CastKind x) {
- case clang::CK_FloatingComplexToReal:
- case clang::CK_FloatingRealToComplex:
- case clang::CK_FloatingToBoolean:
-+ case clang::CK_FloatingToFixedPoint:
- case clang::CK_FloatingToIntegral:
- case clang::CK_FunctionToPointerDecay:
- case clang::CK_IntToOCLSampler:
-@@ -180,13 +185,13 @@ void ZigClang_detect_enum_CK(clang::CastKind x) {
- case clang::CK_IntegralComplexToReal:
- case clang::CK_IntegralRealToComplex:
- case clang::CK_IntegralToBoolean:
-+ case clang::CK_IntegralToFixedPoint:
- case clang::CK_IntegralToFloating:
- case clang::CK_IntegralToPointer:
-- case clang::CK_FloatingToFixedPoint:
-- case clang::CK_FixedPointToFloating:
- case clang::CK_LValueBitCast:
-- case clang::CK_LValueToRValueBitCast:
- case clang::CK_LValueToRValue:
-+ case clang::CK_LValueToRValueBitCast:
-+ case clang::CK_MatrixCast:
- case clang::CK_MemberPointerToBoolean:
- case clang::CK_NoOp:
- case clang::CK_NonAtomicToAtomic:
-@@ -202,10 +207,6 @@ void ZigClang_detect_enum_CK(clang::CastKind x) {
- case clang::CK_UserDefinedConversion:
- case clang::CK_VectorSplat:
- case clang::CK_ZeroToOCLOpaqueType:
-- case clang::CK_FixedPointCast:
-- case clang::CK_FixedPointToIntegral:
-- case clang::CK_IntegralToFixedPoint:
-- case clang::CK_FixedPointToBoolean:
- break;
- }
- };
-@@ -235,6 +236,7 @@ static_assert((clang::CastKind)ZigClangCK_IntegralToPointer == clang::CK_Integra
- static_assert((clang::CastKind)ZigClangCK_PointerToIntegral == clang::CK_PointerToIntegral, "");
- static_assert((clang::CastKind)ZigClangCK_PointerToBoolean == clang::CK_PointerToBoolean, "");
- static_assert((clang::CastKind)ZigClangCK_ToVoid == clang::CK_ToVoid, "");
-+static_assert((clang::CastKind)ZigClangCK_MatrixCast == clang::CK_MatrixCast, "");
- static_assert((clang::CastKind)ZigClangCK_VectorSplat == clang::CK_VectorSplat, "");
- static_assert((clang::CastKind)ZigClangCK_IntegralCast == clang::CK_IntegralCast, "");
- static_assert((clang::CastKind)ZigClangCK_IntegralToBoolean == clang::CK_IntegralToBoolean, "");
-@@ -410,13 +412,16 @@ void ZigClang_detect_enum_StmtClass(clang::Stmt::StmtClass x) {
- case ZigClangStmt_IndirectGotoStmtClass:
- case ZigClangStmt_MSDependentExistsStmtClass:
- case ZigClangStmt_NullStmtClass:
-+ case ZigClangStmt_OMPCanonicalLoopClass:
- case ZigClangStmt_OMPAtomicDirectiveClass:
- case ZigClangStmt_OMPBarrierDirectiveClass:
- case ZigClangStmt_OMPCancelDirectiveClass:
- case ZigClangStmt_OMPCancellationPointDirectiveClass:
- case ZigClangStmt_OMPCriticalDirectiveClass:
- case ZigClangStmt_OMPDepobjDirectiveClass:
-+ case ZigClangStmt_OMPDispatchDirectiveClass:
- case ZigClangStmt_OMPFlushDirectiveClass:
-+ case ZigClangStmt_OMPInteropDirectiveClass:
- case ZigClangStmt_OMPDistributeDirectiveClass:
- case ZigClangStmt_OMPDistributeParallelForDirectiveClass:
- case ZigClangStmt_OMPDistributeParallelForSimdDirectiveClass:
-@@ -442,6 +447,9 @@ void ZigClang_detect_enum_StmtClass(clang::Stmt::StmtClass x) {
- case ZigClangStmt_OMPTeamsDistributeParallelForDirectiveClass:
- case ZigClangStmt_OMPTeamsDistributeParallelForSimdDirectiveClass:
- case ZigClangStmt_OMPTeamsDistributeSimdDirectiveClass:
-+ case ZigClangStmt_OMPTileDirectiveClass:
-+ case ZigClangStmt_OMPUnrollDirectiveClass:
-+ case ZigClangStmt_OMPMaskedDirectiveClass:
- case ZigClangStmt_OMPMasterDirectiveClass:
- case ZigClangStmt_OMPOrderedDirectiveClass:
- case ZigClangStmt_OMPParallelDirectiveClass:
-@@ -590,6 +598,7 @@ void ZigClang_detect_enum_StmtClass(clang::Stmt::StmtClass x) {
- case ZigClangStmt_PseudoObjectExprClass:
- case ZigClangStmt_RecoveryExprClass:
- case ZigClangStmt_RequiresExprClass:
-+ case ZigClangStmt_SYCLUniqueStableNameExprClass:
- case ZigClangStmt_ShuffleVectorExprClass:
- case ZigClangStmt_SizeOfPackExprClass:
- case ZigClangStmt_SourceLocExprClass:
-@@ -628,13 +637,16 @@ static_assert((clang::Stmt::StmtClass)ZigClangStmt_IfStmtClass == clang::Stmt::I
- static_assert((clang::Stmt::StmtClass)ZigClangStmt_IndirectGotoStmtClass == clang::Stmt::IndirectGotoStmtClass, "");
- static_assert((clang::Stmt::StmtClass)ZigClangStmt_MSDependentExistsStmtClass == clang::Stmt::MSDependentExistsStmtClass, "");
- static_assert((clang::Stmt::StmtClass)ZigClangStmt_NullStmtClass == clang::Stmt::NullStmtClass, "");
-+static_assert((clang::Stmt::StmtClass)ZigClangStmt_OMPCanonicalLoopClass == clang::Stmt::OMPCanonicalLoopClass, "");
- static_assert((clang::Stmt::StmtClass)ZigClangStmt_OMPAtomicDirectiveClass == clang::Stmt::OMPAtomicDirectiveClass, "");
- static_assert((clang::Stmt::StmtClass)ZigClangStmt_OMPBarrierDirectiveClass == clang::Stmt::OMPBarrierDirectiveClass, "");
- static_assert((clang::Stmt::StmtClass)ZigClangStmt_OMPCancelDirectiveClass == clang::Stmt::OMPCancelDirectiveClass, "");
- static_assert((clang::Stmt::StmtClass)ZigClangStmt_OMPCancellationPointDirectiveClass == clang::Stmt::OMPCancellationPointDirectiveClass, "");
- static_assert((clang::Stmt::StmtClass)ZigClangStmt_OMPCriticalDirectiveClass == clang::Stmt::OMPCriticalDirectiveClass, "");
- static_assert((clang::Stmt::StmtClass)ZigClangStmt_OMPDepobjDirectiveClass == clang::Stmt::OMPDepobjDirectiveClass, "");
-+static_assert((clang::Stmt::StmtClass)ZigClangStmt_OMPDispatchDirectiveClass == clang::Stmt::OMPDispatchDirectiveClass, "");
- static_assert((clang::Stmt::StmtClass)ZigClangStmt_OMPFlushDirectiveClass == clang::Stmt::OMPFlushDirectiveClass, "");
-+static_assert((clang::Stmt::StmtClass)ZigClangStmt_OMPInteropDirectiveClass == clang::Stmt::OMPInteropDirectiveClass, "");
- static_assert((clang::Stmt::StmtClass)ZigClangStmt_OMPDistributeDirectiveClass == clang::Stmt::OMPDistributeDirectiveClass, "");
- static_assert((clang::Stmt::StmtClass)ZigClangStmt_OMPDistributeParallelForDirectiveClass == clang::Stmt::OMPDistributeParallelForDirectiveClass, "");
- static_assert((clang::Stmt::StmtClass)ZigClangStmt_OMPDistributeParallelForSimdDirectiveClass == clang::Stmt::OMPDistributeParallelForSimdDirectiveClass, "");
-@@ -660,6 +672,9 @@ static_assert((clang::Stmt::StmtClass)ZigClangStmt_OMPTeamsDistributeDirectiveCl
- static_assert((clang::Stmt::StmtClass)ZigClangStmt_OMPTeamsDistributeParallelForDirectiveClass == clang::Stmt::OMPTeamsDistributeParallelForDirectiveClass, "");
- static_assert((clang::Stmt::StmtClass)ZigClangStmt_OMPTeamsDistributeParallelForSimdDirectiveClass == clang::Stmt::OMPTeamsDistributeParallelForSimdDirectiveClass, "");
- static_assert((clang::Stmt::StmtClass)ZigClangStmt_OMPTeamsDistributeSimdDirectiveClass == clang::Stmt::OMPTeamsDistributeSimdDirectiveClass, "");
-+static_assert((clang::Stmt::StmtClass)ZigClangStmt_OMPTileDirectiveClass == clang::Stmt::OMPTileDirectiveClass, "");
-+static_assert((clang::Stmt::StmtClass)ZigClangStmt_OMPUnrollDirectiveClass == clang::Stmt::OMPUnrollDirectiveClass, "");
-+static_assert((clang::Stmt::StmtClass)ZigClangStmt_OMPMaskedDirectiveClass == clang::Stmt::OMPMaskedDirectiveClass, "");
- static_assert((clang::Stmt::StmtClass)ZigClangStmt_OMPMasterDirectiveClass == clang::Stmt::OMPMasterDirectiveClass, "");
- static_assert((clang::Stmt::StmtClass)ZigClangStmt_OMPOrderedDirectiveClass == clang::Stmt::OMPOrderedDirectiveClass, "");
- static_assert((clang::Stmt::StmtClass)ZigClangStmt_OMPParallelDirectiveClass == clang::Stmt::OMPParallelDirectiveClass, "");
-@@ -808,6 +823,7 @@ static_assert((clang::Stmt::StmtClass)ZigClangStmt_PredefinedExprClass == clang:
- static_assert((clang::Stmt::StmtClass)ZigClangStmt_PseudoObjectExprClass == clang::Stmt::PseudoObjectExprClass, "");
- static_assert((clang::Stmt::StmtClass)ZigClangStmt_RecoveryExprClass == clang::Stmt::RecoveryExprClass, "");
- static_assert((clang::Stmt::StmtClass)ZigClangStmt_RequiresExprClass == clang::Stmt::RequiresExprClass, "");
-+static_assert((clang::Stmt::StmtClass)ZigClangStmt_SYCLUniqueStableNameExprClass == clang::Stmt::SYCLUniqueStableNameExprClass, "");
- static_assert((clang::Stmt::StmtClass)ZigClangStmt_ShuffleVectorExprClass == clang::Stmt::ShuffleVectorExprClass, "");
- static_assert((clang::Stmt::StmtClass)ZigClangStmt_SizeOfPackExprClass == clang::Stmt::SizeOfPackExprClass, "");
- static_assert((clang::Stmt::StmtClass)ZigClangStmt_SourceLocExprClass == clang::Stmt::SourceLocExprClass, "");
-@@ -875,6 +891,8 @@ void ZigClang_detect_enum_DeclKind(clang::Decl::Kind x) {
- case clang::Decl::Import:
- case clang::Decl::LifetimeExtendedTemporary:
- case clang::Decl::LinkageSpec:
-+ case clang::Decl::Using:
-+ case clang::Decl::UsingEnum:
- case clang::Decl::Label:
- case clang::Decl::Namespace:
- case clang::Decl::NamespaceAlias:
-@@ -903,7 +921,7 @@ void ZigClang_detect_enum_DeclKind(clang::Decl::Kind x) {
- case clang::Decl::TypeAlias:
- case clang::Decl::Typedef:
- case clang::Decl::UnresolvedUsingTypename:
-- case clang::Decl::Using:
-+ case clang::Decl::UnresolvedUsingIfExists:
- case clang::Decl::UsingDirective:
- case clang::Decl::UsingPack:
- case clang::Decl::UsingShadow:
-@@ -960,6 +978,8 @@ static_assert((clang::Decl::Kind)ZigClangDeclFriendTemplate == clang::Decl::Frie
- static_assert((clang::Decl::Kind)ZigClangDeclImport == clang::Decl::Import, "");
- static_assert((clang::Decl::Kind)ZigClangDeclLifetimeExtendedTemporary == clang::Decl::LifetimeExtendedTemporary, "");
- static_assert((clang::Decl::Kind)ZigClangDeclLinkageSpec == clang::Decl::LinkageSpec, "");
-+static_assert((clang::Decl::Kind)ZigClangDeclUsing == clang::Decl::Using, "");
-+static_assert((clang::Decl::Kind)ZigClangDeclUsingEnum == clang::Decl::UsingEnum, "");
- static_assert((clang::Decl::Kind)ZigClangDeclLabel == clang::Decl::Label, "");
- static_assert((clang::Decl::Kind)ZigClangDeclNamespace == clang::Decl::Namespace, "");
- static_assert((clang::Decl::Kind)ZigClangDeclNamespaceAlias == clang::Decl::NamespaceAlias, "");
-@@ -988,8 +1008,8 @@ static_assert((clang::Decl::Kind)ZigClangDeclObjCTypeParam == clang::Decl::ObjCT
- static_assert((clang::Decl::Kind)ZigClangDeclTypeAlias == clang::Decl::TypeAlias, "");
- static_assert((clang::Decl::Kind)ZigClangDeclTypedef == clang::Decl::Typedef, "");
- static_assert((clang::Decl::Kind)ZigClangDeclUnresolvedUsingTypename == clang::Decl::UnresolvedUsingTypename, "");
-+static_assert((clang::Decl::Kind)ZigClangDeclUnresolvedUsingIfExists == clang::Decl::UnresolvedUsingIfExists, "");
- static_assert((clang::Decl::Kind)ZigClangDeclOMPAllocate == clang::Decl::OMPAllocate, "");
--static_assert((clang::Decl::Kind)ZigClangDeclUsing == clang::Decl::Using, "");
- static_assert((clang::Decl::Kind)ZigClangDeclUsingDirective == clang::Decl::UsingDirective, "");
- static_assert((clang::Decl::Kind)ZigClangDeclUsingPack == clang::Decl::UsingPack, "");
- static_assert((clang::Decl::Kind)ZigClangDeclUsingShadow == clang::Decl::UsingShadow, "");
-@@ -1031,177 +1051,243 @@ static_assert((clang::Decl::Kind)ZigClangDeclTranslationUnit == clang::Decl::Tra
-
- void ZigClang_detect_enum_BuiltinTypeKind(clang::BuiltinType::Kind x) {
- switch (x) {
-- case clang::BuiltinType::OCLImage1dRO:
-- case clang::BuiltinType::OCLImage1dArrayRO:
-- case clang::BuiltinType::OCLImage1dBufferRO:
-- case clang::BuiltinType::OCLImage2dRO:
-- case clang::BuiltinType::OCLImage2dArrayRO:
-- case clang::BuiltinType::OCLImage2dDepthRO:
-- case clang::BuiltinType::OCLImage2dArrayDepthRO:
-- case clang::BuiltinType::OCLImage2dMSAARO:
-- case clang::BuiltinType::OCLImage2dArrayMSAARO:
-- case clang::BuiltinType::OCLImage2dMSAADepthRO:
-- case clang::BuiltinType::OCLImage2dArrayMSAADepthRO:
-- case clang::BuiltinType::OCLImage3dRO:
-- case clang::BuiltinType::OCLImage1dWO:
-- case clang::BuiltinType::OCLImage1dArrayWO:
-- case clang::BuiltinType::OCLImage1dBufferWO:
-- case clang::BuiltinType::OCLImage2dWO:
-- case clang::BuiltinType::OCLImage2dArrayWO:
-- case clang::BuiltinType::OCLImage2dDepthWO:
-- case clang::BuiltinType::OCLImage2dArrayDepthWO:
-- case clang::BuiltinType::OCLImage2dMSAAWO:
-- case clang::BuiltinType::OCLImage2dArrayMSAAWO:
-- case clang::BuiltinType::OCLImage2dMSAADepthWO:
-- case clang::BuiltinType::OCLImage2dArrayMSAADepthWO:
-- case clang::BuiltinType::OCLImage3dWO:
-- case clang::BuiltinType::OCLImage1dRW:
-- case clang::BuiltinType::OCLImage1dArrayRW:
-- case clang::BuiltinType::OCLImage1dBufferRW:
-- case clang::BuiltinType::OCLImage2dRW:
-- case clang::BuiltinType::OCLImage2dArrayRW:
-- case clang::BuiltinType::OCLImage2dDepthRW:
-- case clang::BuiltinType::OCLImage2dArrayDepthRW:
-- case clang::BuiltinType::OCLImage2dMSAARW:
-- case clang::BuiltinType::OCLImage2dArrayMSAARW:
-- case clang::BuiltinType::OCLImage2dMSAADepthRW:
-- case clang::BuiltinType::OCLImage2dArrayMSAADepthRW:
-- case clang::BuiltinType::OCLImage3dRW:
-- case clang::BuiltinType::OCLIntelSubgroupAVCMcePayload:
-- case clang::BuiltinType::OCLIntelSubgroupAVCImePayload:
-- case clang::BuiltinType::OCLIntelSubgroupAVCRefPayload:
-- case clang::BuiltinType::OCLIntelSubgroupAVCSicPayload:
-- case clang::BuiltinType::OCLIntelSubgroupAVCMceResult:
-- case clang::BuiltinType::OCLIntelSubgroupAVCImeResult:
-- case clang::BuiltinType::OCLIntelSubgroupAVCRefResult:
-- case clang::BuiltinType::OCLIntelSubgroupAVCSicResult:
-- case clang::BuiltinType::OCLIntelSubgroupAVCImeResultSingleRefStreamout:
-- case clang::BuiltinType::OCLIntelSubgroupAVCImeResultDualRefStreamout:
-- case clang::BuiltinType::OCLIntelSubgroupAVCImeSingleRefStreamin:
-- case clang::BuiltinType::OCLIntelSubgroupAVCImeDualRefStreamin:
-- case clang::BuiltinType::SveInt8:
-- case clang::BuiltinType::SveInt16:
-- case clang::BuiltinType::SveInt32:
-- case clang::BuiltinType::SveInt64:
-- case clang::BuiltinType::SveUint8:
-- case clang::BuiltinType::SveUint16:
-- case clang::BuiltinType::SveUint32:
-- case clang::BuiltinType::SveUint64:
-- case clang::BuiltinType::SveFloat16:
-- case clang::BuiltinType::SveFloat32:
-- case clang::BuiltinType::SveFloat64:
-- case clang::BuiltinType::SveBFloat16:
-- case clang::BuiltinType::SveInt8x2:
-- case clang::BuiltinType::SveInt16x2:
-- case clang::BuiltinType::SveInt32x2:
-- case clang::BuiltinType::SveInt64x2:
-- case clang::BuiltinType::SveUint8x2:
-- case clang::BuiltinType::SveUint16x2:
-- case clang::BuiltinType::SveUint32x2:
-- case clang::BuiltinType::SveUint64x2:
-- case clang::BuiltinType::SveFloat16x2:
-- case clang::BuiltinType::SveFloat32x2:
-- case clang::BuiltinType::SveFloat64x2:
-- case clang::BuiltinType::SveBFloat16x2:
-- case clang::BuiltinType::SveInt8x3:
-- case clang::BuiltinType::SveInt16x3:
-- case clang::BuiltinType::SveInt32x3:
-- case clang::BuiltinType::SveInt64x3:
-- case clang::BuiltinType::SveUint8x3:
-- case clang::BuiltinType::SveUint16x3:
-- case clang::BuiltinType::SveUint32x3:
-- case clang::BuiltinType::SveUint64x3:
-- case clang::BuiltinType::SveFloat16x3:
-- case clang::BuiltinType::SveFloat32x3:
-- case clang::BuiltinType::SveFloat64x3:
-- case clang::BuiltinType::SveBFloat16x3:
-- case clang::BuiltinType::SveInt8x4:
-- case clang::BuiltinType::SveInt16x4:
-- case clang::BuiltinType::SveInt32x4:
-- case clang::BuiltinType::SveInt64x4:
-- case clang::BuiltinType::SveUint8x4:
-- case clang::BuiltinType::SveUint16x4:
-- case clang::BuiltinType::SveUint32x4:
-- case clang::BuiltinType::SveUint64x4:
-- case clang::BuiltinType::SveFloat16x4:
-- case clang::BuiltinType::SveFloat32x4:
-- case clang::BuiltinType::SveFloat64x4:
-- case clang::BuiltinType::SveBFloat16x4:
-- case clang::BuiltinType::SveBool:
-- case clang::BuiltinType::VectorQuad:
-- case clang::BuiltinType::VectorPair:
-- case clang::BuiltinType::Void:
-- case clang::BuiltinType::Bool:
-- case clang::BuiltinType::Char_U:
-- case clang::BuiltinType::UChar:
-- case clang::BuiltinType::WChar_U:
-- case clang::BuiltinType::Char8:
-- case clang::BuiltinType::Char16:
-- case clang::BuiltinType::Char32:
-- case clang::BuiltinType::UShort:
-- case clang::BuiltinType::UInt:
-- case clang::BuiltinType::ULong:
-- case clang::BuiltinType::ULongLong:
-- case clang::BuiltinType::UInt128:
-- case clang::BuiltinType::Char_S:
-- case clang::BuiltinType::SChar:
-- case clang::BuiltinType::WChar_S:
-- case clang::BuiltinType::Short:
-- case clang::BuiltinType::Int:
-- case clang::BuiltinType::Long:
-- case clang::BuiltinType::LongLong:
-- case clang::BuiltinType::Int128:
-- case clang::BuiltinType::ShortAccum:
-- case clang::BuiltinType::Accum:
-- case clang::BuiltinType::LongAccum:
-- case clang::BuiltinType::UShortAccum:
-- case clang::BuiltinType::UAccum:
-- case clang::BuiltinType::ULongAccum:
-- case clang::BuiltinType::ShortFract:
-- case clang::BuiltinType::Fract:
-- case clang::BuiltinType::LongFract:
-- case clang::BuiltinType::UShortFract:
-- case clang::BuiltinType::UFract:
-- case clang::BuiltinType::ULongFract:
-- case clang::BuiltinType::SatShortAccum:
-- case clang::BuiltinType::SatAccum:
-- case clang::BuiltinType::SatLongAccum:
-- case clang::BuiltinType::SatUShortAccum:
-- case clang::BuiltinType::SatUAccum:
-- case clang::BuiltinType::SatULongAccum:
-- case clang::BuiltinType::SatShortFract:
-- case clang::BuiltinType::SatFract:
-- case clang::BuiltinType::SatLongFract:
-- case clang::BuiltinType::SatUShortFract:
-- case clang::BuiltinType::SatUFract:
-- case clang::BuiltinType::SatULongFract:
-- case clang::BuiltinType::Half:
-- case clang::BuiltinType::Float:
-- case clang::BuiltinType::Double:
-- case clang::BuiltinType::LongDouble:
-- case clang::BuiltinType::Float16:
-- case clang::BuiltinType::BFloat16:
-- case clang::BuiltinType::Float128:
-- case clang::BuiltinType::NullPtr:
-- case clang::BuiltinType::ObjCId:
-- case clang::BuiltinType::ObjCClass:
-- case clang::BuiltinType::ObjCSel:
-- case clang::BuiltinType::OCLSampler:
-- case clang::BuiltinType::OCLEvent:
-- case clang::BuiltinType::OCLClkEvent:
-- case clang::BuiltinType::OCLQueue:
-- case clang::BuiltinType::OCLReserveID:
-- case clang::BuiltinType::Dependent:
-- case clang::BuiltinType::Overload:
-- case clang::BuiltinType::BoundMember:
-- case clang::BuiltinType::PseudoObject:
-- case clang::BuiltinType::UnknownAny:
-- case clang::BuiltinType::BuiltinFn:
-- case clang::BuiltinType::ARCUnbridgedCast:
-- case clang::BuiltinType::IncompleteMatrixIdx:
-- case clang::BuiltinType::OMPArraySection:
-- case clang::BuiltinType::OMPArrayShaping:
-- case clang::BuiltinType::OMPIterator:
-+ case ZigClangBuiltinTypeOCLImage1dRO:
-+ case ZigClangBuiltinTypeOCLImage1dArrayRO:
-+ case ZigClangBuiltinTypeOCLImage1dBufferRO:
-+ case ZigClangBuiltinTypeOCLImage2dRO:
-+ case ZigClangBuiltinTypeOCLImage2dArrayRO:
-+ case ZigClangBuiltinTypeOCLImage2dDepthRO:
-+ case ZigClangBuiltinTypeOCLImage2dArrayDepthRO:
-+ case ZigClangBuiltinTypeOCLImage2dMSAARO:
-+ case ZigClangBuiltinTypeOCLImage2dArrayMSAARO:
-+ case ZigClangBuiltinTypeOCLImage2dMSAADepthRO:
-+ case ZigClangBuiltinTypeOCLImage2dArrayMSAADepthRO:
-+ case ZigClangBuiltinTypeOCLImage3dRO:
-+ case ZigClangBuiltinTypeOCLImage1dWO:
-+ case ZigClangBuiltinTypeOCLImage1dArrayWO:
-+ case ZigClangBuiltinTypeOCLImage1dBufferWO:
-+ case ZigClangBuiltinTypeOCLImage2dWO:
-+ case ZigClangBuiltinTypeOCLImage2dArrayWO:
-+ case ZigClangBuiltinTypeOCLImage2dDepthWO:
-+ case ZigClangBuiltinTypeOCLImage2dArrayDepthWO:
-+ case ZigClangBuiltinTypeOCLImage2dMSAAWO:
-+ case ZigClangBuiltinTypeOCLImage2dArrayMSAAWO:
-+ case ZigClangBuiltinTypeOCLImage2dMSAADepthWO:
-+ case ZigClangBuiltinTypeOCLImage2dArrayMSAADepthWO:
-+ case ZigClangBuiltinTypeOCLImage3dWO:
-+ case ZigClangBuiltinTypeOCLImage1dRW:
-+ case ZigClangBuiltinTypeOCLImage1dArrayRW:
-+ case ZigClangBuiltinTypeOCLImage1dBufferRW:
-+ case ZigClangBuiltinTypeOCLImage2dRW:
-+ case ZigClangBuiltinTypeOCLImage2dArrayRW:
-+ case ZigClangBuiltinTypeOCLImage2dDepthRW:
-+ case ZigClangBuiltinTypeOCLImage2dArrayDepthRW:
-+ case ZigClangBuiltinTypeOCLImage2dMSAARW:
-+ case ZigClangBuiltinTypeOCLImage2dArrayMSAARW:
-+ case ZigClangBuiltinTypeOCLImage2dMSAADepthRW:
-+ case ZigClangBuiltinTypeOCLImage2dArrayMSAADepthRW:
-+ case ZigClangBuiltinTypeOCLImage3dRW:
-+ case ZigClangBuiltinTypeOCLIntelSubgroupAVCMcePayload:
-+ case ZigClangBuiltinTypeOCLIntelSubgroupAVCImePayload:
-+ case ZigClangBuiltinTypeOCLIntelSubgroupAVCRefPayload:
-+ case ZigClangBuiltinTypeOCLIntelSubgroupAVCSicPayload:
-+ case ZigClangBuiltinTypeOCLIntelSubgroupAVCMceResult:
-+ case ZigClangBuiltinTypeOCLIntelSubgroupAVCImeResult:
-+ case ZigClangBuiltinTypeOCLIntelSubgroupAVCRefResult:
-+ case ZigClangBuiltinTypeOCLIntelSubgroupAVCSicResult:
-+ case ZigClangBuiltinTypeOCLIntelSubgroupAVCImeResultSingleRefStreamout:
-+ case ZigClangBuiltinTypeOCLIntelSubgroupAVCImeResultDualRefStreamout:
-+ case ZigClangBuiltinTypeOCLIntelSubgroupAVCImeSingleRefStreamin:
-+ case ZigClangBuiltinTypeOCLIntelSubgroupAVCImeDualRefStreamin:
-+ case ZigClangBuiltinTypeSveInt8:
-+ case ZigClangBuiltinTypeSveInt16:
-+ case ZigClangBuiltinTypeSveInt32:
-+ case ZigClangBuiltinTypeSveInt64:
-+ case ZigClangBuiltinTypeSveUint8:
-+ case ZigClangBuiltinTypeSveUint16:
-+ case ZigClangBuiltinTypeSveUint32:
-+ case ZigClangBuiltinTypeSveUint64:
-+ case ZigClangBuiltinTypeSveFloat16:
-+ case ZigClangBuiltinTypeSveFloat32:
-+ case ZigClangBuiltinTypeSveFloat64:
-+ case ZigClangBuiltinTypeSveBFloat16:
-+ case ZigClangBuiltinTypeSveInt8x2:
-+ case ZigClangBuiltinTypeSveInt16x2:
-+ case ZigClangBuiltinTypeSveInt32x2:
-+ case ZigClangBuiltinTypeSveInt64x2:
-+ case ZigClangBuiltinTypeSveUint8x2:
-+ case ZigClangBuiltinTypeSveUint16x2:
-+ case ZigClangBuiltinTypeSveUint32x2:
-+ case ZigClangBuiltinTypeSveUint64x2:
-+ case ZigClangBuiltinTypeSveFloat16x2:
-+ case ZigClangBuiltinTypeSveFloat32x2:
-+ case ZigClangBuiltinTypeSveFloat64x2:
-+ case ZigClangBuiltinTypeSveBFloat16x2:
-+ case ZigClangBuiltinTypeSveInt8x3:
-+ case ZigClangBuiltinTypeSveInt16x3:
-+ case ZigClangBuiltinTypeSveInt32x3:
-+ case ZigClangBuiltinTypeSveInt64x3:
-+ case ZigClangBuiltinTypeSveUint8x3:
-+ case ZigClangBuiltinTypeSveUint16x3:
-+ case ZigClangBuiltinTypeSveUint32x3:
-+ case ZigClangBuiltinTypeSveUint64x3:
-+ case ZigClangBuiltinTypeSveFloat16x3:
-+ case ZigClangBuiltinTypeSveFloat32x3:
-+ case ZigClangBuiltinTypeSveFloat64x3:
-+ case ZigClangBuiltinTypeSveBFloat16x3:
-+ case ZigClangBuiltinTypeSveInt8x4:
-+ case ZigClangBuiltinTypeSveInt16x4:
-+ case ZigClangBuiltinTypeSveInt32x4:
-+ case ZigClangBuiltinTypeSveInt64x4:
-+ case ZigClangBuiltinTypeSveUint8x4:
-+ case ZigClangBuiltinTypeSveUint16x4:
-+ case ZigClangBuiltinTypeSveUint32x4:
-+ case ZigClangBuiltinTypeSveUint64x4:
-+ case ZigClangBuiltinTypeSveFloat16x4:
-+ case ZigClangBuiltinTypeSveFloat32x4:
-+ case ZigClangBuiltinTypeSveFloat64x4:
-+ case ZigClangBuiltinTypeSveBFloat16x4:
-+ case ZigClangBuiltinTypeSveBool:
-+ case ZigClangBuiltinTypeVectorQuad:
-+ case ZigClangBuiltinTypeVectorPair:
-+ case ZigClangBuiltinTypeRvvInt8mf8:
-+ case ZigClangBuiltinTypeRvvInt8mf4:
-+ case ZigClangBuiltinTypeRvvInt8mf2:
-+ case ZigClangBuiltinTypeRvvInt8m1:
-+ case ZigClangBuiltinTypeRvvInt8m2:
-+ case ZigClangBuiltinTypeRvvInt8m4:
-+ case ZigClangBuiltinTypeRvvInt8m8:
-+ case ZigClangBuiltinTypeRvvUint8mf8:
-+ case ZigClangBuiltinTypeRvvUint8mf4:
-+ case ZigClangBuiltinTypeRvvUint8mf2:
-+ case ZigClangBuiltinTypeRvvUint8m1:
-+ case ZigClangBuiltinTypeRvvUint8m2:
-+ case ZigClangBuiltinTypeRvvUint8m4:
-+ case ZigClangBuiltinTypeRvvUint8m8:
-+ case ZigClangBuiltinTypeRvvInt16mf4:
-+ case ZigClangBuiltinTypeRvvInt16mf2:
-+ case ZigClangBuiltinTypeRvvInt16m1:
-+ case ZigClangBuiltinTypeRvvInt16m2:
-+ case ZigClangBuiltinTypeRvvInt16m4:
-+ case ZigClangBuiltinTypeRvvInt16m8:
-+ case ZigClangBuiltinTypeRvvUint16mf4:
-+ case ZigClangBuiltinTypeRvvUint16mf2:
-+ case ZigClangBuiltinTypeRvvUint16m1:
-+ case ZigClangBuiltinTypeRvvUint16m2:
-+ case ZigClangBuiltinTypeRvvUint16m4:
-+ case ZigClangBuiltinTypeRvvUint16m8:
-+ case ZigClangBuiltinTypeRvvInt32mf2:
-+ case ZigClangBuiltinTypeRvvInt32m1:
-+ case ZigClangBuiltinTypeRvvInt32m2:
-+ case ZigClangBuiltinTypeRvvInt32m4:
-+ case ZigClangBuiltinTypeRvvInt32m8:
-+ case ZigClangBuiltinTypeRvvUint32mf2:
-+ case ZigClangBuiltinTypeRvvUint32m1:
-+ case ZigClangBuiltinTypeRvvUint32m2:
-+ case ZigClangBuiltinTypeRvvUint32m4:
-+ case ZigClangBuiltinTypeRvvUint32m8:
-+ case ZigClangBuiltinTypeRvvInt64m1:
-+ case ZigClangBuiltinTypeRvvInt64m2:
-+ case ZigClangBuiltinTypeRvvInt64m4:
-+ case ZigClangBuiltinTypeRvvInt64m8:
-+ case ZigClangBuiltinTypeRvvUint64m1:
-+ case ZigClangBuiltinTypeRvvUint64m2:
-+ case ZigClangBuiltinTypeRvvUint64m4:
-+ case ZigClangBuiltinTypeRvvUint64m8:
-+ case ZigClangBuiltinTypeRvvFloat16mf4:
-+ case ZigClangBuiltinTypeRvvFloat16mf2:
-+ case ZigClangBuiltinTypeRvvFloat16m1:
-+ case ZigClangBuiltinTypeRvvFloat16m2:
-+ case ZigClangBuiltinTypeRvvFloat16m4:
-+ case ZigClangBuiltinTypeRvvFloat16m8:
-+ case ZigClangBuiltinTypeRvvFloat32mf2:
-+ case ZigClangBuiltinTypeRvvFloat32m1:
-+ case ZigClangBuiltinTypeRvvFloat32m2:
-+ case ZigClangBuiltinTypeRvvFloat32m4:
-+ case ZigClangBuiltinTypeRvvFloat32m8:
-+ case ZigClangBuiltinTypeRvvFloat64m1:
-+ case ZigClangBuiltinTypeRvvFloat64m2:
-+ case ZigClangBuiltinTypeRvvFloat64m4:
-+ case ZigClangBuiltinTypeRvvFloat64m8:
-+ case ZigClangBuiltinTypeRvvBool1:
-+ case ZigClangBuiltinTypeRvvBool2:
-+ case ZigClangBuiltinTypeRvvBool4:
-+ case ZigClangBuiltinTypeRvvBool8:
-+ case ZigClangBuiltinTypeRvvBool16:
-+ case ZigClangBuiltinTypeRvvBool32:
-+ case ZigClangBuiltinTypeRvvBool64:
-+ case ZigClangBuiltinTypeVoid:
-+ case ZigClangBuiltinTypeBool:
-+ case ZigClangBuiltinTypeChar_U:
-+ case ZigClangBuiltinTypeUChar:
-+ case ZigClangBuiltinTypeWChar_U:
-+ case ZigClangBuiltinTypeChar8:
-+ case ZigClangBuiltinTypeChar16:
-+ case ZigClangBuiltinTypeChar32:
-+ case ZigClangBuiltinTypeUShort:
-+ case ZigClangBuiltinTypeUInt:
-+ case ZigClangBuiltinTypeULong:
-+ case ZigClangBuiltinTypeULongLong:
-+ case ZigClangBuiltinTypeUInt128:
-+ case ZigClangBuiltinTypeChar_S:
-+ case ZigClangBuiltinTypeSChar:
-+ case ZigClangBuiltinTypeWChar_S:
-+ case ZigClangBuiltinTypeShort:
-+ case ZigClangBuiltinTypeInt:
-+ case ZigClangBuiltinTypeLong:
-+ case ZigClangBuiltinTypeLongLong:
-+ case ZigClangBuiltinTypeInt128:
-+ case ZigClangBuiltinTypeShortAccum:
-+ case ZigClangBuiltinTypeAccum:
-+ case ZigClangBuiltinTypeLongAccum:
-+ case ZigClangBuiltinTypeUShortAccum:
-+ case ZigClangBuiltinTypeUAccum:
-+ case ZigClangBuiltinTypeULongAccum:
-+ case ZigClangBuiltinTypeShortFract:
-+ case ZigClangBuiltinTypeFract:
-+ case ZigClangBuiltinTypeLongFract:
-+ case ZigClangBuiltinTypeUShortFract:
-+ case ZigClangBuiltinTypeUFract:
-+ case ZigClangBuiltinTypeULongFract:
-+ case ZigClangBuiltinTypeSatShortAccum:
-+ case ZigClangBuiltinTypeSatAccum:
-+ case ZigClangBuiltinTypeSatLongAccum:
-+ case ZigClangBuiltinTypeSatUShortAccum:
-+ case ZigClangBuiltinTypeSatUAccum:
-+ case ZigClangBuiltinTypeSatULongAccum:
-+ case ZigClangBuiltinTypeSatShortFract:
-+ case ZigClangBuiltinTypeSatFract:
-+ case ZigClangBuiltinTypeSatLongFract:
-+ case ZigClangBuiltinTypeSatUShortFract:
-+ case ZigClangBuiltinTypeSatUFract:
-+ case ZigClangBuiltinTypeSatULongFract:
-+ case ZigClangBuiltinTypeHalf:
-+ case ZigClangBuiltinTypeFloat:
-+ case ZigClangBuiltinTypeDouble:
-+ case ZigClangBuiltinTypeLongDouble:
-+ case ZigClangBuiltinTypeFloat16:
-+ case ZigClangBuiltinTypeBFloat16:
-+ case ZigClangBuiltinTypeFloat128:
-+ case ZigClangBuiltinTypeNullPtr:
-+ case ZigClangBuiltinTypeObjCId:
-+ case ZigClangBuiltinTypeObjCClass:
-+ case ZigClangBuiltinTypeObjCSel:
-+ case ZigClangBuiltinTypeOCLSampler:
-+ case ZigClangBuiltinTypeOCLEvent:
-+ case ZigClangBuiltinTypeOCLClkEvent:
-+ case ZigClangBuiltinTypeOCLQueue:
-+ case ZigClangBuiltinTypeOCLReserveID:
-+ case ZigClangBuiltinTypeDependent:
-+ case ZigClangBuiltinTypeOverload:
-+ case ZigClangBuiltinTypeBoundMember:
-+ case ZigClangBuiltinTypePseudoObject:
-+ case ZigClangBuiltinTypeUnknownAny:
-+ case ZigClangBuiltinTypeBuiltinFn:
-+ case ZigClangBuiltinTypeARCUnbridgedCast:
-+ case ZigClangBuiltinTypeIncompleteMatrixIdx:
-+ case ZigClangBuiltinTypeOMPArraySection:
-+ case ZigClangBuiltinTypeOMPArrayShaping:
-+ case ZigClangBuiltinTypeOMPIterator:
- break;
- }
- }
-@@ -1305,6 +1391,72 @@ static_assert((clang::BuiltinType::Kind)ZigClangBuiltinTypeSveBFloat16x4 == clan
- static_assert((clang::BuiltinType::Kind)ZigClangBuiltinTypeSveBool == clang::BuiltinType::SveBool, "");
- static_assert((clang::BuiltinType::Kind)ZigClangBuiltinTypeVectorQuad == clang::BuiltinType::VectorQuad, "");
- static_assert((clang::BuiltinType::Kind)ZigClangBuiltinTypeVectorPair == clang::BuiltinType::VectorPair, "");
-+static_assert((clang::BuiltinType::Kind)ZigClangBuiltinTypeRvvInt8mf8 == clang::BuiltinType::RvvInt8mf8, "");
-+static_assert((clang::BuiltinType::Kind)ZigClangBuiltinTypeRvvInt8mf4 == clang::BuiltinType::RvvInt8mf4, "");
-+static_assert((clang::BuiltinType::Kind)ZigClangBuiltinTypeRvvInt8mf2 == clang::BuiltinType::RvvInt8mf2, "");
-+static_assert((clang::BuiltinType::Kind)ZigClangBuiltinTypeRvvInt8m1 == clang::BuiltinType::RvvInt8m1, "");
-+static_assert((clang::BuiltinType::Kind)ZigClangBuiltinTypeRvvInt8m2 == clang::BuiltinType::RvvInt8m2, "");
-+static_assert((clang::BuiltinType::Kind)ZigClangBuiltinTypeRvvInt8m4 == clang::BuiltinType::RvvInt8m4, "");
-+static_assert((clang::BuiltinType::Kind)ZigClangBuiltinTypeRvvInt8m8 == clang::BuiltinType::RvvInt8m8, "");
-+static_assert((clang::BuiltinType::Kind)ZigClangBuiltinTypeRvvUint8mf8 == clang::BuiltinType::RvvUint8mf8, "");
-+static_assert((clang::BuiltinType::Kind)ZigClangBuiltinTypeRvvUint8mf4 == clang::BuiltinType::RvvUint8mf4, "");
-+static_assert((clang::BuiltinType::Kind)ZigClangBuiltinTypeRvvUint8mf2 == clang::BuiltinType::RvvUint8mf2, "");
-+static_assert((clang::BuiltinType::Kind)ZigClangBuiltinTypeRvvUint8m1 == clang::BuiltinType::RvvUint8m1, "");
-+static_assert((clang::BuiltinType::Kind)ZigClangBuiltinTypeRvvUint8m2 == clang::BuiltinType::RvvUint8m2, "");
-+static_assert((clang::BuiltinType::Kind)ZigClangBuiltinTypeRvvUint8m4 == clang::BuiltinType::RvvUint8m4, "");
-+static_assert((clang::BuiltinType::Kind)ZigClangBuiltinTypeRvvUint8m8 == clang::BuiltinType::RvvUint8m8, "");
-+static_assert((clang::BuiltinType::Kind)ZigClangBuiltinTypeRvvInt16mf4 == clang::BuiltinType::RvvInt16mf4, "");
-+static_assert((clang::BuiltinType::Kind)ZigClangBuiltinTypeRvvInt16mf2 == clang::BuiltinType::RvvInt16mf2, "");
-+static_assert((clang::BuiltinType::Kind)ZigClangBuiltinTypeRvvInt16m1 == clang::BuiltinType::RvvInt16m1, "");
-+static_assert((clang::BuiltinType::Kind)ZigClangBuiltinTypeRvvInt16m2 == clang::BuiltinType::RvvInt16m2, "");
-+static_assert((clang::BuiltinType::Kind)ZigClangBuiltinTypeRvvInt16m4 == clang::BuiltinType::RvvInt16m4, "");
-+static_assert((clang::BuiltinType::Kind)ZigClangBuiltinTypeRvvInt16m8 == clang::BuiltinType::RvvInt16m8, "");
-+static_assert((clang::BuiltinType::Kind)ZigClangBuiltinTypeRvvUint16mf4 == clang::BuiltinType::RvvUint16mf4, "");
-+static_assert((clang::BuiltinType::Kind)ZigClangBuiltinTypeRvvUint16mf2 == clang::BuiltinType::RvvUint16mf2, "");
-+static_assert((clang::BuiltinType::Kind)ZigClangBuiltinTypeRvvUint16m1 == clang::BuiltinType::RvvUint16m1, "");
-+static_assert((clang::BuiltinType::Kind)ZigClangBuiltinTypeRvvUint16m2 == clang::BuiltinType::RvvUint16m2, "");
-+static_assert((clang::BuiltinType::Kind)ZigClangBuiltinTypeRvvUint16m4 == clang::BuiltinType::RvvUint16m4, "");
-+static_assert((clang::BuiltinType::Kind)ZigClangBuiltinTypeRvvUint16m8 == clang::BuiltinType::RvvUint16m8, "");
-+static_assert((clang::BuiltinType::Kind)ZigClangBuiltinTypeRvvInt32mf2 == clang::BuiltinType::RvvInt32mf2, "");
-+static_assert((clang::BuiltinType::Kind)ZigClangBuiltinTypeRvvInt32m1 == clang::BuiltinType::RvvInt32m1, "");
-+static_assert((clang::BuiltinType::Kind)ZigClangBuiltinTypeRvvInt32m2 == clang::BuiltinType::RvvInt32m2, "");
-+static_assert((clang::BuiltinType::Kind)ZigClangBuiltinTypeRvvInt32m4 == clang::BuiltinType::RvvInt32m4, "");
-+static_assert((clang::BuiltinType::Kind)ZigClangBuiltinTypeRvvInt32m8 == clang::BuiltinType::RvvInt32m8, "");
-+static_assert((clang::BuiltinType::Kind)ZigClangBuiltinTypeRvvUint32mf2 == clang::BuiltinType::RvvUint32mf2, "");
-+static_assert((clang::BuiltinType::Kind)ZigClangBuiltinTypeRvvUint32m1 == clang::BuiltinType::RvvUint32m1, "");
-+static_assert((clang::BuiltinType::Kind)ZigClangBuiltinTypeRvvUint32m2 == clang::BuiltinType::RvvUint32m2, "");
-+static_assert((clang::BuiltinType::Kind)ZigClangBuiltinTypeRvvUint32m4 == clang::BuiltinType::RvvUint32m4, "");
-+static_assert((clang::BuiltinType::Kind)ZigClangBuiltinTypeRvvUint32m8 == clang::BuiltinType::RvvUint32m8, "");
-+static_assert((clang::BuiltinType::Kind)ZigClangBuiltinTypeRvvInt64m1 == clang::BuiltinType::RvvInt64m1, "");
-+static_assert((clang::BuiltinType::Kind)ZigClangBuiltinTypeRvvInt64m2 == clang::BuiltinType::RvvInt64m2, "");
-+static_assert((clang::BuiltinType::Kind)ZigClangBuiltinTypeRvvInt64m4 == clang::BuiltinType::RvvInt64m4, "");
-+static_assert((clang::BuiltinType::Kind)ZigClangBuiltinTypeRvvInt64m8 == clang::BuiltinType::RvvInt64m8, "");
-+static_assert((clang::BuiltinType::Kind)ZigClangBuiltinTypeRvvUint64m1 == clang::BuiltinType::RvvUint64m1, "");
-+static_assert((clang::BuiltinType::Kind)ZigClangBuiltinTypeRvvUint64m2 == clang::BuiltinType::RvvUint64m2, "");
-+static_assert((clang::BuiltinType::Kind)ZigClangBuiltinTypeRvvUint64m4 == clang::BuiltinType::RvvUint64m4, "");
-+static_assert((clang::BuiltinType::Kind)ZigClangBuiltinTypeRvvUint64m8 == clang::BuiltinType::RvvUint64m8, "");
-+static_assert((clang::BuiltinType::Kind)ZigClangBuiltinTypeRvvFloat16mf4 == clang::BuiltinType::RvvFloat16mf4, "");
-+static_assert((clang::BuiltinType::Kind)ZigClangBuiltinTypeRvvFloat16mf2 == clang::BuiltinType::RvvFloat16mf2, "");
-+static_assert((clang::BuiltinType::Kind)ZigClangBuiltinTypeRvvFloat16m1 == clang::BuiltinType::RvvFloat16m1, "");
-+static_assert((clang::BuiltinType::Kind)ZigClangBuiltinTypeRvvFloat16m2 == clang::BuiltinType::RvvFloat16m2, "");
-+static_assert((clang::BuiltinType::Kind)ZigClangBuiltinTypeRvvFloat16m4 == clang::BuiltinType::RvvFloat16m4, "");
-+static_assert((clang::BuiltinType::Kind)ZigClangBuiltinTypeRvvFloat16m8 == clang::BuiltinType::RvvFloat16m8, "");
-+static_assert((clang::BuiltinType::Kind)ZigClangBuiltinTypeRvvFloat32mf2 == clang::BuiltinType::RvvFloat32mf2, "");
-+static_assert((clang::BuiltinType::Kind)ZigClangBuiltinTypeRvvFloat32m1 == clang::BuiltinType::RvvFloat32m1, "");
-+static_assert((clang::BuiltinType::Kind)ZigClangBuiltinTypeRvvFloat32m2 == clang::BuiltinType::RvvFloat32m2, "");
-+static_assert((clang::BuiltinType::Kind)ZigClangBuiltinTypeRvvFloat32m4 == clang::BuiltinType::RvvFloat32m4, "");
-+static_assert((clang::BuiltinType::Kind)ZigClangBuiltinTypeRvvFloat32m8 == clang::BuiltinType::RvvFloat32m8, "");
-+static_assert((clang::BuiltinType::Kind)ZigClangBuiltinTypeRvvFloat64m1 == clang::BuiltinType::RvvFloat64m1, "");
-+static_assert((clang::BuiltinType::Kind)ZigClangBuiltinTypeRvvFloat64m2 == clang::BuiltinType::RvvFloat64m2, "");
-+static_assert((clang::BuiltinType::Kind)ZigClangBuiltinTypeRvvFloat64m4 == clang::BuiltinType::RvvFloat64m4, "");
-+static_assert((clang::BuiltinType::Kind)ZigClangBuiltinTypeRvvFloat64m8 == clang::BuiltinType::RvvFloat64m8, "");
-+static_assert((clang::BuiltinType::Kind)ZigClangBuiltinTypeRvvBool1 == clang::BuiltinType::RvvBool1, "");
-+static_assert((clang::BuiltinType::Kind)ZigClangBuiltinTypeRvvBool2 == clang::BuiltinType::RvvBool2, "");
-+static_assert((clang::BuiltinType::Kind)ZigClangBuiltinTypeRvvBool4 == clang::BuiltinType::RvvBool4, "");
-+static_assert((clang::BuiltinType::Kind)ZigClangBuiltinTypeRvvBool8 == clang::BuiltinType::RvvBool8, "");
-+static_assert((clang::BuiltinType::Kind)ZigClangBuiltinTypeRvvBool16 == clang::BuiltinType::RvvBool16, "");
-+static_assert((clang::BuiltinType::Kind)ZigClangBuiltinTypeRvvBool32 == clang::BuiltinType::RvvBool32, "");
-+static_assert((clang::BuiltinType::Kind)ZigClangBuiltinTypeRvvBool64 == clang::BuiltinType::RvvBool64, "");
- static_assert((clang::BuiltinType::Kind)ZigClangBuiltinTypeVoid == clang::BuiltinType::Void, "");
- static_assert((clang::BuiltinType::Kind)ZigClangBuiltinTypeBool == clang::BuiltinType::Bool, "");
- static_assert((clang::BuiltinType::Kind)ZigClangBuiltinTypeChar_U == clang::BuiltinType::Char_U, "");
-@@ -1395,6 +1547,7 @@ void ZigClang_detect_enum_CallingConv(clang::CallingConv x) {
- case clang::CC_SpirFunction:
- case clang::CC_OpenCLKernel:
- case clang::CC_Swift:
-+ case clang::CC_SwiftAsync:
- case clang::CC_PreserveMost:
- case clang::CC_PreserveAll:
- case clang::CC_AArch64VectorCall:
-@@ -1417,6 +1570,7 @@ static_assert((clang::CallingConv)ZigClangCallingConv_IntelOclBicc == clang::CC_
- static_assert((clang::CallingConv)ZigClangCallingConv_SpirFunction == clang::CC_SpirFunction, "");
- static_assert((clang::CallingConv)ZigClangCallingConv_OpenCLKernel == clang::CC_OpenCLKernel, "");
- static_assert((clang::CallingConv)ZigClangCallingConv_Swift == clang::CC_Swift, "");
-+static_assert((clang::CallingConv)ZigClangCallingConv_SwiftAsync == clang::CC_SwiftAsync, "");
- static_assert((clang::CallingConv)ZigClangCallingConv_PreserveMost == clang::CC_PreserveMost, "");
- static_assert((clang::CallingConv)ZigClangCallingConv_PreserveAll == clang::CC_PreserveAll, "");
- static_assert((clang::CallingConv)ZigClangCallingConv_AArch64VectorCall == clang::CC_AArch64VectorCall, "");
-diff --git a/src/zig_clang.h b/src/zig_clang.h
-index 7de5e5466..775f464fc 100644
---- a/src/zig_clang.h
-+++ b/src/zig_clang.h
-@@ -316,13 +316,16 @@ enum ZigClangStmtClass {
- ZigClangStmt_IndirectGotoStmtClass,
- ZigClangStmt_MSDependentExistsStmtClass,
- ZigClangStmt_NullStmtClass,
-+ ZigClangStmt_OMPCanonicalLoopClass,
- ZigClangStmt_OMPAtomicDirectiveClass,
- ZigClangStmt_OMPBarrierDirectiveClass,
- ZigClangStmt_OMPCancelDirectiveClass,
- ZigClangStmt_OMPCancellationPointDirectiveClass,
- ZigClangStmt_OMPCriticalDirectiveClass,
- ZigClangStmt_OMPDepobjDirectiveClass,
-+ ZigClangStmt_OMPDispatchDirectiveClass,
- ZigClangStmt_OMPFlushDirectiveClass,
-+ ZigClangStmt_OMPInteropDirectiveClass,
- ZigClangStmt_OMPDistributeDirectiveClass,
- ZigClangStmt_OMPDistributeParallelForDirectiveClass,
- ZigClangStmt_OMPDistributeParallelForSimdDirectiveClass,
-@@ -348,6 +351,9 @@ enum ZigClangStmtClass {
- ZigClangStmt_OMPTeamsDistributeParallelForDirectiveClass,
- ZigClangStmt_OMPTeamsDistributeParallelForSimdDirectiveClass,
- ZigClangStmt_OMPTeamsDistributeSimdDirectiveClass,
-+ ZigClangStmt_OMPTileDirectiveClass,
-+ ZigClangStmt_OMPUnrollDirectiveClass,
-+ ZigClangStmt_OMPMaskedDirectiveClass,
- ZigClangStmt_OMPMasterDirectiveClass,
- ZigClangStmt_OMPOrderedDirectiveClass,
- ZigClangStmt_OMPParallelDirectiveClass,
-@@ -496,6 +502,7 @@ enum ZigClangStmtClass {
- ZigClangStmt_PseudoObjectExprClass,
- ZigClangStmt_RecoveryExprClass,
- ZigClangStmt_RequiresExprClass,
-+ ZigClangStmt_SYCLUniqueStableNameExprClass,
- ZigClangStmt_ShuffleVectorExprClass,
- ZigClangStmt_SizeOfPackExprClass,
- ZigClangStmt_SourceLocExprClass,
-@@ -538,6 +545,7 @@ enum ZigClangCK {
- ZigClangCK_PointerToIntegral,
- ZigClangCK_PointerToBoolean,
- ZigClangCK_ToVoid,
-+ ZigClangCK_MatrixCast,
- ZigClangCK_VectorSplat,
- ZigClangCK_IntegralCast,
- ZigClangCK_IntegralToBoolean,
-@@ -593,6 +601,8 @@ enum ZigClangDeclKind {
- ZigClangDeclImport,
- ZigClangDeclLifetimeExtendedTemporary,
- ZigClangDeclLinkageSpec,
-+ ZigClangDeclUsing,
-+ ZigClangDeclUsingEnum,
- ZigClangDeclLabel,
- ZigClangDeclNamespace,
- ZigClangDeclNamespaceAlias,
-@@ -621,7 +631,7 @@ enum ZigClangDeclKind {
- ZigClangDeclTypeAlias,
- ZigClangDeclTypedef,
- ZigClangDeclUnresolvedUsingTypename,
-- ZigClangDeclUsing,
-+ ZigClangDeclUnresolvedUsingIfExists,
- ZigClangDeclUsingDirective,
- ZigClangDeclUsingPack,
- ZigClangDeclUsingShadow,
-@@ -763,6 +773,72 @@ enum ZigClangBuiltinTypeKind {
- ZigClangBuiltinTypeSveBool,
- ZigClangBuiltinTypeVectorQuad,
- ZigClangBuiltinTypeVectorPair,
-+ ZigClangBuiltinTypeRvvInt8mf8,
-+ ZigClangBuiltinTypeRvvInt8mf4,
-+ ZigClangBuiltinTypeRvvInt8mf2,
-+ ZigClangBuiltinTypeRvvInt8m1,
-+ ZigClangBuiltinTypeRvvInt8m2,
-+ ZigClangBuiltinTypeRvvInt8m4,
-+ ZigClangBuiltinTypeRvvInt8m8,
-+ ZigClangBuiltinTypeRvvUint8mf8,
-+ ZigClangBuiltinTypeRvvUint8mf4,
-+ ZigClangBuiltinTypeRvvUint8mf2,
-+ ZigClangBuiltinTypeRvvUint8m1,
-+ ZigClangBuiltinTypeRvvUint8m2,
-+ ZigClangBuiltinTypeRvvUint8m4,
-+ ZigClangBuiltinTypeRvvUint8m8,
-+ ZigClangBuiltinTypeRvvInt16mf4,
-+ ZigClangBuiltinTypeRvvInt16mf2,
-+ ZigClangBuiltinTypeRvvInt16m1,
-+ ZigClangBuiltinTypeRvvInt16m2,
-+ ZigClangBuiltinTypeRvvInt16m4,
-+ ZigClangBuiltinTypeRvvInt16m8,
-+ ZigClangBuiltinTypeRvvUint16mf4,
-+ ZigClangBuiltinTypeRvvUint16mf2,
-+ ZigClangBuiltinTypeRvvUint16m1,
-+ ZigClangBuiltinTypeRvvUint16m2,
-+ ZigClangBuiltinTypeRvvUint16m4,
-+ ZigClangBuiltinTypeRvvUint16m8,
-+ ZigClangBuiltinTypeRvvInt32mf2,
-+ ZigClangBuiltinTypeRvvInt32m1,
-+ ZigClangBuiltinTypeRvvInt32m2,
-+ ZigClangBuiltinTypeRvvInt32m4,
-+ ZigClangBuiltinTypeRvvInt32m8,
-+ ZigClangBuiltinTypeRvvUint32mf2,
-+ ZigClangBuiltinTypeRvvUint32m1,
-+ ZigClangBuiltinTypeRvvUint32m2,
-+ ZigClangBuiltinTypeRvvUint32m4,
-+ ZigClangBuiltinTypeRvvUint32m8,
-+ ZigClangBuiltinTypeRvvInt64m1,
-+ ZigClangBuiltinTypeRvvInt64m2,
-+ ZigClangBuiltinTypeRvvInt64m4,
-+ ZigClangBuiltinTypeRvvInt64m8,
-+ ZigClangBuiltinTypeRvvUint64m1,
-+ ZigClangBuiltinTypeRvvUint64m2,
-+ ZigClangBuiltinTypeRvvUint64m4,
-+ ZigClangBuiltinTypeRvvUint64m8,
-+ ZigClangBuiltinTypeRvvFloat16mf4,
-+ ZigClangBuiltinTypeRvvFloat16mf2,
-+ ZigClangBuiltinTypeRvvFloat16m1,
-+ ZigClangBuiltinTypeRvvFloat16m2,
-+ ZigClangBuiltinTypeRvvFloat16m4,
-+ ZigClangBuiltinTypeRvvFloat16m8,
-+ ZigClangBuiltinTypeRvvFloat32mf2,
-+ ZigClangBuiltinTypeRvvFloat32m1,
-+ ZigClangBuiltinTypeRvvFloat32m2,
-+ ZigClangBuiltinTypeRvvFloat32m4,
-+ ZigClangBuiltinTypeRvvFloat32m8,
-+ ZigClangBuiltinTypeRvvFloat64m1,
-+ ZigClangBuiltinTypeRvvFloat64m2,
-+ ZigClangBuiltinTypeRvvFloat64m4,
-+ ZigClangBuiltinTypeRvvFloat64m8,
-+ ZigClangBuiltinTypeRvvBool1,
-+ ZigClangBuiltinTypeRvvBool2,
-+ ZigClangBuiltinTypeRvvBool4,
-+ ZigClangBuiltinTypeRvvBool8,
-+ ZigClangBuiltinTypeRvvBool16,
-+ ZigClangBuiltinTypeRvvBool32,
-+ ZigClangBuiltinTypeRvvBool64,
- ZigClangBuiltinTypeVoid,
- ZigClangBuiltinTypeBool,
- ZigClangBuiltinTypeChar_U,
-@@ -853,6 +929,7 @@ enum ZigClangCallingConv {
- ZigClangCallingConv_SpirFunction, // default for OpenCL functions on SPIR target
- ZigClangCallingConv_OpenCLKernel, // inferred for OpenCL kernels
- ZigClangCallingConv_Swift, // __attribute__((swiftcall))
-+ ZigClangCallingConv_SwiftAsync, // __attribute__((swiftasynccall))
- ZigClangCallingConv_PreserveMost, // __attribute__((preserve_most))
- ZigClangCallingConv_PreserveAll, // __attribute__((preserve_all))
- ZigClangCallingConv_AArch64VectorCall, // __attribute__((aarch64_vector_pcs))
-diff --git a/src/zig_llvm.cpp b/src/zig_llvm.cpp
-index 8c54af4bb..ef58e9a86 100644
---- a/src/zig_llvm.cpp
-+++ b/src/zig_llvm.cpp
-@@ -155,10 +155,6 @@ LLVMTargetMachineRef ZigLLVMCreateTargetMachine(LLVMTargetRef T, const char *Tri
-
- TargetOptions opt;
-
-- // Work around the missing initialization of this field in the default
-- // constructor. Use -1 so that the default value is used.
-- opt.StackProtectorGuardOffset = (unsigned)-1;
--
- opt.FunctionSections = function_sections;
- switch (float_abi) {
- case ZigLLVMABITypeDefault:
-@@ -238,7 +234,7 @@ bool ZigLLVMTargetMachineEmitToFile(LLVMTargetMachineRef targ_machine_ref, LLVMM
-
- if (asm_filename) {
- std::error_code EC;
-- dest_asm_ptr = new(std::nothrow) raw_fd_ostream(asm_filename, EC, sys::fs::F_None);
-+ dest_asm_ptr = new(std::nothrow) raw_fd_ostream(asm_filename, EC, sys::fs::OF_None);
- if (EC) {
- *error_message = strdup((const char *)StringRef(EC.message()).bytes_begin());
- return true;
-@@ -246,7 +242,7 @@ bool ZigLLVMTargetMachineEmitToFile(LLVMTargetMachineRef targ_machine_ref, LLVMM
- }
- if (bin_filename) {
- std::error_code EC;
-- dest_bin_ptr = new(std::nothrow) raw_fd_ostream(bin_filename, EC, sys::fs::F_None);
-+ dest_bin_ptr = new(std::nothrow) raw_fd_ostream(bin_filename, EC, sys::fs::OF_None);
- if (EC) {
- *error_message = strdup((const char *)StringRef(EC.message()).bytes_begin());
- return true;
-@@ -280,7 +276,7 @@ bool ZigLLVMTargetMachineEmitToFile(LLVMTargetMachineRef targ_machine_ref, LLVMM
- StandardInstrumentations std_instrumentations(false);
- std_instrumentations.registerCallbacks(instr_callbacks);
-
-- PassBuilder pass_builder(false, &target_machine, pipeline_opts,
-+ PassBuilder pass_builder(&target_machine, pipeline_opts,
- None, &instr_callbacks);
- using OptimizationLevel = typename PassBuilder::OptimizationLevel;
-
-@@ -975,29 +971,6 @@ void ZigLLVMSetModuleCodeModel(LLVMModuleRef module, LLVMCodeModel code_model) {
- assert(!JIT);
- }
-
--static AtomicOrdering mapFromLLVMOrdering(LLVMAtomicOrdering Ordering) {
-- switch (Ordering) {
-- case LLVMAtomicOrderingNotAtomic: return AtomicOrdering::NotAtomic;
-- case LLVMAtomicOrderingUnordered: return AtomicOrdering::Unordered;
-- case LLVMAtomicOrderingMonotonic: return AtomicOrdering::Monotonic;
-- case LLVMAtomicOrderingAcquire: return AtomicOrdering::Acquire;
-- case LLVMAtomicOrderingRelease: return AtomicOrdering::Release;
-- case LLVMAtomicOrderingAcquireRelease: return AtomicOrdering::AcquireRelease;
-- case LLVMAtomicOrderingSequentiallyConsistent: return AtomicOrdering::SequentiallyConsistent;
-- }
-- abort();
--}
--
--LLVMValueRef ZigLLVMBuildCmpXchg(LLVMBuilderRef builder, LLVMValueRef ptr, LLVMValueRef cmp,
-- LLVMValueRef new_val, LLVMAtomicOrdering success_ordering,
-- LLVMAtomicOrdering failure_ordering, bool is_weak)
--{
-- AtomicCmpXchgInst *inst = unwrap(builder)->CreateAtomicCmpXchg(unwrap(ptr), unwrap(cmp),
-- unwrap(new_val), mapFromLLVMOrdering(success_ordering), mapFromLLVMOrdering(failure_ordering));
-- inst->setWeak(is_weak);
-- return wrap(inst);
--}
--
- LLVMValueRef ZigLLVMBuildNSWShl(LLVMBuilderRef builder, LLVMValueRef LHS, LLVMValueRef RHS,
- const char *name)
- {
-@@ -1197,38 +1170,6 @@ int ZigLLDLinkWasm(int argc, const char **argv, bool can_exit_early) {
- return lld::wasm::link(args, can_exit_early, llvm::outs(), llvm::errs());
- }
-
--static AtomicRMWInst::BinOp toLLVMRMWBinOp(enum ZigLLVM_AtomicRMWBinOp BinOp) {
-- switch (BinOp) {
-- default:
-- case ZigLLVMAtomicRMWBinOpXchg: return AtomicRMWInst::Xchg;
-- case ZigLLVMAtomicRMWBinOpAdd: return AtomicRMWInst::Add;
-- case ZigLLVMAtomicRMWBinOpSub: return AtomicRMWInst::Sub;
-- case ZigLLVMAtomicRMWBinOpAnd: return AtomicRMWInst::And;
-- case ZigLLVMAtomicRMWBinOpNand: return AtomicRMWInst::Nand;
-- case ZigLLVMAtomicRMWBinOpOr: return AtomicRMWInst::Or;
-- case ZigLLVMAtomicRMWBinOpXor: return AtomicRMWInst::Xor;
-- case ZigLLVMAtomicRMWBinOpMax: return AtomicRMWInst::Max;
-- case ZigLLVMAtomicRMWBinOpMin: return AtomicRMWInst::Min;
-- case ZigLLVMAtomicRMWBinOpUMax: return AtomicRMWInst::UMax;
-- case ZigLLVMAtomicRMWBinOpUMin: return AtomicRMWInst::UMin;
-- case ZigLLVMAtomicRMWBinOpFAdd: return AtomicRMWInst::FAdd;
-- case ZigLLVMAtomicRMWBinOpFSub: return AtomicRMWInst::FSub;
-- }
--}
--
--static AtomicOrdering toLLVMOrdering(LLVMAtomicOrdering Ordering) {
-- switch (Ordering) {
-- default:
-- case LLVMAtomicOrderingNotAtomic: return AtomicOrdering::NotAtomic;
-- case LLVMAtomicOrderingUnordered: return AtomicOrdering::Unordered;
-- case LLVMAtomicOrderingMonotonic: return AtomicOrdering::Monotonic;
-- case LLVMAtomicOrderingAcquire: return AtomicOrdering::Acquire;
-- case LLVMAtomicOrderingRelease: return AtomicOrdering::Release;
-- case LLVMAtomicOrderingAcquireRelease: return AtomicOrdering::AcquireRelease;
-- case LLVMAtomicOrderingSequentiallyConsistent: return AtomicOrdering::SequentiallyConsistent;
-- }
--}
--
- inline LLVMAttributeRef wrap(Attribute Attr) {
- return reinterpret_cast<LLVMAttributeRef>(Attr.getRawPointer());
- }
-@@ -1237,16 +1178,6 @@ inline Attribute unwrap(LLVMAttributeRef Attr) {
- return Attribute::fromRawPointer(Attr);
- }
-
--LLVMValueRef ZigLLVMBuildAtomicRMW(LLVMBuilderRef B, enum ZigLLVM_AtomicRMWBinOp op,
-- LLVMValueRef PTR, LLVMValueRef Val,
-- LLVMAtomicOrdering ordering, LLVMBool singleThread)
--{
-- AtomicRMWInst::BinOp intop = toLLVMRMWBinOp(op);
-- return wrap(unwrap(B)->CreateAtomicRMW(intop, unwrap(PTR),
-- unwrap(Val), toLLVMOrdering(ordering),
-- singleThread ? SyncScope::SingleThread : SyncScope::System));
--}
--
- LLVMValueRef ZigLLVMBuildAndReduce(LLVMBuilderRef B, LLVMValueRef Val) {
- return wrap(unwrap(B)->CreateAndReduce(unwrap(Val)));
- }
-@@ -1303,6 +1234,7 @@ static_assert((Triple::ArchType)ZigLLVM_bpfel == Triple::bpfel, "");
- static_assert((Triple::ArchType)ZigLLVM_bpfeb == Triple::bpfeb, "");
- static_assert((Triple::ArchType)ZigLLVM_csky == Triple::csky, "");
- static_assert((Triple::ArchType)ZigLLVM_hexagon == Triple::hexagon, "");
-+static_assert((Triple::ArchType)ZigLLVM_m68k == Triple::m68k, "");
- static_assert((Triple::ArchType)ZigLLVM_mips == Triple::mips, "");
- static_assert((Triple::ArchType)ZigLLVM_mipsel == Triple::mipsel, "");
- static_assert((Triple::ArchType)ZigLLVM_mips64 == Triple::mips64, "");
-@@ -1419,6 +1351,7 @@ static_assert((Triple::EnvironmentType)ZigLLVM_Android == Triple::Android, "");
- static_assert((Triple::EnvironmentType)ZigLLVM_Musl == Triple::Musl, "");
- static_assert((Triple::EnvironmentType)ZigLLVM_MuslEABI == Triple::MuslEABI, "");
- static_assert((Triple::EnvironmentType)ZigLLVM_MuslEABIHF == Triple::MuslEABIHF, "");
-+static_assert((Triple::EnvironmentType)ZigLLVM_MuslX32 == Triple::MuslX32, "");
- static_assert((Triple::EnvironmentType)ZigLLVM_MSVC == Triple::MSVC, "");
- static_assert((Triple::EnvironmentType)ZigLLVM_Itanium == Triple::Itanium, "");
- static_assert((Triple::EnvironmentType)ZigLLVM_Cygnus == Triple::Cygnus, "");
-diff --git a/src/zig_llvm.h b/src/zig_llvm.h
-index 32a969f70..d2008f8f6 100644
---- a/src/zig_llvm.h
-+++ b/src/zig_llvm.h
-@@ -128,10 +128,6 @@ ZIG_EXTERN_C LLVMValueRef ZigLLVMBuildMemCpy(LLVMBuilderRef B, LLVMValueRef Dst,
- ZIG_EXTERN_C LLVMValueRef ZigLLVMBuildMemSet(LLVMBuilderRef B, LLVMValueRef Ptr, LLVMValueRef Val, LLVMValueRef Size,
- unsigned Align, bool isVolatile);
-
--ZIG_EXTERN_C LLVMValueRef ZigLLVMBuildCmpXchg(LLVMBuilderRef builder, LLVMValueRef ptr, LLVMValueRef cmp,
-- LLVMValueRef new_val, LLVMAtomicOrdering success_ordering,
-- LLVMAtomicOrdering failure_ordering, bool is_weak);
--
- ZIG_EXTERN_C LLVMValueRef ZigLLVMBuildNSWShl(LLVMBuilderRef builder, LLVMValueRef LHS, LLVMValueRef RHS,
- const char *name);
- ZIG_EXTERN_C LLVMValueRef ZigLLVMBuildNUWShl(LLVMBuilderRef builder, LLVMValueRef LHS, LLVMValueRef RHS,
-@@ -293,6 +289,7 @@ enum ZigLLVM_ArchType {
- ZigLLVM_bpfeb, // eBPF or extended BPF or 64-bit BPF (big endian)
- ZigLLVM_csky, // CSKY: csky
- ZigLLVM_hexagon, // Hexagon: hexagon
-+ ZigLLVM_m68k, // M68k: Motorola 680x0 family
- ZigLLVM_mips, // MIPS: mips, mipsallegrex, mipsr6
- ZigLLVM_mipsel, // MIPSEL: mipsel, mipsallegrexe, mipsr6el
- ZigLLVM_mips64, // MIPS64: mips64, mips64r6, mipsn32, mipsn32r6
-@@ -335,7 +332,6 @@ enum ZigLLVM_ArchType {
- ZigLLVM_renderscript32, // 32-bit RenderScript
- ZigLLVM_renderscript64, // 64-bit RenderScript
- ZigLLVM_ve, // NEC SX-Aurora Vector Engine
--
- ZigLLVM_LastArchType = ZigLLVM_ve
- };
-
-@@ -420,6 +416,7 @@ enum ZigLLVM_EnvironmentType {
- ZigLLVM_Musl,
- ZigLLVM_MuslEABI,
- ZigLLVM_MuslEABIHF,
-+ ZigLLVM_MuslX32,
-
- ZigLLVM_MSVC,
- ZigLLVM_Itanium,
-@@ -427,7 +424,6 @@ enum ZigLLVM_EnvironmentType {
- ZigLLVM_CoreCLR,
- ZigLLVM_Simulator, // Simulator variants of other systems, e.g., Apple's iOS
- ZigLLVM_MacABI, // Mac Catalyst variant of Apple's iOS deployment target.
--
- ZigLLVM_LastEnvironmentType = ZigLLVM_MacABI
- };
-
-@@ -442,26 +438,6 @@ enum ZigLLVM_ObjectFormatType {
- ZigLLVM_XCOFF,
- };
-
--enum ZigLLVM_AtomicRMWBinOp {
-- ZigLLVMAtomicRMWBinOpXchg,
-- ZigLLVMAtomicRMWBinOpAdd,
-- ZigLLVMAtomicRMWBinOpSub,
-- ZigLLVMAtomicRMWBinOpAnd,
-- ZigLLVMAtomicRMWBinOpNand,
-- ZigLLVMAtomicRMWBinOpOr,
-- ZigLLVMAtomicRMWBinOpXor,
-- ZigLLVMAtomicRMWBinOpMax,
-- ZigLLVMAtomicRMWBinOpMin,
-- ZigLLVMAtomicRMWBinOpUMax,
-- ZigLLVMAtomicRMWBinOpUMin,
-- ZigLLVMAtomicRMWBinOpFAdd,
-- ZigLLVMAtomicRMWBinOpFSub,
--};
--
--LLVMValueRef ZigLLVMBuildAtomicRMW(LLVMBuilderRef B, enum ZigLLVM_AtomicRMWBinOp op,
-- LLVMValueRef PTR, LLVMValueRef Val,
-- LLVMAtomicOrdering ordering, LLVMBool singleThread);
--
- LLVMValueRef ZigLLVMBuildAndReduce(LLVMBuilderRef B, LLVMValueRef Val);
- LLVMValueRef ZigLLVMBuildOrReduce(LLVMBuilderRef B, LLVMValueRef Val);
- LLVMValueRef ZigLLVMBuildXorReduce(LLVMBuilderRef B, LLVMValueRef Val);
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