[arch-commits] Commit in llvm/trunk (2 files)

[Evangelos Foutras]

    Date: Tuesday, February 2, 2021 @ 23:58:46
  Author: foutrelis
Revision: 407107

upgpkg: llvm 11.0.1-2: fix shader compilation in blender

Added:
  llvm/trunk/amdgpu-avoid-an-illegal-operand-in-si-shrink-instr.patch
Modified:
  llvm/trunk/PKGBUILD

----------------------------------------------------------+
 PKGBUILD                                                 |    8 +
 amdgpu-avoid-an-illegal-operand-in-si-shrink-instr.patch |   85 +++++++++++++
 2 files changed, 92 insertions(+), 1 deletion(-)

Modified: PKGBUILD
===================================================================
--- PKGBUILD	2021-02-02 23:15:19 UTC (rev 407106)
+++ PKGBUILD	2021-02-02 23:58:46 UTC (rev 407107)
@@ -3,7 +3,7 @@
 
 pkgname=('llvm' 'llvm-libs' 'llvm-ocaml')
 pkgver=11.0.1
-pkgrel=1
+pkgrel=2
 _ocaml_ver=4.11.1
 arch=('x86_64')
 url="https://llvm.org/"
@@ -15,9 +15,11 @@
 options=('staticlibs')
 _source_base=https://github.com/llvm/llvm-project/releases/download/llvmorg-$pkgver
 source=($_source_base/$pkgname-$pkgver.src.tar.xz{,.sig}
+        amdgpu-avoid-an-illegal-operand-in-si-shrink-instr.patch
         llvm-config.h)
 sha256sums=('ccd87c254b6aebc5077e4e6977d08d4be888e7eb672c6630a26a15d58b59b528'
             'SKIP'
+            '85b6977005899bc76fcc548e0b6501cae5f50a8ad03060b9f58d03d775323327'
             '597dc5968c695bbdbb0eac9e8eb5117fcd2773bc91edf5ec103ecffffab8bc48')
 validpgpkeys+=('B6C8F98282B944E3B0D5C2530FC3042E345AD05D') # Hans Wennborg <hans at chromium.org>
 validpgpkeys+=('474E22316ABF4785A88C6E8EA2C794A986419D8A') # Tom Stellard <tstellar at redhat.com>
@@ -25,6 +27,10 @@
 prepare() {
   cd "$srcdir/llvm-$pkgver.src"
   mkdir build
+
+  # https://gitlab.freedesktop.org/mesa/mesa/-/issues/4107
+  # https://bugs.llvm.org/show_bug.cgi?id=48921#c2
+  patch -Np2 -i ../amdgpu-avoid-an-illegal-operand-in-si-shrink-instr.patch
 }
 
 build() {

Added: amdgpu-avoid-an-illegal-operand-in-si-shrink-instr.patch
===================================================================
--- amdgpu-avoid-an-illegal-operand-in-si-shrink-instr.patch	                        (rev 0)
+++ amdgpu-avoid-an-illegal-operand-in-si-shrink-instr.patch	2021-02-02 23:58:46 UTC (rev 407107)
@@ -0,0 +1,85 @@
+commit b08a140a8fe8d0b0d16a93042b4952d6e34ab913
+Author: Piotr Sobczak <Piotr.Sobczak at amd.com>
+Date:   Wed Jan 27 16:02:49 2021 +0100
+
+    [AMDGPU] Avoid an illegal operand in si-shrink-instructions
+    
+    Before the patch it was possible to trigger a constant bus
+    violation when folding immediates into a shrunk instruction.
+    
+    The patch adds a check to enforce the legality of the new operand.
+    
+    Differential Revision: https://reviews.llvm.org/D95527
+
+diff --git a/llvm/lib/Target/AMDGPU/SIShrinkInstructions.cpp b/llvm/lib/Target/AMDGPU/SIShrinkInstructions.cpp
+index 9c6833a7dab6..6c1b16eddc84 100644
+--- a/llvm/lib/Target/AMDGPU/SIShrinkInstructions.cpp
++++ b/llvm/lib/Target/AMDGPU/SIShrinkInstructions.cpp
+@@ -84,21 +84,23 @@ static bool foldImmediates(MachineInstr &MI, const SIInstrInfo *TII,
+         MachineOperand &MovSrc = Def->getOperand(1);
+         bool ConstantFolded = false;
+ 
+-        if (MovSrc.isImm() && (isInt<32>(MovSrc.getImm()) ||
+-                               isUInt<32>(MovSrc.getImm()))) {
+-          // It's possible to have only one component of a super-reg defined by
+-          // a single mov, so we need to clear any subregister flag.
+-          Src0.setSubReg(0);
+-          Src0.ChangeToImmediate(MovSrc.getImm());
+-          ConstantFolded = true;
+-        } else if (MovSrc.isFI()) {
+-          Src0.setSubReg(0);
+-          Src0.ChangeToFrameIndex(MovSrc.getIndex());
+-          ConstantFolded = true;
+-        } else if (MovSrc.isGlobal()) {
+-          Src0.ChangeToGA(MovSrc.getGlobal(), MovSrc.getOffset(),
+-                          MovSrc.getTargetFlags());
+-          ConstantFolded = true;
++        if (TII->isOperandLegal(MI, Src0Idx, &MovSrc)) {
++          if (MovSrc.isImm() &&
++              (isInt<32>(MovSrc.getImm()) || isUInt<32>(MovSrc.getImm()))) {
++            // It's possible to have only one component of a super-reg defined
++            // by a single mov, so we need to clear any subregister flag.
++            Src0.setSubReg(0);
++            Src0.ChangeToImmediate(MovSrc.getImm());
++            ConstantFolded = true;
++          } else if (MovSrc.isFI()) {
++            Src0.setSubReg(0);
++            Src0.ChangeToFrameIndex(MovSrc.getIndex());
++            ConstantFolded = true;
++          } else if (MovSrc.isGlobal()) {
++            Src0.ChangeToGA(MovSrc.getGlobal(), MovSrc.getOffset(),
++                            MovSrc.getTargetFlags());
++            ConstantFolded = true;
++          }
+         }
+ 
+         if (ConstantFolded) {
+diff --git a/llvm/test/CodeGen/AMDGPU/shrink-instructions-illegal-fold.mir b/llvm/test/CodeGen/AMDGPU/shrink-instructions-illegal-fold.mir
+new file mode 100644
+index 000000000000..7889f437facf
+--- /dev/null
++++ b/llvm/test/CodeGen/AMDGPU/shrink-instructions-illegal-fold.mir
+@@ -0,0 +1,23 @@
++# RUN: llc -march=amdgcn -mcpu=gfx900 -run-pass=si-shrink-instructions --verify-machineinstrs %s -o - | FileCheck %s
++
++# Make sure immediate folding into V_CNDMASK respects constant bus restrictions.
++---
++
++name:            shrink_cndmask_illegal_imm_folding
++tracksRegLiveness: true
++body:             |
++  bb.0:
++    liveins: $vgpr0, $vgpr1
++    ; CHECK-LABEL: name: shrink_cndmask_illegal_imm_folding
++    ; CHECK: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
++    ; CHECK: [[MOV:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 32768, implicit $exec
++    ; CHECK: V_CMP_EQ_U32_e32 0, [[COPY]], implicit-def $vcc, implicit $exec
++    ; CHECK: V_CNDMASK_B32_e32 [[MOV]], killed [[COPY]], implicit $vcc, implicit $exec
++
++    %0:vgpr_32 = COPY $vgpr0
++    %1:vgpr_32 = V_MOV_B32_e32 32768, implicit $exec
++    V_CMP_EQ_U32_e32 0, %0:vgpr_32, implicit-def $vcc, implicit $exec
++    %2:vgpr_32 = V_CNDMASK_B32_e64 0, %1:vgpr_32, 0, killed %0:vgpr_32, $vcc, implicit $exec
++    S_NOP 0
++
++...