[arch-commits] Commit in llvm11/repos (5 files)
Evangelos Foutras
foutrelis at archlinux.org
Mon Jun 21 11:14:34 UTC 2021
Date: Monday, June 21, 2021 @ 11:14:34
Author: foutrelis
Revision: 418541
archrelease: copy trunk to extra-x86_64
Added:
llvm11/repos/extra-x86_64/
llvm11/repos/extra-x86_64/PKGBUILD
(from rev 418540, llvm11/trunk/PKGBUILD)
llvm11/repos/extra-x86_64/amdgpu-avoid-an-illegal-operand-in-si-shrink-instr.patch
(from rev 418540, llvm11/trunk/amdgpu-avoid-an-illegal-operand-in-si-shrink-instr.patch)
llvm11/repos/extra-x86_64/no-strict-aliasing-DwarfCompileUnit.patch
(from rev 418540, llvm11/trunk/no-strict-aliasing-DwarfCompileUnit.patch)
llvm11/repos/extra-x86_64/utils-benchmark-fix-missing-include.patch
(from rev 418540, llvm11/trunk/utils-benchmark-fix-missing-include.patch)
----------------------------------------------------------+
PKGBUILD | 122 +++++++++++++
amdgpu-avoid-an-illegal-operand-in-si-shrink-instr.patch | 85 +++++++++
no-strict-aliasing-DwarfCompileUnit.patch | 13 +
utils-benchmark-fix-missing-include.patch | 21 ++
4 files changed, 241 insertions(+)
Copied: llvm11/repos/extra-x86_64/PKGBUILD (from rev 418540, llvm11/trunk/PKGBUILD)
===================================================================
--- extra-x86_64/PKGBUILD (rev 0)
+++ extra-x86_64/PKGBUILD 2021-06-21 11:14:34 UTC (rev 418541)
@@ -0,0 +1,122 @@
+# Maintainer: Evangelos Foutras <evangelos at foutrelis.com>
+# Contributor: Jan "heftig" Steffens <jan.steffens at gmail.com>
+
+pkgname=('llvm11' 'llvm11-libs')
+pkgver=11.1.0
+pkgrel=3
+arch=('x86_64')
+url="https://llvm.org/"
+license=('custom:Apache 2.0 with LLVM Exception')
+makedepends=('cmake' 'ninja' 'libffi' 'libedit' 'ncurses' 'libxml2'
+ 'python-setuptools')
+options=('staticlibs')
+_source_base=https://github.com/llvm/llvm-project/releases/download/llvmorg-$pkgver
+source=($_source_base/llvm-$pkgver.src.tar.xz{,.sig}
+ utils-benchmark-fix-missing-include.patch
+ amdgpu-avoid-an-illegal-operand-in-si-shrink-instr.patch
+ no-strict-aliasing-DwarfCompileUnit.patch)
+sha256sums=('ce8508e318a01a63d4e8b3090ab2ded3c598a50258cc49e2625b9120d4c03ea5'
+ 'SKIP'
+ '5f666675fd45848e4c4b0f94068f7648dd9ff88df4a7b19d2a9f2b83ee358a7e'
+ '85b6977005899bc76fcc548e0b6501cae5f50a8ad03060b9f58d03d775323327'
+ 'd1eff24508e35aae6c26a943dbaa3ef5acb60a145b008fd1ef9ac6f6c4faa662')
+validpgpkeys+=('B6C8F98282B944E3B0D5C2530FC3042E345AD05D') # Hans Wennborg <hans at chromium.org>
+validpgpkeys+=('474E22316ABF4785A88C6E8EA2C794A986419D8A') # Tom Stellard <tstellar at redhat.com>
+
+# Utilizing LLVM_DISTRIBUTION_COMPONENTS to avoid
+# CMake reference to LLVMgold; inspired by Gentoo
+_get_distribution_components() {
+ local target
+ ninja -t targets | grep -Po 'install-\K.*(?=-stripped:)' | while read -r target; do
+ case $target in
+ llvm-libraries|distribution)
+ continue
+ ;;
+ LLVMgold)
+ continue
+ ;;
+ esac
+ echo $target
+ done
+}
+
+prepare() {
+ cd "$srcdir/llvm-$pkgver.src"
+ mkdir build
+
+ patch -Np2 -i ../utils-benchmark-fix-missing-include.patch
+
+ # https://gitlab.freedesktop.org/mesa/mesa/-/issues/4107
+ # https://bugs.llvm.org/show_bug.cgi?id=48921#c2
+ patch -Np2 -i ../amdgpu-avoid-an-illegal-operand-in-si-shrink-instr.patch
+
+ # https://bugs.llvm.org/show_bug.cgi?id=50611#c3
+ patch -Np2 -i ../no-strict-aliasing-DwarfCompileUnit.patch
+}
+
+build() {
+ cd "$srcdir/llvm-$pkgver.src/build"
+
+ local cmake_args=(
+ -G Ninja
+ -DCMAKE_BUILD_TYPE=Release
+ -DCMAKE_INSTALL_PREFIX=/usr
+ -DLLVM_HOST_TRIPLE=$CHOST
+ -DLLVM_BUILD_LLVM_DYLIB=ON
+ -DLLVM_LINK_LLVM_DYLIB=ON
+ -DLLVM_INSTALL_UTILS=ON
+ -DLLVM_ENABLE_RTTI=ON
+ -DLLVM_ENABLE_FFI=ON
+ -DLLVM_BUILD_TESTS=ON
+ -DLLVM_BINUTILS_INCDIR=/usr/include
+ )
+
+ cmake .. "${cmake_args[@]}"
+ local distribution_components=$(_get_distribution_components | paste -sd\;)
+ test -n "$distribution_components"
+ cmake_args+=(-DLLVM_DISTRIBUTION_COMPONENTS="$distribution_components")
+
+ cmake .. "${cmake_args[@]}"
+ ninja
+}
+
+check() {
+ cd "$srcdir/llvm-$pkgver.src/build"
+ ninja check
+}
+
+package_llvm11() {
+ pkgdesc="Collection of modular and reusable compiler and toolchain technologies"
+ depends=('llvm11-libs' 'perl')
+ conflicts=('llvm')
+
+ cd "$srcdir/llvm-$pkgver.src/build"
+
+ DESTDIR="$pkgdir" ninja install-distribution
+
+ # Include lit for running lit-based tests in other projects
+ pushd ../utils/lit
+ python3 setup.py install --root="$pkgdir" -O1
+ popd
+
+ # The runtime libraries go into llvm11-libs
+ mv -f "$pkgdir"/usr/lib/lib{LLVM-*.so,{LTO,Remarks}.so.*} "$srcdir"
+
+ # Remove files which conflict with llvm-libs
+ rm "$pkgdir"/usr/lib/lib{LLVM,LTO,Remarks}.so
+
+ install -Dm644 ../LICENSE.TXT "$pkgdir/usr/share/licenses/$pkgname/LICENSE"
+}
+
+package_llvm11-libs() {
+ pkgdesc="LLVM 11 runtime libraries"
+ depends=('gcc-libs' 'zlib' 'libffi' 'libedit' 'ncurses' 'libxml2')
+
+ install -d "$pkgdir/usr/lib"
+ cp -P "$srcdir"/lib{LLVM-*.so,{LTO,Remarks}.so.*} "$pkgdir/usr/lib/"
+
+ install -Dm644 "$srcdir/llvm-$pkgver.src/LICENSE.TXT" \
+ "$pkgdir/usr/share/licenses/$pkgname/LICENSE"
+}
+
+# vim:set ts=2 sw=2 et:
Copied: llvm11/repos/extra-x86_64/amdgpu-avoid-an-illegal-operand-in-si-shrink-instr.patch (from rev 418540, llvm11/trunk/amdgpu-avoid-an-illegal-operand-in-si-shrink-instr.patch)
===================================================================
--- extra-x86_64/amdgpu-avoid-an-illegal-operand-in-si-shrink-instr.patch (rev 0)
+++ extra-x86_64/amdgpu-avoid-an-illegal-operand-in-si-shrink-instr.patch 2021-06-21 11:14:34 UTC (rev 418541)
@@ -0,0 +1,85 @@
+commit b08a140a8fe8d0b0d16a93042b4952d6e34ab913
+Author: Piotr Sobczak <Piotr.Sobczak at amd.com>
+Date: Wed Jan 27 16:02:49 2021 +0100
+
+ [AMDGPU] Avoid an illegal operand in si-shrink-instructions
+
+ Before the patch it was possible to trigger a constant bus
+ violation when folding immediates into a shrunk instruction.
+
+ The patch adds a check to enforce the legality of the new operand.
+
+ Differential Revision: https://reviews.llvm.org/D95527
+
+diff --git a/llvm/lib/Target/AMDGPU/SIShrinkInstructions.cpp b/llvm/lib/Target/AMDGPU/SIShrinkInstructions.cpp
+index 9c6833a7dab6..6c1b16eddc84 100644
+--- a/llvm/lib/Target/AMDGPU/SIShrinkInstructions.cpp
++++ b/llvm/lib/Target/AMDGPU/SIShrinkInstructions.cpp
+@@ -84,21 +84,23 @@ static bool foldImmediates(MachineInstr &MI, const SIInstrInfo *TII,
+ MachineOperand &MovSrc = Def->getOperand(1);
+ bool ConstantFolded = false;
+
+- if (MovSrc.isImm() && (isInt<32>(MovSrc.getImm()) ||
+- isUInt<32>(MovSrc.getImm()))) {
+- // It's possible to have only one component of a super-reg defined by
+- // a single mov, so we need to clear any subregister flag.
+- Src0.setSubReg(0);
+- Src0.ChangeToImmediate(MovSrc.getImm());
+- ConstantFolded = true;
+- } else if (MovSrc.isFI()) {
+- Src0.setSubReg(0);
+- Src0.ChangeToFrameIndex(MovSrc.getIndex());
+- ConstantFolded = true;
+- } else if (MovSrc.isGlobal()) {
+- Src0.ChangeToGA(MovSrc.getGlobal(), MovSrc.getOffset(),
+- MovSrc.getTargetFlags());
+- ConstantFolded = true;
++ if (TII->isOperandLegal(MI, Src0Idx, &MovSrc)) {
++ if (MovSrc.isImm() &&
++ (isInt<32>(MovSrc.getImm()) || isUInt<32>(MovSrc.getImm()))) {
++ // It's possible to have only one component of a super-reg defined
++ // by a single mov, so we need to clear any subregister flag.
++ Src0.setSubReg(0);
++ Src0.ChangeToImmediate(MovSrc.getImm());
++ ConstantFolded = true;
++ } else if (MovSrc.isFI()) {
++ Src0.setSubReg(0);
++ Src0.ChangeToFrameIndex(MovSrc.getIndex());
++ ConstantFolded = true;
++ } else if (MovSrc.isGlobal()) {
++ Src0.ChangeToGA(MovSrc.getGlobal(), MovSrc.getOffset(),
++ MovSrc.getTargetFlags());
++ ConstantFolded = true;
++ }
+ }
+
+ if (ConstantFolded) {
+diff --git a/llvm/test/CodeGen/AMDGPU/shrink-instructions-illegal-fold.mir b/llvm/test/CodeGen/AMDGPU/shrink-instructions-illegal-fold.mir
+new file mode 100644
+index 000000000000..7889f437facf
+--- /dev/null
++++ b/llvm/test/CodeGen/AMDGPU/shrink-instructions-illegal-fold.mir
+@@ -0,0 +1,23 @@
++# RUN: llc -march=amdgcn -mcpu=gfx900 -run-pass=si-shrink-instructions --verify-machineinstrs %s -o - | FileCheck %s
++
++# Make sure immediate folding into V_CNDMASK respects constant bus restrictions.
++---
++
++name: shrink_cndmask_illegal_imm_folding
++tracksRegLiveness: true
++body: |
++ bb.0:
++ liveins: $vgpr0, $vgpr1
++ ; CHECK-LABEL: name: shrink_cndmask_illegal_imm_folding
++ ; CHECK: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
++ ; CHECK: [[MOV:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 32768, implicit $exec
++ ; CHECK: V_CMP_EQ_U32_e32 0, [[COPY]], implicit-def $vcc, implicit $exec
++ ; CHECK: V_CNDMASK_B32_e32 [[MOV]], killed [[COPY]], implicit $vcc, implicit $exec
++
++ %0:vgpr_32 = COPY $vgpr0
++ %1:vgpr_32 = V_MOV_B32_e32 32768, implicit $exec
++ V_CMP_EQ_U32_e32 0, %0:vgpr_32, implicit-def $vcc, implicit $exec
++ %2:vgpr_32 = V_CNDMASK_B32_e64 0, %1:vgpr_32, 0, killed %0:vgpr_32, $vcc, implicit $exec
++ S_NOP 0
++
++...
Copied: llvm11/repos/extra-x86_64/no-strict-aliasing-DwarfCompileUnit.patch (from rev 418540, llvm11/trunk/no-strict-aliasing-DwarfCompileUnit.patch)
===================================================================
--- extra-x86_64/no-strict-aliasing-DwarfCompileUnit.patch (rev 0)
+++ extra-x86_64/no-strict-aliasing-DwarfCompileUnit.patch 2021-06-21 11:14:34 UTC (rev 418541)
@@ -0,0 +1,13 @@
+diff --git a/llvm/lib/CodeGen/AsmPrinter/CMakeLists.txt b/llvm/lib/CodeGen/AsmPrinter/CMakeLists.txt
+index eb924282a75e..85929b54d6ce 100644
+--- a/llvm/lib/CodeGen/AsmPrinter/CMakeLists.txt
++++ b/llvm/lib/CodeGen/AsmPrinter/CMakeLists.txt
+@@ -44,3 +44,8 @@ add_llvm_component_library(LLVMAsmPrinter
+ Support
+ Target
+ )
++
++# https://bugs.llvm.org/show_bug.cgi?id=50611#c3
++if (CMAKE_COMPILER_IS_GNUCXX)
++ set_source_files_properties(DwarfCompileUnit.cpp PROPERTIES COMPILE_FLAGS -fno-strict-aliasing)
++endif()
Copied: llvm11/repos/extra-x86_64/utils-benchmark-fix-missing-include.patch (from rev 418540, llvm11/trunk/utils-benchmark-fix-missing-include.patch)
===================================================================
--- extra-x86_64/utils-benchmark-fix-missing-include.patch (rev 0)
+++ extra-x86_64/utils-benchmark-fix-missing-include.patch 2021-06-21 11:14:34 UTC (rev 418541)
@@ -0,0 +1,21 @@
+From b498303066a63a203d24f739b2d2e0e56dca70d1 Mon Sep 17 00:00:00 2001
+From: serge-sans-paille <sguelton at redhat.com>
+Date: Tue, 10 Nov 2020 14:55:25 +0100
+Subject: [PATCH] [nfc] Fix missing include
+
+---
+ llvm/utils/benchmark/src/benchmark_register.h | 1 +
+ 1 file changed, 1 insertion(+)
+
+diff --git a/llvm/utils/benchmark/src/benchmark_register.h b/llvm/utils/benchmark/src/benchmark_register.h
+index 0705e219f2fa..4caa5ad4da07 100644
+--- a/llvm/utils/benchmark/src/benchmark_register.h
++++ b/llvm/utils/benchmark/src/benchmark_register.h
+@@ -1,6 +1,7 @@
+ #ifndef BENCHMARK_REGISTER_H
+ #define BENCHMARK_REGISTER_H
+
++#include <limits>
+ #include <vector>
+
+ #include "check.h"
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