[arch-commits] Commit in verilator/trunk (PKGBUILD)

[Felix Yan]

    Date: Sunday, September 12, 2021 @ 02:30:13
  Author: felixonmars
Revision: 1014382

upgpkg: verilator 4.212-1

Modified:
  verilator/trunk/PKGBUILD

----------+
 PKGBUILD |   10 +++++-----
 1 file changed, 5 insertions(+), 5 deletions(-)

Modified: PKGBUILD
===================================================================
--- PKGBUILD	2021-09-11 23:56:40 UTC (rev 1014381)
+++ PKGBUILD	2021-09-12 02:30:13 UTC (rev 1014382)
@@ -3,8 +3,8 @@
 # Contributor: Jeffrey Tolar <tolar.jeffrey at gmail dot com>
 
 pkgname=verilator
-pkgver=4.210
-pkgrel=2
+pkgver=4.212
+pkgrel=1
 pkgdesc='The fastest free Verilog HDL simulator'
 url='https://www.veripool.org/projects/verilator/wiki/Intro'
 arch=('x86_64')
@@ -12,12 +12,12 @@
 depends=('perl')
 optdepends=('systemc')
 makedepends=('python' 'systemc')
-source=("https://www.veripool.org/ftp/verilator-$pkgver.tgz")
-sha512sums=('ca16cf2c2f3ce6da5b7dadb47358efea1c0179fdfd8ea021cf1a9ffea85f3d01432582791be60a5425256776c2d9fec9b6e382a1a719b8c63630f07d4ea7afb0')
+source=("https://github.com/verilator/verilator/archive/v$pkgver/$pkgname-$pkgver.tar.gz")
+sha512sums=('efa6d38a1a2e4bde67fd2914f3fb88ea2f7d7d40b9309932ce1e307dfeccd3fefb4fbf3fd5e277232e0fc1ed315b5aa65ae48e6f567c14db0b84e245e9c02095')
 
 prepare() {
   cd verilator-$pkgver
-  sed -i 's/#_MY_CXX_CHECK_SET(CFG_CXXFLAGS_STD_NEWEST,-std=gnu++17)/_MY_CXX_CHECK_SET(CFG_CXXFLAGS_STD_NEWEST,-std=gnu++17)/' configure.ac
+  sed -i 's/#_MY_CXX_CHECK_SET(CFG_CXXFLAGS_STD_NEWEST,-std=c++17)/_MY_CXX_CHECK_SET(CFG_CXXFLAGS_STD_NEWEST,-std=c++17)/' configure.ac
   autoconf
 }