[arch-dev-public] i686 and SSE2

[Balló György]

2016-09-19 7:02 GMT+02:00 Allan McRae <allan at archlinux.org>:

> This goes beyond just adding SSE2 support.
>
> Years ago, Arch Linux was "optimised for modern processors".  These were
> the days when every other distro was using i386 and we had a blazingly
> fast i686 port.  Now every other distro uses i686 while we have sat
> still.  Even major software developments are starting to require SSE2.
> It is time we moved forward.
>
> How can we achieve this?  I see several options:
>
> 1) Do "nothing".  Add a hook to the filesystem package that detects
> whether a system has SSE2 support and blocks installation of certain
> packages.
>
> 2) Add SSE2 to our optimisations and require "i686 + SSE2"
>
> 3) Move our minimum CPU to something less than 20 years old  (even i786
> would get us SSE2+3 instructions and is 15 years old)
>
> 4) We add more modern CPU builds  (and set them automatically building
> once the base architecture is updated).
>
>
> I am in favour of #3 for our 32-bit support.  And that would be end of
> line as far as 32 bit support in this distribution goes.
>
>
> (We may want to consider #4 for our x86_64, but that is another
> conversation).
>
> Allan
>


I would not be happy with #3, because I still have two 13 years old systems
with NetBurst-based CPUs without SSE3 support. But of course I don't use
them in everyday use.

So I'm in favour of #2, requiring SSE and SSE2 would be OK for me.


- model name: Intel(R) Celeron(R) CPU 2.10GHz
- flags: fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat
pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe pebs bts eagerfpu

- model name: Intel(R) Celeron(R) CPU 1.80GHz
- flags: fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat
pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pebs bts eagerfpu

--
György Balló
Trusted User