[arch-general] [arch-dev-public] Changes to microcode updates

[Neitsab]

On 2014-10-23 00:45 (UTC+2) Genes Lists wrote: 

On 10/23/2014 06:34 PM, Jody Allen wrote:
...

> Is anyone only having one core updated?  I get this:
>  > dmesg | grep microcode
> [    0.000000] CPU0 microcode updated early to revision 0x29, date =
> 2013-06-12
> [    0.344194] microcode: CPU0 sig=0x206a7, pf=0x10, revision=0x29
> [    0.344203] microcode: CPU1 sig=0x206a7, pf=0x10, revision=0x28
> [    0.344260] microcode: Microcode Update Driver: v2.00
> <tigran at aivazian.fsnet.co.uk>, Peter Oruba
>
> I checked dmesg and I can find no error messages.
>

I am only getting even cores updated (which may be same as you are seeing).

dmesg | egrep microcode
[    0.000000] CPU0 microcode updated early to revision 0x1c, date = 
2014-07-03
[    0.305434] CPU2 microcode updated early to revision 0x1c, date = 
2014-07-03
[    0.345462] CPU4 microcode updated early to revision 0x1c, date = 
2014-07-03
[    0.385501] CPU6 microcode updated early to revision 0x1c, date = 
2014-07-03
[    0.961766] microcode: CPU0 sig=0x306c3, pf=0x10, revision=0x1c
[    0.961785] microcode: CPU1 sig=0x306c3, pf=0x10, revision=0x1c
[    0.961805] microcode: CPU2 sig=0x306c3, pf=0x10, revision=0x1c
[    0.961825] microcode: CPU3 sig=0x306c3, pf=0x10, revision=0x1c
[    0.961836] microcode: CPU4 sig=0x306c3, pf=0x10, revision=0x1c
[    0.961857] microcode: CPU5 sig=0x306c3, pf=0x10, revision=0x1c
[    0.961876] microcode: CPU6 sig=0x306c3, pf=0x10, revision=0x1c
[    0.961897] microcode: CPU7 sig=0x306c3, pf=0x10, revision=0x1c
[    0.962003] microcode: Microcode Update Driver: v2.00 
<tigran at aivazian.fsnet.co.uk>, Peter Oruba


My guess is it's because of hyperthreading: my CPU has 2 physical cores but kernel detects 4 CPUs; however only "real"/physical cores get the microcode update, so two (0 and 2) out of the four detected.