[ASA-202006-10] intel-ucode: information disclosure
rgacogne at archlinux.org
Tue Jun 16 16:35:16 UTC 2020
Arch Linux Security Advisory ASA-202006-10
Date : 2020-06-13
CVE-ID : CVE-2020-0543 CVE-2020-0548 CVE-2020-0549
Package : intel-ucode
Type : information disclosure
Remote : No
Link : https://security.archlinux.org/AVG-1187
The package intel-ucode before version 20200609-1 is vulnerable to
Upgrade to 20200609-1.
# pacman -Syu "intel-ucode>=20200609-1"
The problems have been fixed upstream in version 20200609.
- CVE-2020-0543 (information disclosure)
A new domain bypass transient execution attack known as Special
Register Buffer Data Sampling (SRBDS) has been found. This flaw allows
data values from special internal registers to be leaked by an attacker
able to execute code on any core of the CPU. An unprivileged, local
attacker can use this flaw to infer values returned by affected
instructions known to be commonly used during cryptographic operations
that rely on uniqueness, secrecy, or both.
- CVE-2020-0548 (information disclosure)
A flaw was found in Intel processors where a local attacker is able to
gain information about registers used for vector calculations by
observing register states from other processes running on the system.
This results in a race condition where store buffers, which were not
cleared, could be read by another process or a CPU sibling. The highest
threat from this vulnerability is data confidentiality where an
attacker could read arbitrary data as it passes through the processor.
- CVE-2020-0549 (information disclosure)
A microarchitectural timing flaw was found on some Intel processors. A
corner case exists where data in-flight during the eviction process can
end up in the “fill buffers” and not properly cleared by the MDS
mitigations. The fill buffer contents (which were expected to be blank)
can be inferred using MDS or TAA style attack methods to allow a local
attacker to infer fill buffer values.
A local unprivileged attacker with access to an affected CPU can read
protected memory through a shared buffer on an SGX enclave or CPU core.
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